JPS633168Y2 - - Google Patents

Description

[Detailed Description of the Invention] The invention relates to a semiconductor device having an amplification type gate structure, and particularly aims to provide a semiconductor device with improved turn-off performance.

Generally, a semiconductor device with an amplification type gate structure is constructed by integrating a main thyristor and an auxiliary thyristor, and the auxiliary thyristor mechanism amplifies the gate current, thereby improving the ignition characteristics at turn-on. However, as a semiconductor device of this type, a gate turn-off thyristor (hereinafter referred to as a GTO) that can be turned off with a gate as shown in Fig.
An example of the structure of (abbreviated as ) will be explained.

The GTO consists of a main thyristor section consisting of P ₁ N ₁ P ₂ N ₂ 4-layer 3-junction and an auxiliary thyristor section consisting of P ₁ N ₁ P ₂ N ₃ 4-layer 3-junction, and A, K and G are anodes respectively. terminal, cathode terminal and gate terminal.
1 is a main gate electrode, 2 and 3 are a first sub-cathode electrode and an auxiliary gate electrode, and the auxiliary gate electrode 3 and the main gate electrode 1 are electrically connected through a diode 5 as shown in the figure, while the main gate electrode 1 and the first sub-cathode electrode 2 are also connected via a connecting line as shown. 4 is a turn-off power supply connected between the cathode terminal K and the gate terminal G, and the turn-on power supply is omitted in the figure.

In the operation of such a structural example, first, when igniting, a required current is supplied to the auxiliary gate electrode 3 from a turn-on power source (not shown). This gate current flows through the path of the _P2 layer → _N3 layer → main gate electrode 1 → _P2 layer → _N2 layer → main cathode electrode → the negative terminal of the turn-on power supply (not shown), and in this process,
The auxiliary thyristor consisting of P ₁ N ₁ P ₂ N ₃ is turned on, and thereby the main thyristor consisting of P _{1 N 1} P ₂ N ₂ is also turned on to supply a predetermined load current. On the other hand, when turning off, a current is supplied to the main cathode electrode from the turn-off power source via the cathode terminal K. This current is
N ₂ layer → P ₂ layer → Main gate electrode 1 → Diode 5 →
Negative terminal of turn-off power supply 4 and N ₂ layer → P ₂
It flows through each path of layer → sub cathode electrode 2 → diode 5 → negative terminal of the turn-off power supply, thereby turning off the semiconductor device consisting of the main thyristor and the auxiliary thyristor.

The above is an overview of the operation of the conventional GTO, but the problem here is the operation at turn-off. In other words, when a current flows through the path of _N2 layer → _P2 layer → main gate electrode 1, the current flowing from the _P2 layer to the main gate electrode 1 is assumed to be igr, and the layer resistance of the _P2 layer is assumed to be R as shown in the figure. Then, a voltage drop of igr.R occurs as shown in the illustrated polarity, and this voltage drop forward biases the junction of the _P2 layer and the _N3 layer. This forward bias causes the auxiliary thyristor composed of P ₁ N ₁ P ₂ N ₃ to fire, and the load current begins to flow through the path of the auxiliary thyristor → main gate electrode 1 → diode 5. Therefore, there is a fatal drawback in that an excessive current flows through the _N3 layer and the _N3 layer is destroyed.

The present invention was devised in view of this point, and a sub cathode electrode is newly provided on the upper part of the _N3 layer, and the main gate electrode is set so that the current flow direction flows from the sub cathode electrode to the main gate electrode. →By inserting a diode between the auxiliary cathode electrodes, damage to the poles of the auxiliary thyristor due to current concentration during turn-off is prevented.

FIG. 2 shows an embodiment of the present invention, and the same parts as in FIG. 1 are given the same reference numerals. In this example, first, as shown in the figure, a second sub-cathode electrode 7 is newly provided on the top of the _N3 layer.
This sub-cathode electrode 7 and the other first sub-cathode electrode 2 are electrically connected via a connecting line l as shown in the figure, and further connected to the main gate electrode 6 on the upper part of the _P2 layer.
A diode 8 is newly inserted between the sub cathode electrodes 7 on the upper part of the _N3 layer so that the current flow direction flows from the sub cathode electrode 7 to the main gate electrode 6. 9 is a turn-on electrode for turning on the element, and this power supply 9
A switch 10 and a current limiting resistor 11 are connected in series. 12 is a switch inserted when the element is turned off.

To describe the operation of the embodiment configured in this way,
First, when turning on the switch 10, turn on power supply 9 → switch 10 → current limiting resistor 11 → gate terminal G → auxiliary gate electrode 3 → P ₂ layer → N ₃ layer → sub cathode electrode 7 → diode 8 → Main gate electrode 6 → P ₂ layer → N ₂ layer → Main cathode electrode → Cathode terminal K → Turn-on power supply 9
A predetermined current flows through the path of the negative terminal of , and in this operation process, the auxiliary thyristor consisting of P ₁ N ₁ P ₂ N ₃ is first fired, and then the sub cathode electrode 7 → diode 8 → main gate electrode 6 → When current flows from the P ₂ layer to the N ₂ layer, the main thyristor consisting of P ₁ N ₁ P ₂ N ₂ is fired to supply a predetermined load current.

On the other hand, when turning off the GTO, first turn on the switch 12 and turn off the turn-off power supply 4.
Reverse bias the N ₂ P _two- layer junction. That is, switch 1
2 is turned on, cathode terminal K → main cathode electrode → N ₂ layer → P ₂ layer → main gate electrode 6 → diode 5 → gate terminal G → negative terminal of turn-off power supply 4, and cathode terminal K → main cathode electrode →N ₂
A predetermined current flows through each path of layer→ _P2 layer→sub cathode electrode 2→connection line 1→diode 5→gate terminal G→switch 12→negative terminal of turn-off power source 4. During this operation process, the main thyristor consisting of P ₁ N ₁ P ₂ N ₂ is rapidly turned off, cutting off the load current. What should be noted in this turn-off process is that in this embodiment, the _N3 of the auxiliary thyristor due to overcurrent, as seen in conventional devices, is
The point is that local destruction of the layer portion can be completely prevented.
That is, by providing the main gate electrode 6 on the top of the P ₂ layer and the second sub-cathode electrode on the top of the N ₃ layer, the connection between the N ₂ layer → P ₂ layer → main gate electrode 6 during turn-off is achieved. The current flowing to the turn-off power supply 4 side reverse biases the diode 8 connecting the main gate electrode 6 and the second sub-cathode electrode 7, so that the current at turn-off does not pass through the _N3 layer. All of the current flows through the main gate electrode 6. Therefore, in the turn-off process,
The auxiliary thyristor consisting of P ₁ N ₁ P ₂ N ₃ does not take any part in the operation, and re-ignition of the auxiliary thyristor can be completely prevented.

Although this embodiment has been described with respect to a general GTO having an amplification type gate structure, there are no cases other than such embodiments, such as a center gate structure or a side gate structure, and furthermore, a case where the gate electrode is mutually connected to the cathode part. It goes without saying that this method can be applied to semiconductor devices having intricate comb-shaped structures.

As described above, the present invention has a relatively simple structure that completely prevents the auxiliary thyristor element from restriking when the main element is turned off, and also prevents local destruction of the _N3 layer portion of the auxiliary thyristor element. Since this can be completely prevented, it is possible to further improve the turn-off performance of a semiconductor device having an amplification type gate structure, and it is also possible to provide a device that is advantageous in terms of cost.

[Brief explanation of the drawing]

FIG. 1 is a half-mounted sectional view of a conventional device having an amplification type gate structure, and FIG. 2 is a half-mounted sectional view of a semiconductor device showing an embodiment of the present invention. 1, 6... Main gate electrode, 2, 7... First and second sub cathode electrodes, 3... Auxiliary gate electrode, 5, 8... Diode, 4... Power supply for turn-off, 9... For turn-on Power supply, 10, 12...
Switch, 11... Current limiting resistor, G... Gate terminal, K... Cathode terminal, A... Anode terminal.

Claims (1)

[Claims for Utility Model Registration] (1) A main thyristor consisting of P ₁ N ₁ P ₂ N ₂ 4-layer 3-junction and an auxiliary thyristor consisting of P ₁ N ₁ P ₂ N ₃ 4-layer 3-junction are integrated. The auxiliary thyristor is ignited by the on-gate current, the main thyristor is made conductive after the gate current is amplified, and the main thyristor is turned off by the off _{- gate} current. A main gate electrode and a first sub-cathode electrode are placed on top of the _P2 layer at the periphery, a second sub-cathode electrode is placed on top of the _N3 layer,
An auxiliary gate electrode is provided on the upper part of the P ₂ layer at the periphery of the N ₃ layer, and the direction of flow between the main gate electrode and the second sub cathode electrode is set so that the polarity of the main gate electrode is higher than that of the second sub cathode electrode. A first diode is connected between the main gate electrode and the auxiliary gate electrode, and a second diode is connected between the main gate electrode and the auxiliary gate electrode so that the direction of current flow is more polarized than the main gate electrode. A semiconductor device characterized in that a connection point connecting a diode and the second diode is connected to the first sub-cathode electrode via a connection line. (2) The semiconductor device according to claim 1, wherein the main gate electrode is a turn-off gate terminal, and the auxiliary gate electrode is a turn-on gate terminal.