JPS593859B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a self-alignment method for manufacturing a semiconductor device with high precision.

- In the example semiconductor device, I2L (In is eg and a is edIn)
jectinoLogic).

This structure is suitable for increasing the density of integrated circuits because it has the advantage that a logic circuit can be constructed with a simple structure and does not require separation between elements. Conventional I2L is suitable for higher density than ordinary bivara logic circuits, but because it uses a lateral 5PNP transistor as an injector, its switching speed is slow, resulting in a so-called double diffusion method. There is something. This is done by diffusing impurities of different conductivity types through one mask opening, and converting the injector into a vertical P.
NP Transis was formed on the 10th. In this type of transistor, impurities diffused into the semiconductor substrate are diffused not only vertically but also horizontally in the substrate, and two different conductivity type impurities are absorbed through the same mask opening, one deep and one shallow. This is a diffusion method that utilizes the formation of a junction with a diffusion-formed layer. In conventional photoetching technology that uses photomasks, the alignment accuracy of the photomasks is not perfect, so it was necessary to provide some margin for mask misalignment.
The double diffusion method eliminates this drawback. 20 However, in I2L using this double diffusion method, phosphorus P is usually used as an impurity to form the base of a PNP transistor, but during this phosphorus diffusion, phosphorus reacts with SiO2 to form phosphorus glass, and the phosphorus Glass is SiO2
Since the etching rate is higher than that of phosphorus, it is removed in the pretreatment when forming the emitter after phosphorus diffusion.

As a result, the diffusion window expanded in the lateral direction, and when the next emitter was formed in this state, the emitter-base junction was likely to be short-circuited on the surface of the semiconductor substrate, resulting in a phenomenon in which the leakage current increased by 30%. This phenomenon seems to be avoided if a nitride film is used instead of a silicon oxide film as a diffusion mask, but in reality, it depends on the difference in expansion coefficient between the substrate and the nitride film near the surface of the semiconductor substrate. Impurities were abnormally diffused, and there was a tendency for the -35 current to increase. Furthermore, if the emitter diffusion is made shallow in order to eliminate this leakage current, the operation as a vertical PNP transistor occurs only in the vicinity of the substrate surface, and the characteristics tend to deteriorate. The present invention provides an improved method for manufacturing a semiconductor device in order to eliminate the drawbacks of the above-mentioned method for manufacturing a semiconductor device, and provides a method for manufacturing a semiconductor device using a self-alignment method that eliminates the drawbacks of the double diffusion method. It is.

In order to achieve the above object, a first step of forming a first insulating film on the surface of a semiconductor substrate, a second step of laminating the first insulating film on the surface of the semiconductor substrate,
a second step of forming an insulating film and patterning it, using the pattern of the second insulating film as a mask and etching the first insulating film wider than the opening to form exposed areas on the surface of the semiconductor substrate; a fourth step of diffusing the first impurity into the exposed portion of the semiconductor substrate using the etched first insulating film as a mask; and forming a third insulating film on the exposed portion. Fifth step: Using the second insulating film as a mask, the third insulating film is subjected to ion etching or sputter etching.
and a seventh step of diffusing an impurity of a conductivity type different from the first impurity into the exposed portion of the semiconductor substrate using the first and third insulating films as masks.

Next, one embodiment of the present invention will be explained in detail in the order of steps with reference to the drawings.

The semiconductor substrate 1 shown in FIG. 1 has a specific resistance of 0.015 Ωm.
''(: epitaxially formed on one main surface of an N-type 100 silicon substrate 1a to a thickness of approximately 3 μm by hydrogen reduction of an example of silicon tetrachloride (SiCl4) at 11500C, with a specific resistance of 0.5ΩMf) P-type epitaxial It consists of layer 1b.

First step (see FIG. 2) A silicon oxide film 2 having a thickness of about 4000 Å is formed on the epitaxial layer of the prepared semiconductor substrate 1 by thermal oxidation.

Furthermore, about 3 layers of silicon nitride film 3 (Si3N4) are layered.
The film thickness is 000A. The silicon nitride film is produced by thermal decomposition of monosilane (SiH4) and ammonia (NH3). Furthermore, a photoresist film 4 is deposited and patterned into a predetermined shape. Reference numeral 14 in the figure indicates a part of the hole in the patterning. Second step (FIG. 3) Using the photoresist pattern as a mask, the silicon nitride film 3 is subjected to plasma etching in Freon gas (CF4) to obtain a patterned opening 13. (At this time, the silicon oxide film is hardly etched because its etching rate is lower than that of the silicon nitride film.) Next, the photoresist film is peeled off, and the silicon oxide film is etched with ammonium fluoride (H4F) using the silicon nitride film as a mask. A convex opening 1 is formed by etching the oxide film 2 and is connected to the opening 13.
I got 3'. That is, an opening 12 is provided in the silicon oxide film by etching to a width of approximately 1.5 μm in the lateral direction.
Therefore, the width of the opening is 12>13. Third step (Figure 4) Silicon oxide film 2 and silicon nitride film 3
Using the mask as a mask, phosphorus oxychloride (POc
t3) to the semiconductor substrate 1 at 1100°C.
was diffused approximately 3 μm.

Fourth step (FIG. 5) A silicon oxide film 16 is formed to a thickness of about 2000 on the exposed surface of the semiconductor substrate in the opening 13'' by thermal oxidation.
A was formed. Step 5 (FIG. 6) The silicon oxide film 16
Then, using the silicon nitride film 3 as a mask, etching was performed by ion etching using argon gas to form an opening 26.

At this time, the portions of the silicon oxide films 2 and 16 covered with the silicon nitride film remain without being etched. 6th step (Figure 7) After dissolving the silicon nitride film with hot phosphoric acid (H3PO4),
An injector was formed by diffusing boron B to about 2 μm at 11000C.

At this time, a silicon oxide film of about 3000 Å was formed. Next, a hole was formed in the silicon oxide film 2 by a well-known photolithography technique, and phosphorus was diffused into the semiconductor substrate by 1 μm to form a collector region 18 of an NPN transistor as shown in FIG. In addition, lead-out holes for the injector and base collector are provided to expose the base body (region) in these parts, and the electrodes 21, 22, 2
3 was placed to form I2L.

According to the method for manufacturing a semiconductor device according to the present invention, the characteristics of the conventional double-diffusion type PNP transistor are particularly improved.
There is no short circuit at the junction between the emitter and the base, and the current amplification factor β can be set to 10 or more, and variations within the wafer can be reduced, which is an extremely remarkable effect.

[Brief explanation of drawings]

1 to 8 are cross-sectional views showing the method of manufacturing a semiconductor device according to the present invention in the order of steps. Note that the same reference numerals in the drawings indicate the same or corresponding parts, respectively. 1...Semiconductor substrate, 2...Silicon oxide film (first insulating film), 3...Silicon nitride film (second insulating film), 12... ...Opening in silicon oxide film, opening in 13 silicon nitride film.

Claims (1)

[Claims] 1. A first insulating film is formed on the main surface of the semiconductor substrate.
a second step of forming a second insulating film by laminating it on the insulating film and patterning it; using the pattern of the second insulating film as a mask and applying a layer to the first insulating film wider than the opening; a third step of etching to provide an exposed portion on the main surface of the semiconductor substrate; a fourth step of diffusing a first impurity into the exposed portion of the semiconductor substrate using the etched first insulating film as a mask; a fifth step of forming a third insulating film on the exposed portion, a sixth step of performing ion etching or sputter etching on the third insulating film using the second insulating film as a mask, and removing the first and third insulating films. A method for manufacturing a semiconductor device, comprising a seventh step of diffusing an impurity of a conductivity type different from the first impurity into an exposed portion of the semiconductor substrate using a film as a mask.