JPS5937633U - printer with keyboard - Google Patents
printer with keyboardInfo
- Publication number
- JPS5937633U JPS5937633U JP13239082U JP13239082U JPS5937633U JP S5937633 U JPS5937633 U JP S5937633U JP 13239082 U JP13239082 U JP 13239082U JP 13239082 U JP13239082 U JP 13239082U JP S5937633 U JPS5937633 U JP S5937633U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- priority
- keyboard
- printer
- interface circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は、本考案の一実施例を示すブロック図である。
図において、１・・・ＣＰＵユニット、２・・・マザー
ボード、３・・・外部装置インターフェイスユニット１
．４・・・外部装置インターフェイスユニット２．５・
・・ＣＰＵ、 ５・・・バス使用優先順位決定回路、７
・・・ｃｐｕユニットバス使用優先順位設定回路、８・
・・ＰＲＯＭ、９・・・バス使用優先順位判定回路、１
０・・・バッファ、１１・・・アドレス設定回路１．１
２・・・バッファ、１３・・・アドレス設定回路２．１
４・・・バス使用要求信号、ｊ５・・・バス使用許可信
号、１６・・・バス、１７・・・ユニット１制御回路、
１８・・・ユニット２制御回路。The figure is a block diagram showing one embodiment of the present invention. In the figure, 1...CPU unit, 2...Motherboard, 3...External device interface unit 1
．． 4...External device interface unit 2.5.
...CPU, 5...Bus usage priority determining circuit, 7
...CPU unit bus use priority setting circuit, 8.
...PROM, 9...Bus usage priority determination circuit, 1
0...Buffer, 11...Address setting circuit 1.1
2...Buffer, 13...Address setting circuit 2.1
4... Bus use request signal, j5... Bus use permission signal, 16... Bus, 17... Unit 1 control circuit,
18...Unit 2 control circuit.
Claims (1)
どが接続される外部装置の種類と優先順位を示す符号と
を格納する設定回路を有する複数のインタフェース回路
と、前記インタフェース回路からの信号に応答して前記
複数インタフェース回路に接続される各々の外部装置の
優先順位を設定する優先順位設定回路と、この優先順位
設定回路の出力に応じて前記インタフェース回路の１つ
を選択する優先順位判定回路とから構成された優先順位
決定回路を有することを特徴とするキーボード間プリン
タ。In a printer with a keyboard, a plurality of interface circuits each having a setting circuit that stores a code indicating the type and priority of an external device to which a display or the like is connected, and a plurality of interface circuits that respond to signals from the interface circuit A priority setting circuit that sets the priority of each external device connected to the circuit, and a priority determination circuit that selects one of the interface circuits according to the output of this priority setting circuit. An inter-keyboard printer characterized by having a ranking determining circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13239082U JPS5937633U (en) | 1982-09-01 | 1982-09-01 | printer with keyboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13239082U JPS5937633U (en) | 1982-09-01 | 1982-09-01 | printer with keyboard |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5937633U true JPS5937633U (en) | 1984-03-09 |
Family
ID=30298976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13239082U Pending JPS5937633U (en) | 1982-09-01 | 1982-09-01 | printer with keyboard |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5937633U (en) |
-
1982
- 1982-09-01 JP JP13239082U patent/JPS5937633U/en active Pending
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