JPS5935486A - Photo semiconductor device - Google Patents
Photo semiconductor deviceInfo
- Publication number
- JPS5935486A JPS5935486A JP57147358A JP14735882A JPS5935486A JP S5935486 A JPS5935486 A JP S5935486A JP 57147358 A JP57147358 A JP 57147358A JP 14735882 A JP14735882 A JP 14735882A JP S5935486 A JPS5935486 A JP S5935486A
- Authority
- JP
- Japan
- Prior art keywords
- pinhole
- layer
- semiconductor layer
- optical semiconductor
- electrode layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 239000010409 thin film Substances 0.000 claims abstract description 8
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 7
- 230000003287 optical effect Effects 0.000 claims description 29
- 239000000463 material Substances 0.000 claims description 8
- 230000000694 effects Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 abstract description 11
- 239000007772 electrode material Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 51
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 230000002950 deficient Effects 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 206010011224 Cough Diseases 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 150000003377 silicon compounds Chemical class 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
Ｈ）技術分野
本発明に光照射に、Ｃり）Ｙ：、憲効来が生じる薄膜状
光半導体Ｊｌｄｉを備えた光半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION H) Technical Field The present invention relates to an optical semiconductor device equipped with a thin film optical semiconductor Jldi that produces a positive effect on light irradiation.
（ロ） 背景技術
光照射に工り光起電力が発生する現象や電気伝導度が低
下する現象、所謂光電効果を利用した光半導体装置が存
在する。従来この種元半導体−ｊ＆１４は単結晶材料か
ら形成されていたが、′近年新材料としてアそルファス
半導体等が構造が容易でコスト的に有利な点から脚光を
浴び盛んに研究が行なわれてｈる。(b) Background Art There are optical semiconductor devices that utilize the so-called photoelectric effect, which is a phenomenon in which an artificial photovoltaic force is generated upon light irradiation or a phenomenon in which electrical conductivity is decreased. Conventionally, this seed semiconductor -J&14 has been formed from a single crystal material, but in recent years, amorphous semiconductors and other new materials have been in the spotlight due to their easy structure and cost advantages, and active research has been conducted on them. hru.
本発明者等％Ｐ工ＮＩＩ合型アモルファスシリコンから
成る太陽′電池並びにフォトセンサ等を開発するに及ん
でいる。The present inventors have developed solar cells, photosensors, etc. made of %P-NII composite amorphous silicon.
第１図は上記ＰＸＮ接合型アモルファスシリコン太陽電
池の基本構造を示し、１１）はガラス。耐熱プラスチッ
ク等の厚み１〜６目程度の透光性基板、（２）は該基板
１１）の−主面に形成された酸化スズ（Ｓｎ０２．）、
酸化インジウム（Ｉ １１２０ ｓ ）、酸化インジウ
ム。スズ（Ｉｎ２０に一８ｎ０２）等の厚み２０００〜
５０００Ａ程度の透光性電極層、（３）は例えばシラン
（ＳｉＨ４）等のシリコン化合物雰囲気中に適当な不純
物を添加しプラズマ反応を生起せしめて形成された厚み
５０００〜７０Ｏ〇八程度のＰＩＮ接合型アモルファス
シリコンから成る光半導体層、（４）は該光半導体層（
３）上にアルミニウム（八ｌ）等の金属全蒸着せしめた
厚み２０００〜１００００１程度の裏面電極層で、祈る
透光性基板（１）の他方の工面から光が照射せしめられ
ると王に１層に於いて電子及びホール対が発生しこれ等
が透光性＠、極層（２）並びに裏面電極Ｉ釦４）に移動
して光起電力を生せしめる。FIG. 1 shows the basic structure of the PXN junction type amorphous silicon solar cell, and 11) is glass. A light-transmitting substrate made of heat-resistant plastic or the like and having a thickness of about 1 to 6 mm, (2) is tin oxide (Sn02.) formed on the main surface of the substrate 11),
Indium oxide (I 1120 s ), indium oxide. Thickness of tin (In20 to 18n02) etc. 2000~
The transparent electrode layer (3) is about 5000A, and (3) is a PIN junction with a thickness of about 5000~7008, which is formed by adding appropriate impurities to a silicon compound atmosphere such as silane (SiH4) and causing a plasma reaction. The optical semiconductor layer (4) is made of type amorphous silicon.
3) A back electrode layer with a thickness of about 2,000 to 100,001 on which a metal such as aluminum (8L) is completely vapor-deposited, and when light is irradiated from the other surface of the transparent substrate (1), a single layer is formed. In this process, electron and hole pairs are generated and these move to the translucent @, pole layer (2), and back electrode I button 4) to generate a photovoltaic force.
然シ乍う、アモルファスシリコン等のアモルファス半導
体は上述の如くプラズマ反応等に工す形成されその膜厚
も通常５０００Ａ〜１μｍ程度（場合に工ってに数μｍ
）の嵩々ミクロンオーダまでの薄膜状を成すために、特
にその製造過程に於いて基板１１）及び透光性電極層（
２１の表面の状態や塵埃の付着など［エリ、透光性電極
層（２）上にアモルファス半導体材の被着しない部分が
発生し、斯るアモルファス半導体材から成る光半導体層
（３）を貫通してピンホール（５）が形成さオすること
がある０そして、ピンホール（５）を有する光半導体１
ｍ ＋３１上に上述の如くに面電極７６１４＋を形成す
ると、ピンホール（５１ン具而電極材が貫通し、透光性
′電極層（２）と長面電極Ｎ（４）とが上記裏面電極材
にエリ電気的に短絡状態となる欠点を有していた。However, as mentioned above, amorphous semiconductors such as amorphous silicon are formed by processing such as plasma reaction, and the film thickness is usually about 5000A to 1 μm (in some cases, the film thickness is several μm).
) In order to form a bulky thin film of micron order, the substrate 11) and the transparent electrode layer (
The condition of the surface of 21, the adhesion of dust, etc. [eli] There are areas on the translucent electrode layer (2) where the amorphous semiconductor material is not adhered, and the optical semiconductor layer (3) made of such amorphous semiconductor material is penetrated. Then, a pinhole (5) may be formed 0 and an optical semiconductor 1 having a pinhole (5)
When the surface electrode 7614+ is formed on M+31 as described above, the pinhole (51) is penetrated by the electrode material, and the translucent electrode layer (2) and the long surface electrode N(4) are connected to the back surface electrode. The material had the disadvantage of causing an electrical short circuit.
（ハ）発明の開示
本発明は斯る光半導体Ｎを挾持する透光性電極層と裏面
電極層との短絡事故を回避すべくなされたものであって
、光半導体層形成後に被着される電極層にもピンホール
を穿ち、該′電極層のピンホールと上記光半導体層のビ
ンポールとを連通させ、咳ピンホール内を電気的に絶縁
状態とした光半導体装置を提供するものである０次項に
本発明を上記従来例の９口（ＰＩＮＪＪｉ：金型アモル
フ゛アスシリコン太陽電池に適用した実施例につき詳述
するが、本発明ｔユこの実施例とＱよ８Ａなり半導体接
合を肩さず元照躬ＶＣＬ９’亀気伝４度が低下するもの
であっても艮く、光半導体層もアモルファスシリコンに
限定さルるものでないことは言うに及ばない０に）発明
７ａ１５４施するための最良の形態第２図は本発明の一
実施例を示す断面図であって、第１図と同じものには同
番号が付してあり、は）に透光性基板、（２）に透光性
電極層、＋３）は薄膜状の光半導体層、（４）は裏面電
極層、（５）は上記薄膜上の光半導体層（３）形成時に
該光半導体／ｉ！［３）を貫通して生じたピンホールで
、異なるところは上記光半導体層（３）形成後に被着さ
れる電１層である裏面電極層（４；にもピンホール（６
）を穿ち、このピンホールｉ５）［６１内士を連通せし
め、該ピンホール１５１ （６１内を′電気的に絶縁状
態としたところにある。(C) Disclosure of the Invention The present invention has been made in order to avoid short-circuit accidents between the light-transmitting electrode layer sandwiching the optical semiconductor N and the back electrode layer, which is deposited after the optical semiconductor layer is formed. A pinhole is also formed in the electrode layer, and the pinhole in the electrode layer is communicated with the pinhole in the optical semiconductor layer, thereby providing an optical semiconductor device in which the inside of the cough pinhole is electrically insulated. In the next section, an example in which the present invention is applied to the conventional example 9 (PINJJi: molded amorphous silicon solar cell) will be described in detail. It goes without saying that the photo-semiconductor layer is not limited to amorphous silicon even if the VCL9'Kekkeiden 4th degree is lowered. BEST MODE FIG. 2 is a cross-sectional view showing one embodiment of the present invention, in which the same parts as in FIG. 1 are given the same numbers. A photosensitive electrode layer, +3) is a thin film-like photosemiconductor layer, (4) is a back electrode layer, and (5) is the photosemiconductor layer (3) on the thin film when the photosemiconductor/i! The difference is that there is also a pinhole (6) in the back electrode layer (4), which is the first electrode layer that is deposited after forming the optical semiconductor layer (3).
) is drilled, and the pinholes i5) and 61 are made to communicate with each other, and the pinholes 151 and 61 are electrically insulated.
斯る裏面電極層）４）のピンホール田）の形成方法につ
いて以下に説明を加える。The method for forming the pinhole field of the back electrode layer) 4) will be explained below.
先ず、上述の如くシリコン化合物界囲気中でのプラズマ
反応に、工９アモルファスシリコンから成る厚み約ミク
ロンオーダ以下の薄膜状光半導体層（３）を、透うＬ性
基板＋１１の一王面に配置された透光性電極層（２）上
に被着し、Ａｌ１等の金属を蒸着して裏面電極層１４）
を積層する０この時点で光半導体層（３）にピンホール
（５）が形成されていると、次工程の裏面１Ｆ極層（４
１の蒸着工程に於いて、裏面電極材が上記ピンホール（
５）を貫通して裏面電極層（４）と透光性電極層（２）
は電気的に短絡状態となる。−万ビンホール（５）のな
いものについては正常に動作する光半導体装置が形成さ
れる。First, as described above, a thin optical semiconductor layer (3) made of amorphous silicon and having a thickness of approximately micron order or less is placed on one surface of the transparent L-containing substrate +11, due to the plasma reaction in the silicon compound surrounding atmosphere. A back electrode layer 14) is formed by depositing a metal such as Al1 on the translucent electrode layer (2) and depositing a metal such as Al1.
If a pinhole (5) is formed in the optical semiconductor layer (3) at this point, the back side 1F pole layer (4) will be laminated in the next step.
In the vapor deposition step 1, the back electrode material is attached to the pinhole (
5) to penetrate the back electrode layer (4) and the transparent electrode layer (2).
becomes electrically short-circuited. - Optical semiconductor devices that operate normally are formed for those without ten thousand bin holes (5).
次いで良品から上記短絡による不良品を選別し、第６図
の如くビーム光（７）を透光性基板（１）の他方の工面
から照射し乍ら、斯るビーム光（７）を平面走査する。Next, defective products due to the short circuit are sorted out from good products, and as shown in FIG. 6, while irradiating the beam light (7) from the other surface of the translucent substrate (1), the beam light (7) is scanned in a plane. do.
このビーム光（７）の平面走査時光半導体装置の短絡電
流を測定すると、短絡状態にあるビンホ１所に於いては
光半導体Ｎ１１３１に生起せしめられた電子及びホール
対の移動にエリ短絡電流が流れる０従って、ビーム光（
７）を平面走査し短絡電流を測定することによって上記
ピンホール（５）の箇所を知ることができる。When the short-circuit current of the optical semiconductor device is measured during plane scanning of this beam light (7), it is found that in the short-circuited Binho 1, an Eri short-circuit current flows due to the movement of electron and hole pairs generated in the optical semiconductor N1131. 0 Therefore, the beam light (
7) and measure the short circuit current, the location of the pinhole (5) can be determined.
最後にピンホール（５）の箇所を裏面電極層（４）側か
ら矢印（８）の如くピーク出力５ｘ１０ｗ／硼 のＹＡ
Ｇパルスレーザの出力ビームを輻射し、裏面電極層（４
）並びにピンホール（５）、内に侵入した裏面電極材を
消散除去する。即ち、第２図に示した如く薄膜状光半導
体層（３）の形成時に光半導体層（３）を貫通して生じ
たビンホーＡ／（５１と同軸的に該光半導体層（３）形
成後に破着された裏面′電極層（４）にピンホール（６
１を穿ち、両ピンポール１５１ｉ６１を連通させ、咳ピ
ンホール１５１（６１円ン電気的に絶縁状態と１−る。Finally, place the pinhole (5) from the back electrode layer (4) side as shown by the arrow (8) to increase the peak output of 5 x 10 W/YA.
The output beam of the G pulse laser is radiated, and the back electrode layer (4
) and the pinhole (5), and the back electrode material that has entered inside is dissipated and removed. That is, as shown in FIG. 2, after the formation of the thin-film optical semiconductor layer (3), Binho A/(51), which was generated through the optical semiconductor layer (3) during the formation of the thin film optical semiconductor layer (3), is coaxial. There is a pinhole (6) in the torn backside electrode layer (4).
1 and connect both pinholes 151 and 151 to communicate with each other, so that the cough pinhole 151 (61) is electrically insulated.
その際レーザビーム（８）に透光性電極ＩｖＪ１２）に
到達し該透元註゛亀礪７！！２１を消散せしめても装置
の特性には何ら悪形、Ｖ全及ぼすことはなく、また透光
性基板１１）は充分肉厚なために貫通することばない。At that time, the laser beam (8) reaches the transparent electrode IvJ12) and the transparent electrode 7! ! Even if 21 is dissipated, it will not have any adverse effect on the characteristics of the device, and since the transparent substrate 11) is sufficiently thick, it will not penetrate.
そして好ましくはピンホールｔ５）＋６１ ”ｘ形成後
裏面電極ノ鱈（４）の表面乞絶縁性愼脂等のパッシベー
ション膜で被覆シ、斯パッシベーション材を上記ピンホ
ール１５１ｉ６１円に充填せしめるのが望ましい。Preferably, after forming the pinholes t5)+61''x, the surface of the back electrode (4) is coated with a passivation film such as insulating resin, and the pinholes 151i61 are filled with the passivation material.
尚上記実施例に於ける基板（１）はガラス、耐熱プラス
チック等の透光性材料からなる場合について説明したが
、ステンレス等の金属材料から形成される際１ま該金属
材料が裏面電極層（４）を構成し、光半導体層（３）形
成後に透光性電極層（２）が被着され、斯る透光性電極
層（２）に光半導体層１３１のピンホール（５１と連通
するピンホール（６）が穿たれる０また電極層にピンホ
ール（６）を穿つ手段も上述の如くレーザビームに限ら
ず電子ビーム、分子線ビーム等のエネルギビームであっ
ても良い。更に、ビーム光（７）の走査と運動して上記
エネルギビームの輻射位置を走査し、短絡電流ン人カと
して斯る短絡電流の減滅にエリ上記エネルギビームの輻
射１トリガする構成としても良い。In the above embodiments, the substrate (1) is made of a light-transmitting material such as glass or heat-resistant plastic. However, when the substrate (1) is made of a metal material such as stainless steel, the metal material is used as the back electrode layer (1). 4), a transparent electrode layer (2) is deposited after the formation of the optical semiconductor layer (3), and the transparent electrode layer (2) communicates with the pinhole (51) of the optical semiconductor layer 131. The means for making the pinhole (6) in the electrode layer is not limited to the laser beam as described above, but may also be an energy beam such as an electron beam or a molecular beam. The radiation position of the energy beam may be scanned by moving with the scanning of the light (7), and the radiation of the energy beam may be triggered once the short circuit current is attenuated.
か）効 果
本発明は以上の説明から明らかな如く、光半導体層形成
後に被着される電極層に、上記光半導体層の形成時に貫
通して生じたピンホールと同軸的にピンホールｙ］’
？ チ、両ピンホールを連通せしめ両ピンホール内を電
気的に絶縁状態となしたので、上記Ｘ、半導体層のピン
ホール内への上記電極材の侵入を除去し、透光性電極層
と裏面［極層との短絡事故を回避することができる。従
って、今まで短絡事故に工り不良品とされていたものを
簡単な構成で良品扱いとすることができ、製造時の歩留
りの向上が図れ、薄膜状元半導体層ン用いたことによる
コストダウンと相俟ってニジ一層の低廉化が可能となる
。(c) Effects As is clear from the above description, the present invention provides a pinhole y in the electrode layer that is deposited after the formation of the optical semiconductor layer, coaxially with the pinhole that penetrates during the formation of the optical semiconductor layer. '
? H. Since both pinholes were made to communicate and the insides of both pinholes were electrically insulated, the intrusion of the electrode material into the pinholes of the semiconductor layer was removed, and the translucent electrode layer and the back surface were removed. [A short circuit accident with the pole layer can be avoided. Therefore, with a simple structure, products that were previously considered defective due to short circuit accidents can be treated as non-defective products, improving yields during manufacturing, and reducing costs by using a thin film-like original semiconductor layer. Together, it will be possible to further reduce the price.
第１図は使米例を示し、同図ｔＡｌは正面図、同図（８
）に、（４）に於けるＡ −Ａ線断面図、第２図は本発
明の一実施例を示す断面図、；ｉ６図はその製造工程の
要部を模式的に示′ｊ゛断面図である。
＋１１・・・透）を性基板、（２）・・・透光性電極層
、（３）・・・薄膜状元半尋体層、（４）・・・裏面電
極ノー、＋５１ｔｔｉｌ・・・ピンホール０Figure 1 shows an example of using rice, tAl in the same figure is a front view,
), FIG. 2 is a sectional view taken along line A-A in (4), FIG. 2 is a sectional view showing one embodiment of the present invention, and FIG. It is a diagram. +11... translucent) as a transparent substrate, (2)... translucent electrode layer, (3)... thin film-like semicircular body layer, (4)... back electrode no, +51ttil... pin hole 0
Claims (1)
、１３Ｙ；半導体層の光入射面ｔ／ｃ設けられた透光性
を極層、＃透光性電極層と共に上記光半導体層を挾持す
る裏面ｔＩＬｉ 層、どから成υ、上記薄膜状元手４捧
）Ｇ２の形成時に訳）し半導体層を貫通して生じたピン
ホールと同軸的に、該光半導体層形成後に被着さ扛る上
記側ｒしか一万の゛ＩｉＬ極盾にピンホールを穿ち、上
記光半導体ノーのピンホールと一万の電極層のピンホー
ルを連通させ、該ピンホール内を電気的に絶−：状態と
したことを％徴とする光半導体装置。(1) Thin film optical semiconductor layer that produces a photoelectric effect when irradiated with light, 13Y; the above optical semiconductor layer together with the light-transmitting polar layer provided at the light incidence surface t/c of the semiconductor layer and the #transparent electrode layer. The back surface tILi layer, which holds the optical semiconductor layer, is deposited after the optical semiconductor layer is formed, coaxially with the pinhole that is formed through the semiconductor layer during the formation of the above-mentioned thin film base material G2. A pinhole is made in the IiL polar shield of 10,000 on the side r to be removed, and the pinhole of the optical semiconductor layer is made to communicate with the pinhole of the 10,000 electrode layer, and the inside of the pinhole is electrically isolated: An optical semiconductor device whose % characteristic is that it is in a state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57147358A JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57147358A JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5935486A true JPS5935486A (en) | 1984-02-27 |
| JPS6253958B2 JPS6253958B2 (en) | 1987-11-12 |
Family
ID=15428386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57147358A Granted JPS5935486A (en) | 1982-08-24 | 1982-08-24 | Photo semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5935486A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5986270A (en) * | 1982-11-09 | 1984-05-18 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
| JP2007273933A (en) * | 2006-03-31 | 2007-10-18 | Kla-Tencor Technologies Corp | Method and device for detecting and removing local shunt defects in photovoltaic field |
| WO2010023845A1 (en) * | 2008-08-29 | 2010-03-04 | 株式会社アルバック | Method for manufacturing solar cell |
| KR102322144B1 (en) * | 2020-12-18 | 2021-11-05 | (주)솔라플렉스 | Fabricating method for display panel with solar cells combined |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5685875A (en) * | 1979-12-14 | 1981-07-13 | Fuji Electric Co Ltd | Solar battery |
-
1982
- 1982-08-24 JP JP57147358A patent/JPS5935486A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5685875A (en) * | 1979-12-14 | 1981-07-13 | Fuji Electric Co Ltd | Solar battery |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5986270A (en) * | 1982-11-09 | 1984-05-18 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
| JP2007273933A (en) * | 2006-03-31 | 2007-10-18 | Kla-Tencor Technologies Corp | Method and device for detecting and removing local shunt defects in photovoltaic field |
| JP4560013B2 (en) * | 2006-03-31 | 2010-10-13 | ケーエルエー−テンカー コーポレイション | Method for increasing the efficiency of photovoltaic laminates |
| WO2010023845A1 (en) * | 2008-08-29 | 2010-03-04 | 株式会社アルバック | Method for manufacturing solar cell |
| JPWO2010023845A1 (en) * | 2008-08-29 | 2012-01-26 | 株式会社アルバック | Manufacturing method of solar cell |
| KR102322144B1 (en) * | 2020-12-18 | 2021-11-05 | (주)솔라플렉스 | Fabricating method for display panel with solar cells combined |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6253958B2 (en) | 1987-11-12 |
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