JPS5935490A - Manufacture of photo semiconductor device - Google Patents
Manufacture of photo semiconductor deviceInfo
- Publication number
- JPS5935490A JPS5935490A JP57147359A JP14735982A JPS5935490A JP S5935490 A JPS5935490 A JP S5935490A JP 57147359 A JP57147359 A JP 57147359A JP 14735982 A JP14735982 A JP 14735982A JP S5935490 A JPS5935490 A JP S5935490A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- pinhole
- semiconductor layer
- optical semiconductor
- photo semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 239000010409 thin film Substances 0.000 claims abstract description 6
- 230000005855 radiation Effects 0.000 claims abstract description 5
- 230000003287 optical effect Effects 0.000 claims description 19
- 230000008018 melting Effects 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 abstract description 4
- 239000007772 electrode material Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 3
- 230000000149 penetrating effect Effects 0.000 abstract description 2
- 230000009545 invasion Effects 0.000 abstract 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 150000003377 silicon compounds Chemical class 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
(イ)技術分野
本発明は光照射にエリ光電効果が生じる薄膜状光半導体
層を備えた光半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to a method for manufacturing an optical semiconductor device including a thin optical semiconductor layer in which an electrophotoelectric effect occurs upon irradiation with light.
(ロ)背景技術
光照射にエフ光起電力が発生する現象や電気伝導度が低
下する現象、所請光電効果を利用した光半導体装置が存
在する。従来此株洸半導体装置は単結晶材料から形成さ
れていたが、近年新材料としてアモルファス半導体等が
製造が容易でコスト的に有利な点からか41元を浴び盛
んに研究が行なゎ第1.ている。(B) Background Art There are optical semiconductor devices that utilize the photoelectric effect, which is a phenomenon in which F-photovoltaic force is generated upon light irradiation and a phenomenon in which electrical conductivity is decreased. Traditionally, semiconductor devices have been made of single crystal materials, but in recent years, new materials such as amorphous semiconductors have been actively researched, perhaps because they are easy to manufacture and cost-effective. .. ing.
本発明者等もP工N接合型アモルファスシリコンから成
る太陽電池並びに7オトセンサ等を開発するに及んでい
る。The inventors of the present invention have also developed a solar cell made of P-N junction type amorphous silicon, a solar cell sensor, and the like.
第1図は上記PIN接合型アモルファスシリコン太陽電
池の基本構造を示し、11)ニガラス・耐熱プラスチッ
ク等の透光性基板、(21Fま該基板(1)の−工面に
形成された酸化スズ(Sn02.)、酸化インジウム(
In2ox)、酸化インジウム。スズ(1’n、20s
−BnO2)等の透光性i!電極層(3)は例えばシラ
ン(EliH4)等のシリコン化合物雰囲気中に適尚な
不純物を添加しプラズマ反応を生起せしめて形成された
P I N接合型アモルファスシリコンから成る光半導
体層、(4)は咳元手導体層(3)上にアルミニウム(
An)等の金属を蒸着せしめた裏面電極層で、斯る透光
性基板11)の他方の工面から元が照射せしめられると
王に工層に於いて電子及びホール対が発生しこれ等が透
光性電極層(2)並びに裏面電極層(4)に移動して光
起電力な生ぜしめる。Figure 1 shows the basic structure of the above-mentioned PIN junction type amorphous silicon solar cell. ), indium oxide (
In2ox), indium oxide. Tin (1'n, 20s
-BnO2) etc. translucency i! The electrode layer (3) is an optical semiconductor layer (4) made of a P I N junction type amorphous silicon formed by adding appropriate impurities to a silicon compound atmosphere such as silane (EliH4) and causing a plasma reaction. Aluminum (
When the other side of the transparent substrate 11) is irradiated with a back electrode layer on which a metal such as An) is vapor-deposited, electron and hole pairs are generated in the layer. It moves to the light-transmitting electrode layer (2) and the back electrode layer (4) and generates a photovoltaic force.
然し乍う、アモルファスシリコン等のアモルファス半導
体は上述の如くプラズマ反応等により形成されその膜厚
も通常50007F’〜1μm程K(場合に工っては数
μm)の嵩々ミクロンオーダまでの薄膜状を成すために
、特にその製造過程に於いて基板fi+及び透光性電極
層(21の表面の状態や塵埃の付着などにより、透元性
電(a)釦2)上にアモルファス半導体材の被着しない
部分が発生し、斯るアモルファス半導体材から成る光半
導体層(3)を貫通してピンホール(5)が形成される
ことがある0そして、ピンホール(5)を有する光半導
体層(3)上に上述の如く裏面電極層(4)を形成する
と、ピンホール(5)を裏面電極材が貫通し、透光性゛
電極層(2)と裏面電極層(4)とが上記裏面電極材に
工り電気的に短絡状態となる欠点を有していた0
(ハ)発明の開示
本発明は斯るピンホールによる短絡事故を回避すべぐな
されたものであって、薄膜状光半導体層の被着形成時に
貫通して生じたピンホール周縁をエネルギビームの輻射
により溶融し該ピンホールを埋設した後、上記薄膜状光
半導体層上に電極1−を積層する工程を含んだ光半導体
装置の製造方法を提供するものである。次項に本発明製
造方法を上記従来例の如<PIN接合型アモルファスシ
リ ′コン太陽電池に適用した実施例につき詳述するが
、本発明はこの実施例とは異なり半導体接合を有さす光
照射にエリ電気伝導度が低下するものであっても良く、
光半導体層もアモルファスシリコンに限定されるもので
ないことは言うに及ばない。However, as mentioned above, amorphous semiconductors such as amorphous silicon are formed by plasma reactions, etc., and the film thickness is usually from 50007 F' to about 1 μm K (in some cases, it is several μm), and is in the form of a thin film on the order of microns. In order to achieve the A pinhole (5) may be formed penetrating the optical semiconductor layer (3) made of such an amorphous semiconductor material. 3) When the back electrode layer (4) is formed on the back surface as described above, the back electrode material passes through the pinhole (5), and the translucent electrode layer (2) and the back electrode layer (4) are formed on the back surface. (c) Disclosure of the Invention The present invention has been devised to avoid such short-circuit accidents caused by pinholes. An optical semiconductor comprising the step of melting the periphery of a pinhole that penetrates through the formation of a layer by radiation of an energy beam and burying the pinhole, and then laminating an electrode 1- on the thin film optical semiconductor layer. A method for manufacturing the device is provided. In the next section, an example in which the manufacturing method of the present invention is applied to a PIN junction type amorphous silicon solar cell similar to the conventional example described above will be described in detail. The electrical conductivity may be reduced,
Needless to say, the optical semiconductor layer is not limited to amorphous silicon either.
に)発明を実施するための最良の形態
先ず第2図の如くガラス。耐熱プラスチック等の絶縁材
料からなる厚み1〜6閏程度の透光性基板(11の一主
面に5n02、工n203、In20g−8n02等の
透光性電極層(2)を電子ビーム蒸着法により厚み20
00〜50口OA程度蒸着し導電面を形成する。次いで
上記透光性電極層(2)をパターニング後、プラズマ反
応炉内の対同電極間に配置し、E71H4ガスにジボラ
ン82H6を添加したシリコン化合物雰囲気中でプラズ
マ反応を生起せしめ上記透光性電極層(2)上にP型ア
モルファスシリコンから成るP型層(6P)を被着する
。B) Best Mode for Carrying Out the Invention First, as shown in FIG. 2, a glass is used. A transparent substrate (11) made of an insulating material such as a heat-resistant plastic and having a thickness of about 1 to 6 leaps is coated with a transparent electrode layer (2) of 5N02, In20g-8N02, etc. on one main surface of 11 by electron beam evaporation. Thickness 20
A conductive surface is formed by evaporation to an amount of about 0.00 to 50 OA. Next, after patterning the light-transmitting electrode layer (2), it is placed between the opposite electrodes in a plasma reactor, and a plasma reaction is caused in a silicon compound atmosphere in which diborane 82H6 is added to E71H4 gas. A P-type layer (6P) of P-type amorphous silicon is deposited on layer (2).
そして斯るP型#(3F)上にS↓H4ガスのみでノン
ドープの工型層(6エ)を、更にフォスフインPH5を
添加することによってNWJm(5N)を順次重畳し厚
み5000〜700L]A程度のPINW合型アモルフ
ァスシリコンから成る光半導体層(3)を形成する(第
3図)0このプラズマ反応1cよる光半導体層(3)の
形成自体は特公昭56−67718号公報等に開示され
ており周知である。Then, on such P-type # (3F), a non-doped molding layer (6E) is formed using only S↓H4 gas, and then NWJm (5N) is sequentially layered by adding phosphine PH5 to a thickness of 5000 to 700L]A The formation of the optical semiconductor layer (3) by this plasma reaction 1c is disclosed in Japanese Patent Publication No. 56-67718, etc. (Fig. 3). It is well known.
このようにしてプラズマ反応にニジ形成された薄膜状の
光半導体層(3)にピンホール(5)が形成されたか否
かを、第4図の如く上記光半導体層(3)の裏面方向か
ら極めて低出力のアルゴンガス、レーザから発ぜられる
レーザビーム光(6)を照射した状態で平面走査すると
共に、フォトセンサ(7)を送元性基板lit側に対向
配置し上記レーザビーム光(6)の走査と同期して移動
せしめることに工って検出する。Whether or not a pinhole (5) is formed in the thin film-like optical semiconductor layer (3) formed by plasma reaction in this way can be determined from the back surface direction of the optical semiconductor layer (3) as shown in FIG. A plane is scanned while being irradiated with an extremely low output argon gas and a laser beam (6) emitted from a laser, and a photosensor (7) is placed facing the source substrate lit to scan the laser beam (6). ) is detected by moving it in synchronization with the scanning.
ff1lチ、l:’ンホール(5)が無い状態ではシー
6文、ビーム元(6)は光半導体層(3)に吸収される
ことに工ってフォトセンサ(7)に到達せず、逆にピン
ホール(5)の箇所ではレーザビーム元161U貫通し
フォトセンサ(7)を照射することになりピンホール(
5)の位置が検出される。上述の如くピンホール(5)
が光学的に検出されると、レーザビーム光(6)の出力
を例えば発振波長514.5nmのアルゴンガスレーザ
を用いた場合約2〜6 W / tyR程度に上昇せし
めピンホール(5)周縁の光半導体層(3)を浴融し、
該ピンホール【51を第5図のように埋設する。このピ
ンホール(51をW設した光半導体層)3)は・一旦V
−ザビーム光(61の輻射により溶融状態となりその後
自然冷却さiするので、アモルファス半導体から多結晶
子導体等に変質し接合形態も崩れ実質的に絶縁体とし−
Cf乍用することになる0然し乍ら、J折る変質面積は
1市の元′#L変換Vcを与する面積に較べ極めて小面
積であるために、特性的な観点からは無視しても何ら差
し支えない0
最後に、上述の如くピンホール(5)が埋設さJ’した
薄膜状うt半導体R131,plci eヲ2000〜
10000λ程度直空蒸着ぜしめ裏面1!極層(4)を
積層する(第6図)。If there is no hole (5), the beam source (6) will be absorbed by the photosemiconductor layer (3) and will not reach the photosensor (7), and vice versa. At the pinhole (5), the laser beam passes through the source 161U and irradiates the photosensor (7).
5) position is detected. Pinhole (5) as mentioned above
When the laser beam (6) is optically detected, the output of the laser beam (6) is increased to approximately 2 to 6 W/tyR when using an argon gas laser with an oscillation wavelength of 514.5 nm. bath melting the semiconductor layer (3);
The pinhole [51] is buried as shown in FIG. This pinhole (optical semiconductor layer with W provided with 51) 3) is once V
-The radiation of the beam light (61) causes it to enter a molten state, and then it cools down naturally, so it transforms from an amorphous semiconductor to a polycrystalline conductor, etc., and the bonding form collapses, making it essentially an insulator.-
However, since the J-fold altered area is extremely small compared to the area that gives the original '#L transformation Vc of one city, there is no harm in ignoring it from a characteristic point of view. No 0 Finally, as mentioned above, a thin film semiconductor R131 with a pinhole (5) embedded in it, plci eo 2000 ~
Approximately 10,000λ direct air evaporation on back side 1! Layer the pole layer (4) (Figure 6).
尚、上記実施例に於ける基板(1)はガラス、耐熱プラ
スチック等の透)′0性絶縁材料から成る場合について
説明したが、ステンレス等の金属材料から形成される際
に該金属材料に直接)”0半導体層(3)が被着形成さ
几、ピンホール(5)はレーザビームの反射量にL−り
検出さ第1.る。また光半導体J釦3)を溶融する手段
は上述の妬くレーザビームに限らず電子ビーム等のエネ
ルギビームであっても艮い。In the above embodiments, the substrate (1) is made of a transparent insulating material such as glass or heat-resistant plastic. )"0 After the semiconductor layer (3) is deposited, the pinhole (5) is detected depending on the amount of reflection of the laser beam. Also, the means for melting the optical semiconductor J button 3) is as described above. This applies not only to laser beams, but also to energy beams such as electron beams.
(Jう効 果
本発明は以上の説明から明らかなgo <、薄膜状光半
導体層の被着形成時に貫通して生じたピンホー A/
)WJ Rl:エオ、ルギビームの輻射により溶融し該
ピンホールを埋設した後上記薄膜状元半導体層上に軍、
極W4を積層ぜしめたので、上記元手導体層のピンホー
ル内への上記電極材の侵入を防止し、光半導体Nj!を
挾持する導電体の短絡事故を回避することができる0従
って、今まで短絡事故に19不艮品とさノしていたもの
を良品扱いとすることができ、製造時の歩留ケ力回上が
図2L、薄膜状光半導体層を用いたことによるコストダ
ウンと相俟ってLり一層の低廉化が可能となる。(The effect of the present invention is clear from the above description.) The pinhole A/
) WJ Rl: After melting by the radiation of Eo and Lugi beams and burying the pinholes, a film is formed on the thin film original semiconductor layer,
Since the pole W4 is laminated, the electrode material is prevented from entering into the pinhole of the base conductor layer, and the optical semiconductor Nj! Therefore, it is possible to avoid short-circuit accidents of the conductor that clamps the 19. Therefore, it is possible to treat products that were previously considered defective due to short-circuit accidents as non-defective products, and to reduce the yield rate during manufacturing. The top is shown in FIG. 2L, and together with the cost reduction by using a thin optical semiconductor layer, it is possible to further reduce the cost.
第1図はピンホールを有する従来構造を示し、同図(A
)は正面図、同図[8) &よ(〜に於けるA −A線
断面図、第2図乃至第6図は本発明製造方法を工程1@
に示す断面図で、Il+は送元性基板、(3)tまう゛
じ半導体層、(4)は表面篭極虐、(5)はピンホール
、(6)はレーザビーム元、を夫々示している0
第1図
tA+
(Bン第j’2c’1
と
第31.i
第4図
第5図Figure 1 shows a conventional structure with a pinhole;
) is a front view, the same figure [8)
In the cross-sectional view shown in , Il + indicates the transmitting substrate, (3) the solid semiconductor layer, (4) the surface obscurity, (5) the pinhole, and (6) the laser beam source. 0 Figure 1 tA+
(Bn No. j'2c'1 and No. 31.i Fig. 4 Fig. 5
Claims (1)
導電面に薄膜状光半導体層を被着形成する工程と、該薄
膜状光半導体層の被纏形成時Vcx通して生じたピンホ
ール周縁乞エネルギビームの輻射にエリ溶融し該ビンホ
ー/I/を埋設置−る工程と、該ピンホールが埋設され
た後上記薄膜状元半導体層上に電極層を積層する工程と
、から成る光半導体装置の製造方法。+11 A step of depositing a thin optical semiconductor layer on the conductive surface of a substrate having a conductive surface on at least one side 1j, and a step of forming a thin optical semiconductor layer on the conductive surface of the substrate, and removing a pinhole periphery generated through Vcx when forming the thin optical semiconductor layer. An optical semiconductor device comprising the steps of embedding the pinhole by melting it by radiation of an energy beam, and laminating an electrode layer on the thin film original semiconductor layer after the pinhole is buried. Production method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57147359A JPS5935490A (en) | 1982-08-24 | 1982-08-24 | Manufacture of photo semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57147359A JPS5935490A (en) | 1982-08-24 | 1982-08-24 | Manufacture of photo semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5935490A true JPS5935490A (en) | 1984-02-27 |
JPS6259901B2 JPS6259901B2 (en) | 1987-12-14 |
Family
ID=15428410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57147359A Granted JPS5935490A (en) | 1982-08-24 | 1982-08-24 | Manufacture of photo semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5935490A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4700463A (en) * | 1985-09-09 | 1987-10-20 | Fuji Electric Company Ltd. | Non-crystalline semiconductor solar battery and method of manufacture thereof |
US4725558A (en) * | 1985-11-06 | 1988-02-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor defects curing method and apparatus |
US4937651A (en) * | 1985-08-24 | 1990-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device free from the current leakage through a semiconductor layer and method for manufacturing same |
-
1982
- 1982-08-24 JP JP57147359A patent/JPS5935490A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4937651A (en) * | 1985-08-24 | 1990-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device free from the current leakage through a semiconductor layer and method for manufacturing same |
US4700463A (en) * | 1985-09-09 | 1987-10-20 | Fuji Electric Company Ltd. | Non-crystalline semiconductor solar battery and method of manufacture thereof |
US4725558A (en) * | 1985-11-06 | 1988-02-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor defects curing method and apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPS6259901B2 (en) | 1987-12-14 |
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