JPS5935468A - Manufacture of solid-state image pick up element - Google Patents

Abstract

PURPOSE:To obtain the titled element having a scarce picture defect by a method wherein channel obstructing P type impurity ions are implanted excluding the places desired to form the bulk channels of perpendicular registers and overflow drain regions, etc., and after then, N type impurity ions are implanted to the whole surface to form the bulk channels. CONSTITUTION:An SiO2 film 11a is adhered on a P type Si substrate 11, and first polycrystalline Si layers 12 are deposited corresponding to the overflow drain regions 14 and the perpendicular register regions 13 to be formed afterwards. Then after P type impurity ions are implanted to overflow control gate regions 15 using the first layers as the mask, the layers 12 on the regions 13 are etched. After then, N type impurity ions are implanted to the whole surface to convert the regions 13 into the N type and the regions 15 into the N<-> type, and then a second polycrystalline Si layer is adhered selectively to form a first electrode 16. After a second electrode 17 is provided by adhering selectively a third polycrystalline Si layer similarly, the transfer parts of the regions 13 are formed in a self-alignment manner.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a method for manufacturing a solid-state image sensor, and in particular, it is possible to manufacture a solid-state image sensor that is excellent in handling charge amount and dynamic range, and also improves yield. This is what I did.

BACKGROUND ART AND PROBLEMS In solid-state imaging devices equipped with overflow drains to eliminate plumping, ion implantation is repeatedly performed in connection with the overflow drains and buried channels of vertical registers (transfer registers). Omata Oats-70 had the disadvantage of easily causing defects.
- In the drain region, the ion implantation depth XJ is deep, so picture elements that handle a small amount of charge are likely to occur, and for this reason, in frame transfer type solid-state image sensors, the so-called hot rod generation rate is high due to these picture elements. Let's think about these things using specific examples.

Fig. 1 and Fig. 2 show image parts of a conventional frame transfer type solid-state image sensor. - Vertical register (2) on main surface side,
An overflow control dirt region (3) and an over 70-drain region (4) are formed, respectively. An insulating layer (
5) is deposited, and a first electrode (6) is deposited on top of the insulating layer (5).
) and the second electrode (7) are repeatedly formed. Of course, these electrodes (6) and (7) are the above-mentioned vertical register (2),
It is provided perpendicularly to the overflow control C-) region (3) and the overflow drain region (4). In this example, the CCD operation is performed in two phases, and a transfer section of 9 COD is formed by the self-line. That is, the electrode (6) (
7) is used as a mask to dope a P-type impurity, such as a pyrone, so that the bulk potential of the vertical resistor (2) is made shallow in a portion corresponding to the transfer portion. The doping positions of the above-mentioned pyrone are indicated by scattered dots.

In this example, the bulk potential is as shown in FIG. If light exceeding the dynamic range is incident on this image area, signal charges will flow into the overflow drain region (
4) It is possible to avoid overflowing and thereby causing soluming.

The following steps were required to manufacture the above solid-state image sensor.

(2) A channel stopper is formed by implanting high-concentration ions into a P-type silicon substrate (1). This is for isolating the Channel Stopper output MO8 circuit.

■ Form a dart window. That is, the oxide film deposited on the silicon substrate is removed over the MO8 region of the output section and sensor section, and then a dirt oxide film is formed.

■ Ion implantation of N-type impurity 1, for example, phosphorus. In this ion implantation, ions are implanted only in the region of the vertical register (2) to form a buried channel for the vertical register (2).

■ Ion-implant phosphorus into the region corresponding to the overflow drain region (4).

■ Vertical register (2), overflow control? '-) ion implantation of phosphorus into the region (3) and the overflow drain region (4). Different bulk potentials can be formed in the vertical register (2), overflow drain region (4), and overflow control region M (3) by this ion implantation according to (1) and the above-mentioned ion implantations (2) and (2). In other words, three ion implantations are required to give different potentials to these.

(2) Next, the first electrode (6) is formed by selectively depositing polycrystalline silicon.

(2) A second electrode (7) is formed in the same manner.

(2) Using the first electrode (6) and the second electrode (7) as masks, boron ions are implanted into the self-alignment line.

In this way, a transfer section is formed by channel pinching.

■ Form the source and drain of the output circuit.

[Phase] Open the contact window.

(2) Form a stain electrode using an aluminum electrode in the above-mentioned contact area.

The conventional solid-state imaging device shown in FIGS. 1 and 2 is thus constructed.

Generally, image defects occur due to problems in the formation process of the vertical register (2) and the buried channels in the overflow drain region (4). In the above-mentioned example, since ion implantation is repeatedly performed when forming such a portion, image defects occur frequently and the yield rate deteriorates. Also, as understood from the above process, since boron ions will be implanted later for channel pinching, the potential well in the overflow drain region (4) is deepened by the amount that the stain level is lifted by the ion doping. However, it is necessary to deeply implant ions at a high concentration in this area. For this reason, there is a problem in that the incidence of so-called black bars increases as described above.

OBJECTS OF THE INVENTION The present invention has been made in consideration of the above-mentioned circumstances, and is intended to simplify the process of forming vertical registers and overflow drain regions and to prevent single-image defects from occurring. It also aims to eliminate the occurrence of so-called point bars in frame transfer type solid-state imaging devices by eliminating high-concentration ion implantation in the overflow drain region.

Summary of the Invention The method of manufacturing a solid-state image sensor of the present invention leaves a polycrystalline silicon layer on a semiconductor substrate with an insulating film interposed therebetween, and forms an overflow drain region with this polycrystalline silicon layer.

This manufacturing method includes a process in which a polycrystalline silicon layer is provided on a semiconductor substrate with an insulating film interposed therebetween, a region of this polycrystalline silicon layer corresponding to an overflow control gate region is removed, and then the threshold voltage of this region is controlled. a step of removing a region of the polycrystalline silicon layer corresponding to the transfer channel portion to form a buried channel region;
A step of forming a transfer electrode in a direction perpendicular to the transfer direction of the transfer channel portion is included.

In this invention, the number of defects in one image is reduced, and when applied to a frame transfer type, the so-called black frame occurrence rate is reduced. Moreover, the amount of charge handled during transfer is increased, which is improved, and the sensitivity and dynamic range are also improved.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings from FIG. 4 onwards. In this example, ions of an impurity such as zolon for blocking the channel are implanted using a mask except for the vertical resistor and the overflow drain region where the bulk channel is to be formed, and then phosphorus, for example, is implanted into the entire surface to form the bulk channel. I try to do that.

In this example, first, a semiconductor substrate of the first conductivity type, for example, a P-type silicon substrate (see FIG. 4A) is prepared.

Then, a gate window is opened in this silicon substrate Ql). This opening of the gate window is done by etching the 8102 film for the field part, just as it was done in LOGO8. Next, a P-type impurity is implanted to form a channel stop region. This channel stop area is the output MO
It is not intended to isolate eight circuits.

Next, as shown in FIG. 4A and FIG. )
do. This is provided over the over 70-drain region α◆ and the direct resistor υ (see Eε in FIG. 4). Thereafter, using the first polycrystalline silicon layer aφ as a mask, P-type impurities such as boron are ion-implanted into the overflow control dirt region 0→ (FIG. 4B). After this, the first polycrystalline silicon layer (6) is etched in the area of the vertical register 01 (FIG. 4C). Thereafter, the entire surface is doped with an N-type impurity, such as phosphorus, and the vertical register () is made into an N shadow region, and the overflow control dirt region (g) is made into a W region (FIG. 4D). After this, a second polycrystalline silicon layer is selectively deposited to form the first electrode M (see FIG. 4E), and then a third polycrystalline silicon layer is selectively deposited to form the second electrode M. α (see Figure 6) is formed.

Thereafter, the transformer 77 portion of the vertical register α field is formed in a cell alignment manner. That is, the first electrode 0 → and the second electrode O
I) is used as a mask to ion-implant a P-type impurity 1, such as zolon. After that, the source and drain of the output circuit are formed, a contact window is opened, and a stain electrode is formed using an aluminum electrode in this contact portion.

A solid-state image sensing device constructed in this manner is shown in FIG. In this Fig. 6, the upper part of Fig. 2 is the image part, and the lower part is the storage part (◇In this example, the first polycrystalline silicon layer in the overflow drain region α→)
When we add a positive potential to .

The bulk potential along the left-right direction in FIG. 6 is as shown in FIG. 6A. On the other hand, when a negative potential is applied to the first polycrystalline silicon layer (6), a bulk potential as shown in FIG. 6B is obtained.

Such a solid-state image sensor can be used in the following manner. First, in the light reception mode, the potential of the overflow drain region α◆ is set deeply (Fig. 6A).

On the other hand, in transfer mode, the overflow drain region α→
(Figure 6B). In this way, even if excessive light is incident during the light receiving mode and pluming is about to occur, the excess signal charge will overflow to the overflow drain region Q♦, thereby avoiding such a problem. On the other hand, in the transfer mode, the overflow drain region α serves as a barrier. That is, signal charges that would overflow only by the barrier of the overflow control gate region α0 can be reliably transferred by the barrier of the overflow control gate region θ◆. This is the vertical register α→
This means that even if the amount of electric charge handled in a part of the process becomes extremely small, the generation of so-called hot rods will no longer occur.

In this solid-state image sensor, it is also conceivable to form a barrier in the overflow drain region α→ in the light receiving mode (FIG. 6B). This is because the barrier in the overflow drain area α acts as a so-called overflow control dart.

(Originally no overflow control) The a area o→ means that it functions as a storage section.

Therefore, the lighting area is wide and the sensitivity is increased.

Moreover, this solid-state image sensor can widen the dynamic range. That is, by controlling the potential of the overflow drain region α, it is possible to adjust the amount of accumulated charge relative to the amount of light. That is, it is a knee effect. The potential of the overflow drain region a4 is changed according to the photographing environment.

This allows you to take a wide range of shots, from bright to dark.

In addition, in this example, since the overflow drain region α is formed by an electrode, it is not necessary to repeatedly perform ion implantation, and two-image defects can be suppressed. Moreover, when implanting boron, for example, to form the entire overflow control gate region (g), the cell 7 alignment is applied with the first polycrystalline silicon layer a, so the above-mentioned effect is even more pronounced. becomes.

In addition, in connection with the above, it is necessary to implant ions at a high concentration into the overflow drain region α→, which eliminates the short channel effect and, in particular, prevents the generation of hot rods that tend to occur in frame transfer type solid-state imaging devices. It will be lost.

In addition, in the above example, the area where the buried channel will not be formed is pre-filled. After injecting phosphorus, etc., a channel was formed by injecting phosphorus, etc. over the entire surface. However, the buried channel may be formed in the substrate by selectively injecting phosphorus or the like through a mask in advance.

In this case, eight mask steps are required as described below.

■ Form a buried channel by selectively implanting silicon ions through a mask.

■ Selectively deposit the first polycrystalline silicon layer.

The selectively deposited areas are the overflow drain area 0♦ and the vertical register (g) as described above. Using the polycrystalline silicon layer Oa described in 1 below as a mask? ion implantation.

■ Vertical register α polycrystalline silicon layer in the area of hemorrhoids (b)
etching. Incidentally, when a three-phase COD operation is performed, the first electrode is formed in this step.

(2) Selectively deposit a polycrystalline silicon layer to form the first electrode OQ.

② Form the second electrode α force in the same way.

■ Form the source and drain of the output circuit.

■ Open the contact window.

(2) Form a stain electrode using an aluminum electrode in the above-mentioned contact area.

Effects of the Invention As described above, in the present invention, a part of the first polycrystalline silicon layer is removed and left, and by applying a predetermined potential to it, the geobar 70-drain can be formed. ing. therefore.

There is no need to repeat ion implantation. However, the overflow control f-)-4f is formed by self-fabricating the first polycrystalline silicon layer. This result 2
Image defects are reduced. Further, since it is not necessary to perform deep ion implantation in the overflow drain region, the short channel effect is reduced, and in particular, the generation of so-called hot rods can be suppressed in the frame transfer type.

Further, depending on how a potential is applied to the first silicon layer left after being removed, the amount of charge handled during transfer increases, but the amount of charge can be improved. Similarly, sensitivity and dynamic range are improved.

[Brief explanation of drawings]

FIG. 1 is a plan view showing a conventional solid-state image sensor, FIG. 2 is a similar cross-sectional view, and FIG. 3 is a similar potential distribution diagram. FIG. 4 is a sectional view showing one embodiment of the present invention, and FIGS. 5 to 7 are views for explaining the example shown in FIG. a is a silicon substrate, (lla) is an insulating film, (6) is a first polycrystalline silicon layer, a'3 is a vertical resistor, 0
4 is an overflow drain region, 0 o'clock is an overflow control dirt region, αQ is a first electrode, and θ is a second electrode. Figure 1 Figure 2 Figure 3 Figure 4 14 13 fs November 5, 1981 1. Display of the case Patent Application No. 145935 of 1982 2, Title of the invention Method of manufacturing solid-state image sensor 3, Person making the amendment Relationship to the case Patent applicant address 6-7-35, Kitashinyo, Tokyo Parts Ward Name (21
g) Sony Corporation Representative Director Norio Ohga 4, Agent 1-8-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo (
Shinjuku Building) Tokyo (03) 343-5821 (Representative)
8. Contents of correction As shown in the attached sheet, a polycrystalline silicon layer is placed on the substrate through an insulating film, and after removing the region corresponding to the overflow four-μm control gate portion of the polycrystalline silicon layer, the threshold value of the region is performing voltage control processing, removing a region of the polycrystalline silicon layer corresponding to the transfer channel portion to form a buried channel portion, and forming a transfer electrode in a direction perpendicular to the transfer direction of the channel portion; A method for manufacturing a solid-state imaging device, characterized in that processing is performed so that a region in the substrate corresponding to the remaining portion of the polycrystalline silicon layer becomes the overflow drain portion. 290-

Claims (1)

[Claims] A polycrystalline silicon layer is provided on the substrate via an insulating film, and after removing a region of the polycrystalline silicon layer corresponding to the overflow drain portion, a process is performed to control the threshold voltage of the region, and the polycrystalline silicon layer is removing a region of the silicon layer corresponding to the transfer channel portion to form a buried channel portion;
A transfer electrode is formed in a direction perpendicular to the transfer direction of the channel portion, and processing is performed so that a region in the substrate corresponding to the remaining portion of the polycrystalline silicon layer becomes the over-70-drain portion. A method for manufacturing a solid-state image sensor.