JPS61229355A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS61229355A
JPS61229355A JP60070245A JP7024585A JPS61229355A JP S61229355 A JPS61229355 A JP S61229355A JP 60070245 A JP60070245 A JP 60070245A JP 7024585 A JP7024585 A JP 7024585A JP S61229355 A JPS61229355 A JP S61229355A
Authority
JP
Japan
Prior art keywords
substrate
region
type
channel
charge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60070245A
Other languages
Japanese (ja)
Inventor
Mitsuo Nakayama
光雄 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60070245A priority Critical patent/JPS61229355A/en
Publication of JPS61229355A publication Critical patent/JPS61229355A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14887Blooming suppression

Abstract

PURPOSE:To enable to prevent the smear charge generated in the deep part of the substrate from intruding into the scanning line by a method wherein an impurity region, which is used as the drain of the smear charge, is provided between the photo diode and the scanning line and is electrically connected to the substrate. CONSTITUTION:A P-type region 13 is formed in an N-type substrate 12 and the buried CCD is formed of a photo diode region 14, the transfer channel 15 of the buried CCD, a gate oxide film 16, a polycrystalline Si electrode 17, which functions both as the readout gate and transfer gate of the channel 15, and so forth in the region 13. Moreover, N-type drain regions 22 to be electrically connected with the substrate 12 are formed on the side of the substrate to the photo diode 14. By this way, a positive voltage to the region 13 is impressed on the substrate 12 and when the diode 14 is fully filled with signal charge by a strong incident light, the excess charge is prevented from being swept out in the substrate 12 via the regions 22 and the smear charge is prevented from intruding into the channel 15.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は固体撮像装置に係わり、特にそのスミア−特性
の改善に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to solid-state imaging devices, and particularly to improving the smear characteristics thereof.

従来の技術 第3図は従来の固体撮像装置としての縦形0FD(0v
er FIOW Drain )構造を有するIL−C
ODの単位画素の断面構造を示す概略図である。
Conventional technology Figure 3 shows a vertical 0FD (0v
IL-C with FIOW Drain) structure
FIG. 2 is a schematic diagram showing a cross-sectional structure of a unit pixel of OD.

とこで1はN形基板、2はP影領域(1)、3はP影領
域(2)、4はフォトダイオード、6はCODの転送領
域、6はゲート酸化膜、7はポリS1電極、8はフィー
ルド酸化膜、9はチャンネルストップ、1oは層間絶縁
膜、11は遮光膜である。従来例では、2のP影領域(
1)はフォトダイオード4が信号電荷で満杯になったと
き、1のN基板にパンチスルーで過剰な信号電荷が流れ
出すように適切な不純物濃度と厚みがとられている。そ
して3のP影領域(2)は、2のP影領域(1)に比較
して、不純物濃度が濃く、厚みも厚くなっている。この
ため、フォトダイオード直下は空乏化し、過剰信号電荷
はに基板側に抜き出すことができ、フォトダイオード以
外の部分は空乏化されない。また、長波長の入射光が基
板深部に達し、発生させる信号電荷が転送領域に侵入す
るのをP影領域(2)のポテンシャルバリアーで阻止さ
せようとしている。(例えば特開昭57−55672号
公報、特開昭68−125962号公報、特開昭58−
125976号公報)しかし、強い入射光が入射した場
合、基板深部で発生する電荷が大量となり、この電荷が
転送領域に流入するのを完全に阻止することはできない
。このように、正規の信号電荷を転送中の転送領域に外
部から新たな電荷が侵入してくると、撮像画面上に弱い
白線となってあられれるスミア−という現象を起こす。
Here, 1 is an N-type substrate, 2 is a P shadow region (1), 3 is a P shadow region (2), 4 is a photodiode, 6 is a COD transfer region, 6 is a gate oxide film, 7 is a poly S1 electrode, 8 is a field oxide film, 9 is a channel stop, 1o is an interlayer insulating film, and 11 is a light shielding film. In the conventional example, the P shadow area of 2 (
1) has an appropriate impurity concentration and thickness so that when the photodiode 4 is full of signal charges, excess signal charges flow out through punch-through to the N substrate of 1. The P shadow region (2) of No. 3 has a higher impurity concentration and is thicker than the P shadow region (1) of No. 2. Therefore, the area immediately below the photodiode is depleted, excess signal charges can be extracted to the substrate side, and the area other than the photodiode is not depleted. Furthermore, the potential barrier in the P shadow region (2) is intended to prevent the long-wavelength incident light from reaching the deep part of the substrate and the generated signal charges from entering the transfer region. (For example, JP-A-57-55672, JP-A-68-125962, JP-A-58-
125976) However, when strong incident light is incident, a large amount of charge is generated deep in the substrate, and it is not possible to completely prevent this charge from flowing into the transfer region. In this way, when new charges enter the transfer area from the outside where normal signal charges are being transferred, a phenomenon called smear occurs, which appears as a weak white line on the image pickup screen.

発明が解決しようとする問題点 このような従来の縦形OFD構造では、P影領域(2)
のポテンシャルバリアーで、基板深部で発生したスミア
−電荷の侵入を完全に阻止することはできず、実用上必
要とされる値対信号比00Oo1%に対し0.1〜0.
01%のオーダーである。
Problems to be Solved by the Invention In such a conventional vertical OFD structure, the P shadow area (2)
It is not possible to completely prevent the penetration of smear charges generated deep into the substrate with a potential barrier of 0.1-0.
It is on the order of 0.01%.

本発明はかかる点に鑑みてなされたもので、固体撮像装
置のスミア−特性の改善を図る新規なる構造を提供する
ことを目的としている。
The present invention has been made in view of these points, and an object of the present invention is to provide a novel structure for improving the smear characteristics of a solid-state imaging device.

問題点を解決するための手段 本発明は上記問題点を解決するため、フォトダイオード
と走査フィンとの間に、スミア−電荷のドレインとなり
うる不純物領域を設け、基板に電気的に接続したもので
ある。
Means for Solving the Problems In order to solve the above problems, the present invention provides an impurity region between the photodiode and the scanning fin that can serve as a drain for smear charges, and is electrically connected to the substrate. be.

作用 本発明は上記した構成により、長波長光の入射により基
板深部で発生したスミア−電荷が走査ラインに侵入する
のを、基板電位をコントロールすることKより、上記ス
ミア−・ドレインに取り込み阻止する。
Function: With the above-described configuration, the present invention prevents smear charges generated deep in the substrate due to the incidence of long-wavelength light from entering the scanning line by controlling the substrate potential. .

実施例 本発明の一実施例における固体撮像装置を第1図に示す
。ここでN、形基板12に、ボロンのイオン注入や、S
lのエピタキシャル成長等によりP影領域13を形成し
、このP影領域中に以下のcanを形成して行く。14
はn形不純物拡散層よりなるフォトダイオード領域、1
6はn形不純物拡散層よりなる埋め込みCCDの転送チ
ャネル、16はゲート酸化膜、17はフォトダイオード
14からCODの転送段16への読み出しゲートとCC
DCCDチャネル15送ゲートを兼ねるポリS1電極、
18は厚いフィールド酸化膜、19はチャネルストップ
、2oはpsCtやNSG等で形成される層間絶縁膜、
21はムlやMo等の光遮蔽効果の高い薄膜で形成され
る遮光膜である。さらに、フォトダイオード14の周囲
の基層側には、n形の不純物拡散層よりなるn形ドレイ
ン領域22が形成されN形基板12と電気的に接続され
ている。
Embodiment A solid-state imaging device according to an embodiment of the present invention is shown in FIG. Here, boron ion implantation and S
A P shadow region 13 is formed by epitaxial growth of 1, and the following cans are formed in this P shadow region. 14
is a photodiode region made of an n-type impurity diffusion layer, 1
6 is a transfer channel of the buried CCD made of an n-type impurity diffusion layer, 16 is a gate oxide film, and 17 is a read gate and CC from the photodiode 14 to the COD transfer stage 16.
Poly S1 electrode that also serves as DCCD channel 15 transmission gate,
18 is a thick field oxide film, 19 is a channel stop, 2o is an interlayer insulating film formed of psCt, NSG, etc.
Reference numeral 21 denotes a light-shielding film formed of a thin film having a high light-shielding effect, such as Mulberry or Mo. Furthermore, an n-type drain region 22 made of an n-type impurity diffusion layer is formed on the base layer side around the photodiode 14 and is electrically connected to the n-type substrate 12 .

n形ドレイン領域22とフォトダイオード14゜CGD
チャネA/15の間においては、フォトダイオード14
が信号電荷で満杯になったとき、CCDチャネ/l/1
5との間ではバンチスルーせず、フォトダイオード14
との間でのみパンチスルーモードとなりフォトダイオー
ド14の過剰電荷をドレイン領域22を通してN形基板
12に掃き出すように、フォトダイオード14やCCD
チャネル15、n形ドレイン22.P影領域13の不純
物濃度や相互の距離を最適設計する。
N-type drain region 22 and photodiode 14°CGD
Between channels A/15, photodiode 14
When is full of signal charges, CCD channel/l/1
There is no bunch through between the photodiode 14 and the photodiode 14.
The photodiode 14 and CCD
Channel 15, n-type drain 22. The impurity concentration of the P shadow region 13 and the mutual distance are optimally designed.

ここで動作を簡単に説明する。第1図の実施例はX L
 −I Cfl型の2次元固体撮像装置であるからτV
の標準走査方式に従って光積分された入射光はフォトダ
イオード14に蓄積され、読み出しパルスを読み出しゲ
ート17に印加することにより、canチャネ/L’1
5に転送され、その後垂直転送され、水平走査回路を経
由して画像信号として外部に取り出される。一方N形基
板12には、P影領域13に対して正の電圧Vgubが
印加され、強い入射光によりフォトダイオード14が信
号電荷で満杯になったとき、過剰電荷をn形ドレイン2
2を経由してN形基板12に掃き出したり、P影領域深
部に入射した長波長光により発生した電荷が、キャリア
の拡散により周囲のCCDチャネル16に侵入するのを
阻止する。第2図は、第1図における水平方向断面1−
I線上の電位分布を示したものである。強い入射光3o
により発生したフォトダイオード14周辺のスミア−電
荷32は、曲線35の電位分布が示すように、ドレイン
220所で高くなっている電位に吸い込まれる。
The operation will be briefly explained here. The embodiment shown in FIG.
-I Since it is a Cfl type two-dimensional solid-state imaging device, τV
The incident light that has been optically integrated according to the standard scanning method is accumulated in the photodiode 14, and by applying a readout pulse to the readout gate 17,
5, then vertically transferred, and taken out as an image signal to the outside via a horizontal scanning circuit. On the other hand, a positive voltage Vgub is applied to the N-type substrate 12 with respect to the P shadow region 13, and when the photodiode 14 is full of signal charges due to strong incident light, excess charges are transferred to the n-type drain 2.
Charges generated by long-wavelength light that are swept out to the N-type substrate 12 via the P-type substrate 12 or entered deep into the P-shadow region are prevented from entering the surrounding CCD channel 16 by carrier diffusion. Figure 2 shows the horizontal cross section 1- in Figure 1.
This shows the potential distribution on the I line. strong incident light 3o
The smear charge 32 generated around the photodiode 14 is absorbed by the high potential at the drain 220, as shown by the potential distribution of the curve 35.

上記実施例と同様の効果は、受光部をMOSキャパシタ
で構成したものにおいても、その周囲をn形ドレインで
囲むことにより得られる。
Effects similar to those of the above embodiment can also be obtained by surrounding the light receiving section with an n-type drain even when the light receiving section is constituted by a MOS capacitor.

発明の効果 以上のように、本発明によれば、7オトダイオードの周
囲の一部又は全部をn形のドレインで囲むことにより、 (1)P形基板領域深部に入射した長波長光により発生
した電荷が周囲の走査ラインに侵入するのをn形ドレイ
ンに吸い込み阻止でき、また(2)強い入射光によりフ
ォトダイオードからあふれ出す過剰信号電荷をn形ドレ
インを通してN基板に掃き出す。
Effects of the Invention As described above, according to the present invention, by surrounding part or all of the 7-otodiode with an n-type drain, (1) light generated by long-wavelength light incident deep into the P-type substrate region; (2) Excess signal charges overflowing from the photodiode due to strong incident light can be swept out to the N substrate through the n-type drain.

以上のことより、スミア−、プルーミングを阻止するこ
とができ、撮像画面の大幅な画質の向上が図れる。
As described above, smearing and pluming can be prevented, and the image quality of the captured screen can be significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

12・・・・・・N形基板、13・・・・・・P影領域
、14・・・・・・フォトダイオード、16・・・・・
・CODチャネル、22・・・・・・n形ドレイン。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 3θ 第3図 /N基歓
12...N-type substrate, 13...P shadow area, 14...photodiode, 16...
・COD channel, 22...n-type drain. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3θ Figure 3/N Kikan

Claims (1)

【特許請求の範囲】[Claims] 一導電形の第1の半導体基板上に形成された反対導電形
の第2の半導体基板上に、前記第1の半導体基板と同一
の導電形のダイオード領域と前記ダイオード領域に蓄積
された信号電荷を走査する走査ラインを有し、前記ダイ
オード領域の周囲の一部又は全部を前記第1の半導体基
板と同一の導電形の領域で囲み、かつ第1の半導体基板
と電気的に接していることを特徴とする固体撮像装置。
A diode region of the same conductivity type as the first semiconductor substrate and a signal charge accumulated in the diode region are formed on a second semiconductor substrate of an opposite conductivity type formed on a first semiconductor substrate of one conductivity type. The diode region has a scanning line for scanning, a part or all of the periphery of the diode region is surrounded by a region of the same conductivity type as the first semiconductor substrate, and is in electrical contact with the first semiconductor substrate. A solid-state imaging device featuring:
JP60070245A 1985-04-03 1985-04-03 Solid-state image pickup device Pending JPS61229355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60070245A JPS61229355A (en) 1985-04-03 1985-04-03 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60070245A JPS61229355A (en) 1985-04-03 1985-04-03 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS61229355A true JPS61229355A (en) 1986-10-13

Family

ID=13425985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60070245A Pending JPS61229355A (en) 1985-04-03 1985-04-03 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS61229355A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63142858A (en) * 1986-12-05 1988-06-15 Matsushita Electronics Corp Solid-state image sensing device
JPH02199869A (en) * 1989-01-30 1990-08-08 Nec Corp Solid state image sensor
JPH02218162A (en) * 1989-02-20 1990-08-30 Nec Corp Solid-state image sensing element
EP0696820A1 (en) * 1994-08-08 1996-02-14 Matsushita Electronics Corporation Solid-state imaging device and method of manufacturing the same
JP2002329854A (en) * 2001-04-26 2002-11-15 Fujitsu Ltd Solid-state image pickup apparatus
JP2005183922A (en) * 2003-11-28 2005-07-07 Seiko Epson Corp Solid state image sensor and its manufacturing method
JP2006229105A (en) * 2005-02-21 2006-08-31 Sony Corp Solid-state imaging device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766666A (en) * 1980-10-13 1982-04-22 Matsushita Electronics Corp Solid state image pickup device
JPS60154579A (en) * 1983-12-20 1985-08-14 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766666A (en) * 1980-10-13 1982-04-22 Matsushita Electronics Corp Solid state image pickup device
JPS60154579A (en) * 1983-12-20 1985-08-14 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63142858A (en) * 1986-12-05 1988-06-15 Matsushita Electronics Corp Solid-state image sensing device
JPH02199869A (en) * 1989-01-30 1990-08-08 Nec Corp Solid state image sensor
JPH02218162A (en) * 1989-02-20 1990-08-30 Nec Corp Solid-state image sensing element
EP0696820A1 (en) * 1994-08-08 1996-02-14 Matsushita Electronics Corporation Solid-state imaging device and method of manufacturing the same
JP2002329854A (en) * 2001-04-26 2002-11-15 Fujitsu Ltd Solid-state image pickup apparatus
JP4489319B2 (en) * 2001-04-26 2010-06-23 富士通マイクロエレクトロニクス株式会社 Solid-state imaging device
JP2005183922A (en) * 2003-11-28 2005-07-07 Seiko Epson Corp Solid state image sensor and its manufacturing method
JP4639664B2 (en) * 2003-11-28 2011-02-23 セイコーエプソン株式会社 Solid-state imaging device
JP2006229105A (en) * 2005-02-21 2006-08-31 Sony Corp Solid-state imaging device

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