JPS5935430A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the generation of a minute pyramid, and to obtain a practical recessed section by selective etching, etching the (110) face of an Si substrate in an anisotropic manner at rates Vd, Vc (<Vd) and sightly making Vd/Vc larger than cot beta/sintheta in an angle theta that a projected line to a bottom of an edge line formed by inclined planes of a face angles beta forms together with a crossed line with the bottom. CONSTITUTION:When a (110) face is etched in an anisotropic manner, an equivalent pyramid surface is formed in edge sections and the bottom of a groove 3. The pyramid satisfies l=t1 Vcsintheta, m=n.cotbeta, n=n.cotbeta, n=t1Vd after time t1, and the pyramid does not change or disappears because l>=m is formed. That is, (Vd/Vc)>=(cotbeta/sintheta) is formed. When a (313) face is selected as the inclined plane, Vc/Vd >=1.01 is formed from beta and theta, and a KOH-isopropyl alcohol group etching liquid in KOH concentration of 33-36wt% is practical for the formation of said formula. When using the (110) face, a KOH-H2O group is used, and a Br2-CH3OH group is used and a GaAs substrate is etched similarly on the GaAs substrate. According to the method, the generation of the ninute pyramid is prevented, even the errosion of the edge sections is inhibited up to a minimum limit, and the practical recessed section can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an anisotropic etching method suitable for preventing the generation of micropyramids.

High-voltage semiconductor integrated circuits such as semiconductor communication path devices have a working voltage of approximately 400 V and a current capacity of approximately 200 mA.
High speed is also required since it handles high frequencies.

Therefore, dielectric isolation is used to isolate individual elements of semiconductor integrated circuits.

First, referring to FIG. 1, a conventional dielectric isolation method will be explained using silicon as an example of a semiconductor.

As shown in FIG. 1 (ω), an oxide film 2 is formed by thermal oxidation on a silicon substrate 1 with a single crystal plane (100).Next, a window from which the oxide film 2 is removed in the 1101 direction is Next, isolation grooves 3a, 3b, and 3c are formed by an anisotropic etching method.The shape of the isolation grooves is V-shaped surrounded by the <(IIIJ plane) as shown in the figure.
The change in the groove shape as viewed from the 01 direction is automatically stopped.

Next, as shown in FIG. 1(b), after forming a thermal oxide film 2 again, a polycrystalline silicon 4 which will finally become a support is formed. Next, when the silicon substrate 1 is polished and removed to the position A-A, the dielectric isolation substrate 1 has the structure shown in FIG. 1(C).
Get 0. That is, the single crystal islands 1a to 1d have oxide films 28 to 1d.
2d and supported by polycrystalline silicon 4. Finally, as shown in (d), circuit elements and electrodes are formed by a known method to obtain a semiconductor integrated circuit chip 11.

Next, the anisotropic etching method related to the present invention will be explained in detail with reference to FIG.

In the figure, a separation groove 3 is provided in the <110> direction of a silicon substrate 1 whose main surface is the (100) plane of a single crystal. If the width of the oxide film 2, which is a mask material for the etching solution, is t1, and the final groove depth is d, then the groove is V-shaped surrounded by (111) planes, which is a crystallographic relationship. . In the straight groove portion, etching substantially stops when the (111) plane, which has the slowest etching rate, appears, and a V-shaped groove with good shape accuracy can be formed. By the way, at the part where the separation grooves intersect, (100) and (11
In addition to 1), a third crystal plane (hkt) appears. There are various theories regarding the index of this aspect depending on the liquid used, and it is not clear. However, the etching speed of this surface is (111) speed of surface < (hkt) speed of surface < (100)
There is a relationship between surface speeds. If the third crystal plane (hkt) is severely etched, the corners of the monocrystalline islands will become rounded, and the area in which individual elements such as resistors, diodes, transistors, thyristors, etc. can be formed becomes narrower. The etching solution used is a mixture of potassium hydroxide (KOH) aqueous solution and alcohol heated to 70 to 8 degrees centigrade.

Two problems in the above anisotropic etching method will be explained.

FIGS. 3(a) and 3(b) show a partial surface of the dielectric isolation substrate 1o and a cross section taken along the line B--B, respectively.

This shows an example in which each single crystal island ln is connected without being insulated. As shown in (b), the cause of this is the micropyramid 7 (which has a pyramid shape as shown in Figure 5) in the separation groove, so it is thought to be due to this defect, but it is accidental and occurs frequently. Although it is impossible to completely identify the cause, one chip normally contains several dozen single crystal islands, and only one micropyramid 7 occurs, resulting in poor insulation. The chip becomes defective. If the micropyramid 7 is small, it is possible to completely separate it by increasing the amount of polishing. If the micropyramid 7 is large, it is necessary to further increase the amount of polishing, and in this case , secondary problems occur such as the area of the single crystal island becoming smaller and the thickness of the single crystal island becoming thinner, and in the worst case, the entire dielectric isolation substrate 10 becomes defective.
When using an inch-sized silicon substrate, the number of micropyramids within the silicon substrate must be several or less. Qualitatively, when the concentration of KOH is lowered, micropyramids are more likely to occur.

FIGS. 4(a) and 4(b) show a partial surface of the dielectric isolation substrate 1o, which has a problem different from that in FIG. 3, and a cross section taken along the c-c cut line, respectively.

In this example, there is no insulation defect due to the micropyramid, but the corners of the single crystal island In are significantly eroded. The area of the single crystal island In is significantly narrower than the normal shape shown by the dotted line in the center. This phenomenon is often seen when the concentration of KOH is increased to prevent the generation of micropyramids. If the shape of the corner of the single crystal island 1n deteriorates and the reproducibility of the etching amount is poor as described above, the area for forming the individual elements must be placed inside with a margin, resulting in a decrease in the degree of integration. Furthermore, if the erosion of the angle is larger than planned, problems such as individual elements protruding beyond the single crystal island will occur.

The above problems occur not only when forming a dielectric isolation substrate, but also when forming a recess in a semiconductor substrate using anisotropic etching.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can prevent the formation of micropyramids and provide a practical recess shape. The present invention is characterized in that a practical etching solution composition capable of preventing the formation of micropyramids is determined by examining the crystallographic possibility of their disappearance based on the morphology of the micropyramids.

Next, the present invention will be explained based on the drawings.

First, the form of the micropyramid will be explained with reference to FIG. <a) and (b) respectively show the plane of the silicon substrate and the cross section taken along the cutting line DD.

In the example where the micropyramid 7 occurs on the bottom surface of the separation groove 3, the micropyramid 7 has an octahedral pyramid shape.

As a result of microscopic observation, it was estimated that the plane constituting the micropyramid 7 and the (hkt) plane generated at the corner of the single crystal island 1n are equivalent. Therefore, in order to identify the crystal planes constituting the micropyramid 7, the (hkA) plane at the corner of the single crystal island 1n, which has a large crystal plane and is easy to observe, is identified.

Here, the <110> direction of the single crystal island, the depth direction, that is, <
The etching speeds in the 100> direction are defined as V= and Va, respectively. That is, Va is the fastest etching speed, and ■ is the intermediate speed.

FIG. 6 shows the relationship between the KOH concentration and the intersection angle α and plane angle β between the (hkt) plane and the (100) plane. The definitions of α and β are shown in the inset. Although the plane angle β shows a substantially constant value even if the KOH concentration changes, the intersection angle α changes with the KOH concentration. K
The higher the OH concentration, the smaller the intersection angle α, and the monocrystalline island 1
This shows that if the erosion at the n corner is significant, the problem shown in FIG. 4 is less likely to occur. By the way, from this result, when the KOH concentration changes from 30 wt% to 40 wt%, the (hk/,) planes at the corners of the single crystal island In, that is, the planes constituting the micropyramid, are (212) and (313).

(414).

Next, the KOH concentration was changed to examine the occurrence of micropyramids. The reason for this is that in the process shown in FIG. 1, the height of the micropyramids is more important than the number of micropyramids.

Figure 7 shows the maximum value of etching time and micropyramid height h11+1! Indicates the relationship between Etching for 65 to 70 minutes results in a V-shaped groove, and the change in h□8 during this time is shown. In the 30.33wt% solution, the micropyramid remains at the end. At 34° and 35 wt%, the micropyramids finally disappear. It is shown that micropyramids do not occur in a 40 wt % solution.

From the above results, if the KOH concentration is set to 34% or more, the generation of micropyramids can be substantially prevented. However, as shown in Figure 6, the erosion of the corners of the single crystal islands increases, so the appropriate KOH concentration determined experimentally is 34
~35wt%.

Next, a crystallographic examination method that can determine the liquid conditions that can prevent the generation of micropyramids, not only for KOH-isopropyl alcohol but also for general liquids, will be explained.

Let's examine the conditions under which micropyramids grow or disappear.

Fig. 8 axis) shows that the crystal planes constituting the micropyramid are (
313) Microviny Y Mitsu)
'c7) (100) plane heno projection, (b) is (310)
A projection onto a surface is shown.

As shown in FIG. 5, if the etching rate at the corner of the single crystal island is V, then the etching rate at point A of the micropyramid, which corresponds to the groove bottom of this corner, can also be considered to be V. Here, the angle θ is defined as shown in the figure. That is, θ is the intermediate velocity V, and the intersection line of the two inclined crystal planes of the micropyramid is the (100) plane (base of m).
An imaginary line (dotted line) created by projecting onto
This is the angle between the crystal plane and the intersection line (solid line) formed with the bottom surface. Since the planes constituting the micropyramid and the (hkt) planes generated at the corners of the single crystal islands are equivalent and tangential, the angle θ is calculated as (hkt) in the inset of Figure 6.
This can be confirmed on the t) side. Note that β is the face angle β shown in FIG.

In (b), it is assumed that the micropyramid that existed at time t=O changes to the shape shown by the dotted line at t=t1. At this time, l, = tl ”Vm '5Lllθ −・
−・−(1) m=n・store β ・・・・・・
...(2) H=j1・Va...
(3) By the way, the size of the micropyramid does not change when t=m, and the size of the micropyramid does not change when t>m. Pyramids are disappearing. Therefore, the conditions under which the micropyramid does not become large are expressed by the following formula.

22m ・・・・・・・・・(4
) That is, tIVssinθ≧nootβ= tIVsinθ
Of+β, whether the micropyramid grows or not is determined by V −/V a.

Although it is assumed that the micropyramid in Figure 8 is composed of (313) planes, the definition regarding the angle can be applied to any plane composed of any plane. Since the concept is shown, once the crystal plane of the micropyramid is determined, it can be applied without being limited to the material of the semiconductor substrate or the type of etching solution.

By the way, the planes that make up the micropyramid are (313
), then β=46.5° and θ=71.6°.

Substituting this value into the fifth equation, we find that V −/V a≧1
．． 01 ・−・・−・−・(6) is obtained.

First, in Figures 6 and 7, we experimentally determined the appropriate etching solution composition when using a KOH-isopropyl alcohol-based etching solution, but this composition range was crystallographically correct. Check to see if it exists and find the composition of the etching solution that satisfies Equation 5.

FIG. 9 shows the relationship between KOHm degree and V, Va, V, /Va. The KOH concentration that satisfies equation (5) is approximately 34.3w
It is 1% or more. This result supports the results shown in Figure 7, and also shows that the constituent planes of the micropyramid are 34 to 34.
This shows that the assumption that it is a (313) plane is correct near 35 wt%.

By the way, in the above example, the amount related to the etching rate of the (hkL) plane was expressed as V, but this selection is arbitrary and f
i, (hkt) may be the etching rate of the plane itself (velocity in the direction perpendicular to the plane).

Further, since V- and Va change depending on the temperature of the etching solution, stirring conditions, etc., it is necessary to use them as factors for setting the etching conditions.

In the above example, KOH-isopropyl alcohol was used, but ethyl alcohol or the like can also be used. The KOH-isopropyl alcohol system is excellent in terms of preventing the formation of pyramids and reducing erosion of the corners of single crystal islands.

Also, although we have talked about the 5i (100) plane here, the 5i
It can also be applied to the case where a (110) plane is used, and when a KOH-H*0-based, hydrazine-based, ethylenediamine-pyrocatechol-based, NHaOH-H2O-based etching solution is used as the etching solution, the semiconductor substrate is G a A 8 , As the etching solution, f3r2-CHsOH system, H2B
The present invention can also be applied when using the O3H20x H20 system.

The optimal KOH concentration when theoretically estimated from Figure 8 is 34.3 wt%, and experimentally from Figure 7 it is 34.
It is 35wt%. As the KOHi degree decreases, it becomes easier for micropyramids to ultimately remain, but 33 in Figure 7
When wt%, the final hl,! is 12 μm, and at this level it can be eliminated by over-etching for about 5 minutes. Further, the amount of corner erosion when the KOH concentration is 36 wt% is only about 10 μtn larger than that when the KOH concentration is 34 wt%. In addition, KOH has strong hygroscopicity.
A reagent with a substantially low content of 6.actwt% may also be considered practical, and a solution with a concentration of 6.actwt% may also be practical. From the above results, considering the variations in liquid adjustment, etching, etc., the concentration of KOH is 33 to 36 wt.
% is practical.

According to the present invention described above, it is possible to prevent the occurrence of micropyramids during anisotropic etching of a semiconductor substrate, and to suppress erosion of the corners of a single crystal to a minimum level, thereby obtaining a practical concave shape. I can do it. Therefore, if applied to the production of dielectric insulating isolation substrates for semiconductor integrated circuits, the yield can be greatly improved and the degree of integration can also be improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of the dielectric isolation substrate showing the manufacturing process;
FIG. 2 is a perspective view showing a semiconductor substrate subjected to anisotropic etching, and FIGS. 3 to 4 show semiconductor substrates for explaining problems of the prior art, in which (a) is a surface view, and (b) )
is its cross-sectional view, Figure 5 shows the morphology of the micropyramid, (a) is a plan view of the semiconductor substrate, (b) is its cross-sectional view, and Figure 6 shows the KOH concentration and crystals at the corner of the single crystal island. Figure 7 shows the relationship between the etching time and the maximum height of the micropyramid, and Figure 8 schematically shows the micropyramid. D.(a)
9 is a plan view, FIG. 9 is a cross-sectional view, and FIG. 9 is a diagram showing the relationship between the KOH concentration and the etching rate of each crystal plane. 1... Semiconductor substrate, la, lb, lc, 1d, in.
・Single crystal island, 2, 2 a, 2 b, 2 C
, 2d”・Oxide film, 3, 3a, 3b, 3cm isolation groove,
4-...Polycrystalline silicon, 7...Micropyramid, 10...Dielectric separation substrate, 11...Semiconductor integrated circuit chip. Agent Patent Attorney Akio Takahashi 11iU ri12 Figure 13 Figure 6 KOH (wt%) 1 7 Figure 44 (1r) Figure 8 (α)

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor device that includes a step of forming a recessed portion in a semiconductor substrate by anisotropic etching, the fastest etching rate for the crystal plane of the semiconductor substrate is v4, and the intermediate etching rate is v4. With respect to the angle of the recess obtained by binding and etching, the speed is V, the bottom surface of the recess and the intermediate distance ■. β is the angle between the slope and the concave surface formed by
, an imaginary line formed by projecting a line of intersection between the slope and another slope of the recess formed by the intermediate speed V onto the bottom surface, and a line of intersection between the one slope and the bottom surface. The recess is formed using an etching solution in which the ratio of ■, /v- is equal to or slightly larger than the ratio of CKlt+β/sinθ, where θ is the angle formed by the semiconductor device. Production method. 2. The semiconductor device according to claim 1, wherein the semiconductor substrate is made of silicon whose main surface is a (100) plane, and the etching solution is a 33 to 36 wt% KOH aqueous solution-isopropyl alcohol system. manufacturing method.