JPS5933974A - Compressing circuit of picture data - Google Patents

Abstract

PURPOSE:To set a split picture to be compressed at an optional size and at the same time to decrease the processing time, by compressing a split picture obtained by cutting out a linear picture into a square form at each intersection of grating lines and a picture which is turned rectangularly to said split picture with a switch between both pictures. CONSTITUTION:A video signal S is obtained for each split picture obtained by cutting out a linear picture for every intersection of grating lines and into a square form of every plural picture elements and then reading the split picture after a raster scan. While a video signal S' is obtained by rotating rectangularly the split picture obtained from a video buffer 6 on the plane of the split picture. A switch circuit 2 supplies these two signals S and S' with a switch to a compressing circuit 3. The circuit 3 compresses the data of plural dots on each scanning line of the raster scan into data of plural dots arrayed in the subscanning direction. A compressing circuit 4 compresses the data of plural dots into data of 2 dots in response to the value of each prescribed region in the subscanning region. The compressed data is delivered via a buffer 5.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Technical Field of the Invention The present invention relates to an image data compression circuit used in an image processing system.

CB) Technology background Automatic installation H'I was used early on to design printed wiring patterns.
However, the proportion of printed wiring pattern design in the design of computers, etc. has been increasing recently, and therefore shortening the design time and tl man-hours are of great importance. has been done.

On the other hand, image processing occupies a large proportion in the automatic layout of printed wiring patterns, and therefore, in order to shorten the design time and reduce the number of design man-hours, compression of image data regarding printed wiring patterns is used as a particularly effective means. ing.

(C) Prior art and problems The pre-selected wiring pattern is drawn along grid lines a that are perpendicular to each other with a constant pitch p, as illustrated in FIG. As shown in FIG. 2, image data is basically compressed for every 11 images of a square whose center is the grid line intersection point b' and whose side length is fp, as shown by the dotted lines. In contrast, conventional techniques have been used in which the size of the divided images to be compressed, that is, the length of the sides, is constant or arbitrary.

However, the former method cannot deal with grid lines having different pitches, the latter method has a complicated circuit configuration, and both methods require time for compression processing.

(D) Purpose of the Invention The purpose of the present invention is to eliminate the problems in the prior art described above, that is, to provide an image data compression circuit that can reduce the processing time while allowing the size of divided images to be compressed to be arbitrary. be.

(J. Structure of the Invention The uninvented mountain-opening data compression circuit converts a line image drawn on grid lines of a predetermined pitch and generated as binary data for each pixel into multiple pixels in units of grid line intersections. Each rectangular divided image is scanned and read, and the divided image is read by compressing the data of multiple dots obtained for each scan into one dot data according to the candy in each predetermined area on the scanning line. a first compression circuit that compresses the data of a plurality of dots arranged in the sub-scanning direction; and a first compression circuit that compresses the data of the plurality of dots obtained in the first compression circuit into n-bit data according to the value of each predetermined area in the sub-scanning direction. The line image 'tn
The data is compressed to +m bits of data.

(F) Implementation of Ui5(v) The merits of the present invention will be specifically explained below with reference to illustrated embodiments.

FIG. 3 is a block diagram of an embodiment of the invention, in which 1 is a control circuit that controls each forming part, and 2 is a control circuit drawn on grid lines of a predetermined pitch as illustrated in FIG. The line image, which is expressed as binary data and stored in the image memory (not shown) on the host computer side, is divided into grid line intersections in units of grid line intersections, as shown by the dotted lines in Figure 2. A video image obtained by scanning and reading a divided video image cut into squares, and a video image obtained from a redistribution video buffer.
A switching circuit 3 is a switching circuit which switches between 1 and 2 and supplies the video signal to the compression circuit 1 to be described later;
J! a first compression circuit that compresses data of a plurality of dots for each dot into data of a plurality of dots arranged in the sub-scanning direction in accordance with the value of the fixed area on the scanning line; , 4 is a second compression circuit that compresses the plurality of dot data obtained in the first compression circuit 3 into 2-bit data according to the value of each predetermined area in the sub-scanning direction;
5 is a buffer for storing the data obtained in the second compression circuit 4; 6 is a buffer memory that uses the divided image as a two-stage bow that rotates at right angles on the plane of the divided image; 7, 81!4. +g:4L area signals nt-H2-H3-1-14-t as shown in FIG.
- a first region signal generation circuit that generates ts and H6;
8I"i Dr. setting 1 in the sub-scanning direction Y of the divided image shown in FIG. →It is the 1st route.

FIG. 7 shows a specific example of the first compression circuit 3, with the first area (area where the A generation circuit 7 generates, 1 ro 111, 11
Using 2・113φH4・H5 and H6, the above division j
The bidet number 146 for each scan of the l+i image is divided into areas A・(A×B)・BeCφ(C+D)OyohiDKi and
Part 11: When all pixels of tl are "]", then #L('
#L Outputs "1" K 1. becomes 2. becomes 5 and becomes 6 (? and when one pixel is rlJ, 7! ■ it [
In order to output lJ, it is compressed into 6-bit data using signals 4ψ■ to 3.

In addition, Fig. 8 shows a compressed image of cut 2 &s 4, L in 7,
, the area signals V1 and V,2' where the raw circuit 8 is generated? ! : used, first one company, around, three
The 6-bit data obtained in 1., 2φ and 3.
1 (4・to 5 and 26 to L=(K3・to 20 to 1) + (K6+ to 5− to 4), and calculate the number of L in wholesale castle E and area F for each divided image and the register in advance. The data is compressed into 2-pit data by comparing the 1-point value stored in .

With the coffin construction as described above, the line image drawn along the mutually orthogonal grid lines a with a constant pitch pf as shown in FIG. Each image of a square with the center and side length kep can be compressed as 4-bit data into any of the 16 types shown in FIG. 9.

(G) Effects of I5 As explained above, according to the present invention, a line drawing drawn on a grid gauze with a constant pitch of Hr can be divided into arbitrary thick circles according to the pitch of the grid lines. By bigline processing, each divided image can be compressed into 4-bit data in a very simple manner.

[Brief explanation of drawings]

Figure 1 is an example of a line-J (image), Figure 2 is an example of 16 divisions of line images, iiλ:'3 is an i! 4 is a compression circuit, 2 is an H-compression circuit, and 6 is a bitme buffer.
The figure is an explanatory diagram of an embodiment of the present invention, FIG. 7 and FIG. 8 are specific examples of the first compression circuit 3 and the second compression circuit 4, respectively. and the corresponding amount of compressed data is shown. 1 mouth 25 0 rate q mouth

Claims (1)

[Claims] A line image drawn on grid lines of a predetermined pitch and expressed as binary data for each pixel is cut out into squares each having a plurality of pixels in units of grid line intersections, and each divided image is scanned and read by rask;
By compressing the data of multiple dots obtained for each scan into data of one dot according to the value of each predetermined area on the scanning line, the divided image is converted into data of multiple dots arranged in the sub-scanning direction. a first compression circuit that compresses the data of a plurality of dots obtained in the first compression circuit into data of n pits according to a value for each predetermined area in the sub-travel direction; An image data compression circuit comprising means for rotating the divided image at right angles on the divided image plane, and compressing the line image into data of n10m bits for each divided image.