JPS5929856U

JPS5929856U - FM receiver noise reduction circuit

Info

Publication number: JPS5929856U
Application number: JP12470382U
Authority: JP
Inventors: 鈴木　康三
Original assignee: 東光株式会社
Priority date: 1982-08-18
Filing date: 1982-08-18
Publication date: 1984-02-24
Also published as: JPS6322751Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図はＦＭステレオ信号とモノラル信号の入力信号レ
ベルに対するＳＮ比の特性を示す図、第２図は本考案に
係るＦＭ受信機の雑音低減回路のブロック図、第３図は
本考案に係るＦＭ受信機の雑音低減回路の要部を説明す
る為の回路図、第４図はセパレーション度とＳＮ比の改
善度との関係を示す図、第５図は入力信号と雑音出力と
の関係を示す図である。１・・・・・・アンテナ、２・・・・・・フロントエン
ド、３・・・・・・ＩＦ段、４・・・・・・ＦＭ検波器
、５・・・・・・ステレオ復調器、６・・・・・・ブレ
ンド回路、７・・・・・・スイッチ信号発生回路、８・
・・・・・整流平滑回路、９・・・・・・レベル検出回
路、１０・・・・・・ハイカットコンデンサ、１１・・
・・・・基準電圧源回路、１２．１３・・・・・・スイ
ッチ回路。７．１　　＊４ｆｆｉ（乞Ａ”Ｌ−シ３＞）（入力↓ｔΩし、ｄＢｆ）Fig. 1 is a diagram showing the characteristics of the SN ratio with respect to the input signal level of an FM stereo signal and a monaural signal, Fig. 2 is a block diagram of a noise reduction circuit of an FM receiver according to the present invention, and Fig. 3 is a diagram according to the present invention. A circuit diagram for explaining the main parts of the noise reduction circuit of an FM receiver. Figure 4 is a diagram showing the relationship between the degree of separation and the degree of improvement in the SN ratio. Figure 5 is a diagram showing the relationship between the input signal and the noise output. FIG. 1... Antenna, 2... Front end, 3... IF stage, 4... FM detector, 5... Stereo demodulator , 6... blend circuit, 7... switch signal generation circuit, 8...
... Rectification and smoothing circuit, 9 ... Level detection circuit, 10 ... High-cut capacitor, 11 ...
...Reference voltage source circuit, 12.13...Switch circuit. 7.1 *4ffi (A"L-shi3>) (Input ↓tΩ, dBf)

Claims

[Scope of utility model registration request]

(1) In the noise reduction circuit of the FM receiver, a stereo demodulator that separates the FM stereo signal into a left signal and a right signal;
The level detection circuit includes a level detection circuit that detects the signal strength of the FM stereo signal, and a blend circuit that changes the degree of separation of the FM stereo signal according to the level of the signal strength, and the level detection circuit is formed from a plurality of comparison circuits. The FM receiver is characterized in that the comparison circuit is operated in stages according to the signal strength of the stereo signal, the blend circuit is operated, and the degree of separation of stereo signals is reduced in stages to reduce stereo noise. noise reduction circuit.

(2) The blending circuit comprises a switch circuit operated by a signal from a comparator forming a level detection circuit, the switch circuit comprising a first and a second transistor;
The emitter of the transistor and the collector of the second transistor are connected, and the collector of the first transistor and the collector of the second transistor are connected.
A noise reduction circuit for an FM receiver according to claim 1, wherein the emitters of the transistors are connected.゛