JPS61116447U - - Google Patents

Info

Publication number
JPS61116447U
JPS61116447U JP1984197394U JP19739484U JPS61116447U JP S61116447 U JPS61116447 U JP S61116447U JP 1984197394 U JP1984197394 U JP 1984197394U JP 19739484 U JP19739484 U JP 19739484U JP S61116447 U JPS61116447 U JP S61116447U
Authority
JP
Japan
Prior art keywords
right channel
audio signals
channel audio
high frequency
blend circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984197394U
Other languages
Japanese (ja)
Other versions
JPH0342760Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984197394U priority Critical patent/JPH0342760Y2/ja
Publication of JPS61116447U publication Critical patent/JPS61116447U/ja
Application granted granted Critical
Publication of JPH0342760Y2 publication Critical patent/JPH0342760Y2/ja
Expired legal-status Critical Current

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  • Stereo-Broadcasting Methods (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の構成を示すブロツ
ク図、第2図は本考案の他の実施例の構成を示す
ブロツク図、第3図は従来例の構成を示すブロツ
ク図である。 1および1……バツフア増幅器、3……コ
ンデンサ、4および4……ハイパスフイルタ
、5……減算器、6,6,10および10
……電圧制御増幅器、7……整流回路、8
よび8……加算器。
FIG. 1 is a block diagram showing the structure of one embodiment of the present invention, FIG. 2 is a block diagram showing the structure of another embodiment of the present invention, and FIG. 3 is a block diagram showing the structure of a conventional example. 1 1 and 1 2 ... Buffer amplifier, 3 ... Capacitor, 4 1 and 4 2 ... High pass filter, 5 ... Subtractor, 6 1 , 6 2 , 10 1 and 10
2 ... Voltage control amplifier, 7... Rectifier circuit, 8 1 and 8 2 ... Adder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ステレオ受信機の左,右チヤンネル音声信号の
高域成分を混合することにより高域のみをモノラ
ル音声信号として出力するハイブレンド回路にお
いて、左,右チヤンネル音声信号の差を検出し、
この検出出力のレベルに対応したレベルの左,右
チヤンネル音声信号をそれぞれ各別に左,右チヤ
ンネル音声信号に加えるようにしてなることを特
徴とするハイブレンド回路。
In the high blend circuit that mixes the high frequency components of the left and right channel audio signals of the stereo receiver and outputs only the high frequency as a monaural audio signal, the difference between the left and right channel audio signals is detected,
A high blend circuit characterized in that left and right channel audio signals of a level corresponding to the level of this detection output are added to the left and right channel audio signals separately.
JP1984197394U 1984-12-29 1984-12-29 Expired JPH0342760Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984197394U JPH0342760Y2 (en) 1984-12-29 1984-12-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984197394U JPH0342760Y2 (en) 1984-12-29 1984-12-29

Publications (2)

Publication Number Publication Date
JPS61116447U true JPS61116447U (en) 1986-07-23
JPH0342760Y2 JPH0342760Y2 (en) 1991-09-06

Family

ID=30755659

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984197394U Expired JPH0342760Y2 (en) 1984-12-29 1984-12-29

Country Status (1)

Country Link
JP (1) JPH0342760Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56161731A (en) * 1980-05-16 1981-12-12 Clarion Co Ltd Stereo noise reducing method and its device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56161731A (en) * 1980-05-16 1981-12-12 Clarion Co Ltd Stereo noise reducing method and its device

Also Published As

Publication number Publication date
JPH0342760Y2 (en) 1991-09-06

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