JPS6123754U - Stereo broadcast receiver noise suppression circuit - Google Patents

Stereo broadcast receiver noise suppression circuit

Info

Publication number
JPS6123754U
JPS6123754U JP10826084U JP10826084U JPS6123754U JP S6123754 U JPS6123754 U JP S6123754U JP 10826084 U JP10826084 U JP 10826084U JP 10826084 U JP10826084 U JP 10826084U JP S6123754 U JPS6123754 U JP S6123754U
Authority
JP
Japan
Prior art keywords
stereo
noise suppression
broadcast receiver
suppression circuit
stereo broadcast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10826084U
Other languages
Japanese (ja)
Inventor
悦郎 吉岡
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP10826084U priority Critical patent/JPS6123754U/en
Publication of JPS6123754U publication Critical patent/JPS6123754U/en
Pending legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路構成図、第2図は
従来のステレオ放送受信機を示す回路構成図である。 14・・・・・・ステレオ復調回路、31,32・・・
・・・コンデンサ、33・・・・・・トランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional stereo broadcast receiver. 14... Stereo demodulation circuit, 31, 32...
...Capacitor, 33...Transistor.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)ステレオ放送受信機において、ステレオ復調回路
より復調されたステレオ信号を、断接の切換えが受信機
の入力信号レベルに応じて自動的になされる電子スイッ
チ装置を介して結合させ、前記入力信号レベルが低位の
ときに前記電子スイッチ装置を導通状態とすることによ
り、前記ステレオ信号に含まれる逆相の復調雑音成分を
打消すことを特徴とするステレオ放送受信機の雑音抑圧
回路。
(1) In a stereo broadcast receiver, stereo signals demodulated by a stereo demodulation circuit are coupled via an electronic switch device that automatically switches between connection and disconnection according to the input signal level of the receiver, and A noise suppression circuit for a stereo broadcast receiver, characterized in that the electronic switch device is turned on when the signal level is low, thereby canceling out phase demodulation noise components included in the stereo signal.
(2) 前記電子スイッチ装置は両端にコンデンサを
有し、前記ステレオ信号の結合を容量結合としたことを
特徴とする実用新案登録請求の範囲第1項記載のステレ
オ放送受信機の雑音抑圧回路。
(2) The noise suppression circuit for a stereo broadcasting receiver according to claim 1, wherein the electronic switch device has a capacitor at both ends, and the coupling of the stereo signal is capacitive coupling.
(3) 前記入力信号レベルとしてAGC電圧を用い
たことを特徴とする実用新案登録請求の範囲第1項記載
のステレオ放送受信機の雑音抑圧回路。
(3) A noise suppression circuit for a stereo broadcast receiver according to claim 1, wherein an AGC voltage is used as the input signal level.
JP10826084U 1984-07-19 1984-07-19 Stereo broadcast receiver noise suppression circuit Pending JPS6123754U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10826084U JPS6123754U (en) 1984-07-19 1984-07-19 Stereo broadcast receiver noise suppression circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10826084U JPS6123754U (en) 1984-07-19 1984-07-19 Stereo broadcast receiver noise suppression circuit

Publications (1)

Publication Number Publication Date
JPS6123754U true JPS6123754U (en) 1986-02-12

Family

ID=30667460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10826084U Pending JPS6123754U (en) 1984-07-19 1984-07-19 Stereo broadcast receiver noise suppression circuit

Country Status (1)

Country Link
JP (1) JPS6123754U (en)

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