JPS5923504A - Method of producing high accuracy thin film resistor - Google Patents

Method of producing high accuracy thin film resistor

Info

Publication number
JPS5923504A
JPS5923504A JP57133331A JP13333182A JPS5923504A JP S5923504 A JPS5923504 A JP S5923504A JP 57133331 A JP57133331 A JP 57133331A JP 13333182 A JP13333182 A JP 13333182A JP S5923504 A JPS5923504 A JP S5923504A
Authority
JP
Japan
Prior art keywords
resistor
film
electrode
thin film
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57133331A
Other languages
Japanese (ja)
Inventor
小崎 良一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57133331A priority Critical patent/JPS5923504A/en
Publication of JPS5923504A publication Critical patent/JPS5923504A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 発明の技術分野 本発明は高精度薄膜抵抗の製造方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates to a method of manufacturing high precision thin film resistors.

従来技術と問題点 従来、基板の表面に薄膜抵抗を形成する場合、膜の選択
エツチング性を利用しウェットな手法によシ抵抗膜およ
び導体膜をエツチングしている。
Prior Art and Problems Conventionally, when forming a thin film resistor on the surface of a substrate, the resistive film and the conductive film are etched using a wet method utilizing the selective etching properties of the film.

このような従来の方法では、量産性は良いが、サイドエ
ツチング等により寸法精度が低下し、高精度の抵抗を作
る場合トリミング工程が不可欠である。また、小形化へ
の対応も寸法精度の点で限度がある。
Although such conventional methods are suitable for mass production, dimensional accuracy decreases due to side etching, etc., and a trimming process is essential when making high-precision resistors. Furthermore, there is a limit to the ability to respond to miniaturization in terms of dimensional accuracy.

発明の目的 本発明は上述の欠点を解決するためのもので、トリミン
グを必要とせずに超小形も含む高精度薄膜抵抗を得るこ
とのできる高精度簿膜抵抗の製造方法を提供することを
目的としている。
Purpose of the Invention The present invention is intended to solve the above-mentioned drawbacks, and it is an object of the present invention to provide a method for manufacturing a high-precision thin-film resistor, which can obtain a high-precision thin-film resistor including an ultra-small one without requiring trimming. It is said that

発明の実施例 以下、図面に関連して本発明の詳細な説明する。Examples of the invention The invention will now be described in detail in conjunction with the drawings.

高精度薄膜抵抗の製造に際しては、まず第1図(a)に
示すように、セラミックス、ガラス、サファイヤ等の基
板1上にAu、AI等の導体膜2をスパッタまたは蒸着
等によシ形成する。
When manufacturing a high-precision thin film resistor, first, as shown in FIG. 1(a), a conductive film 2 of Au, AI, etc. is formed on a substrate 1 of ceramics, glass, sapphire, etc. by sputtering, vapor deposition, etc. .

次に、導体膜2の電極として残す部分の上に第1図(b
)に示すようにレジスト層3を選択的に形成し、その上
からイオンミーリング等のドライエツチングを行って第
1図(C)に示すようにレジスト層3形成部以外の導体
膜を除去して電極4を形成する。電極4形成後にレジス
ト層3は除去する。
Next, on the portion of the conductive film 2 to be left as an electrode,
) As shown in FIG. 1(C), a resist layer 3 is selectively formed, and dry etching such as ion milling is performed on the resist layer 3 to remove the conductive film other than the area where the resist layer 3 is formed, as shown in FIG. 1(C). Electrode 4 is formed. After forming the electrode 4, the resist layer 3 is removed.

次に、このようにして形成された電極4を含む基板1上
に第1図(,7)に示すように抵抗膜5をスパッタ、蒸
着等によ#)均一に形成する。
Next, on the substrate 1 including the electrodes 4 thus formed, a resistive film 5 is uniformly formed by sputtering, vapor deposition, etc., as shown in FIG. 1(, 7).

次に、第1図(g)に示すように、電極4と抵抗として
残したい抵抗膜5の上に選択的にレジストパターン6を
形成する。
Next, as shown in FIG. 1(g), a resist pattern 6 is selectively formed on the electrode 4 and the resistive film 5 to be left as a resistor.

次に、その上からイオンミーリング等のドライエツチン
グを行って、第1図<f”)に示すようにレジストパタ
ーン6形成部外の抵抗膜を除去して抵抗体7が形成され
る。エツチング完了後にレジストパターン6は除去する
Next, dry etching such as ion milling is performed from above to remove the resistive film outside the area where the resist pattern 6 is formed and form the resistor 7, as shown in FIG. Afterwards, the resist pattern 6 is removed.

次に、第1図(V)に示すように、抵抗体7を含む基板
1上にレジスト膜8を形成する。この場合、電極4,4
の中心部に対向する位置に穴9,9を残しておく。
Next, as shown in FIG. 1(V), a resist film 8 is formed on the substrate 1 including the resistor 7. In this case, electrodes 4, 4
Holes 9, 9 are left at positions facing the center of.

次に、ウェットエツチングにより、第1 [>l (A
)に示すように穴9,9内の抵抗体を選択的に除去する
Next, by wet etching, the first [>l (A
), the resistors in the holes 9, 9 are selectively removed.

なお、上述の工程説明では省略したが電極4と抵抗体7
0間に膜密着性を向上させるためのNiCr。
Although omitted in the above process description, the electrode 4 and the resistor 7
NiCr to improve film adhesion between 0 and 0.

Ti、Pd等の中間膜が形成されている場合は必要に応
じこの中間膜もウェットエツチングにより選択的に除去
する。この状態では、抵抗体7に穴9.9に対応する窓
10 、10が形成され、該窓10.10内には箱、極
4,4の中心部が露出する。
If an intermediate film of Ti, Pd, etc. is formed, this intermediate film is also selectively removed by wet etching if necessary. In this state, windows 10, 10 corresponding to the holes 9.9 are formed in the resistor 7, and the centers of the boxes and poles 4, 4 are exposed within the windows 10.10.

最後にレジスト膜8を除去して薄膜抵抗の形成が完了す
る。第2図はこの状態を示す余I親図でちる。
Finally, the resist film 8 is removed to complete the formation of the thin film resistor. FIG. 2 is a diagram showing this state.

薄膜抵抗は上述の工程によシ形成され、正極および抵抗
体は導体膜および抵抗膜をドライエツチングすることに
よp形成されるため、抵抗体の幅。
The thin film resistor is formed by the process described above, and the positive electrode and the resistor are formed by dry etching the conductor film and the resistor film, so the width of the resistor is small.

長さ等を高精度に作製することができ、高精度薄膜抵抗
を得ることが可能でおる。また、電極表面をエツチング
する必要がないため、電極用導体膜を特に厚く形成して
おく必要がなく、しかも寸法精度の厳しくない部分のエ
ツチング(抵抗体に電極中心部露出用窓を形成する工程
)はウェットな手法によシ行うようになっているため、
コストを低減することが可能である。
It is possible to manufacture the length etc. with high accuracy, and it is possible to obtain a highly accurate thin film resistor. In addition, since there is no need to etch the electrode surface, there is no need to form a particularly thick conductor film for the electrode, and it is also possible to etch areas where dimensional accuracy is not critical (the process of forming a window for exposing the center of the electrode on the resistor). ) is done using a wet method, so
It is possible to reduce costs.

発明の効果 以上述べたように、本発明によれば、高精度薄膜抵抗を
低コストで製造することが可能である。
Effects of the Invention As described above, according to the present invention, it is possible to manufacture a high precision thin film resistor at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本発明に係る高精度薄膜抵抗の製造方法の実施例
を示すもので、第1図(a)〜(A)は薄膜抵抗の製造
工程図、第2図は基板上に形成された薄膜抵抗の斜視図
である。 図中、1は基板、2は導体膜、6はレジスト層、4はt
b1極、5は抵抗膜、6はレジストパターン、7は抵抗
体、8はレジスト膜、9は穴、1oは窓である。 1行許出願人 富士通株式会社
The drawings show an embodiment of the method for manufacturing a high-precision thin film resistor according to the present invention, and FIGS. 1(a) to (A) are manufacturing process diagrams of the thin film resistor, and FIG. 2 is a diagram showing a thin film formed on a substrate. FIG. 3 is a perspective view of a resistor. In the figure, 1 is a substrate, 2 is a conductor film, 6 is a resist layer, and 4 is a t
b1 pole, 5 is a resistive film, 6 is a resist pattern, 7 is a resistor, 8 is a resist film, 9 is a hole, and 1o is a window. 1st line applicant Fujitsu Limited

Claims (1)

【特許請求の範囲】[Claims] 基板上に導体膜を形成して該導体膜の電極として残す部
分の上にレジスト層を形成した後、その上からドライエ
ツチングを行って前記レジスト層形成部以外の前記導体
膜を除去して対の電極を形成し、次に前記レジスト層を
除去して前記電極を含む前記基板上に抵抗膜を均一に形
成した後、前記電極と抵抗として残したい前記抵抗膜の
上にレジストパターンを形成し、次にその上からドライ
エツチングを行って前記レジストパターン形成部以外の
前記抵抗膜を除去して抵抗体を形成し、次に前記レジス
トパターンを除去した後、前記抵抗体を含む前記基板上
に前記電極の中心部に対向する位置に穴を残してレジス
ト膜を形成し、次にウェットエツチングによシ前記抵抗
体の前記大向の部分を除去し、最後に前記レジスト膜を
除”去することを特徴とする高精度薄膜抵抗の製造方法
After forming a conductive film on a substrate and forming a resist layer on the portion of the conductive film to be left as an electrode, dry etching is performed from above to remove the conductive film other than the resist layer forming portion. After forming a resistive film uniformly on the substrate including the electrode by removing the resist layer, a resist pattern is formed on the electrode and the resistive film that is to be left as a resistor. Next, dry etching is performed from above to remove the resistive film other than the resist pattern forming area to form a resistor, and then, after removing the resist pattern, the resistive film is etched onto the substrate including the resistor. A resist film is formed leaving a hole at a position facing the center of the electrode, and then the large facing portion of the resistor is removed by wet etching, and finally the resist film is removed. A method for manufacturing a high-precision thin film resistor, characterized by:
JP57133331A 1982-07-30 1982-07-30 Method of producing high accuracy thin film resistor Pending JPS5923504A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57133331A JPS5923504A (en) 1982-07-30 1982-07-30 Method of producing high accuracy thin film resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57133331A JPS5923504A (en) 1982-07-30 1982-07-30 Method of producing high accuracy thin film resistor

Publications (1)

Publication Number Publication Date
JPS5923504A true JPS5923504A (en) 1984-02-07

Family

ID=15102214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57133331A Pending JPS5923504A (en) 1982-07-30 1982-07-30 Method of producing high accuracy thin film resistor

Country Status (1)

Country Link
JP (1) JPS5923504A (en)

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