JPS5923439Y2 - printed circuit board - Google Patents
printed circuit boardInfo
- Publication number
- JPS5923439Y2 JPS5923439Y2 JP1981074189U JP7418981U JPS5923439Y2 JP S5923439 Y2 JPS5923439 Y2 JP S5923439Y2 JP 1981074189 U JP1981074189 U JP 1981074189U JP 7418981 U JP7418981 U JP 7418981U JP S5923439 Y2 JPS5923439 Y2 JP S5923439Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- metal foil
- hole
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Description
【考案の詳細な説明】
この考案はプリント回路板に係わり、特に金属箔の剥離
防止に関する。[Detailed Description of the Invention] This invention relates to printed circuit boards, and particularly to prevention of peeling of metal foil.
周知のように、プリント回路板においてはプリントパタ
ーン（金属箔）を貫通して種々の透孔が設けられる。As is well known, in a printed circuit board, various through holes are provided through a printed pattern (metal foil).
この透孔は一般には回路部品のリード線が挿入され、こ
のリード線とプリントパターンとが半田付けされて閉塞
される。Generally, the lead wire of the circuit component is inserted into this through hole, and the lead wire and the printed pattern are soldered and closed.
しかし、プリントパターンのうち半田付けされない透孔
や直接電気的には接続されない単なる部品装着孔の場合
、回路組立時や経時変化等により透孔周縁のプリントパ
ターンが剥離しやすくなる欠点を有している。However, in the case of through-holes in the printed pattern that are not soldered or simply component mounting holes that are not directly electrically connected, the printed pattern around the periphery of the through-holes tends to peel off during circuit assembly or due to changes over time. There is.
この考案は上記事情に基づいてなされたもので、金属箔
に透孔と同心的に所定の大きさ部分を避けて欠除部を設
け、この欠除部を含み金属箔が設けられたプリント回路
板表面を硬化性接着剤でコーティングすることにより透
孔の周縁部における金属箔の剥離を防止することが可能
なプリント回路板を提供しようとするものである。This idea was made based on the above-mentioned circumstances; a cutout is provided in the metal foil concentrically with the through hole, avoiding a predetermined size part, and a printed circuit including the cutout and provided with the metal foil is created. An object of the present invention is to provide a printed circuit board that can prevent peeling of metal foil at the peripheral edge of a through hole by coating the board surface with a curable adhesive.
以下、この考案の一実施例について図面を参照して説明
する。An embodiment of this invention will be described below with reference to the drawings.
図においてプリント回路板１１には透孔、例えば装着部
品取付用の端子とかリード線を挿入するための取付孔１
２が多数設けられている。In the figure, a printed circuit board 11 has a through hole, for example, a mounting hole 1 for inserting a terminal or a lead wire for mounting a mounted component.
2 are provided in large numbers.
このプリント回路板１１の裏面には大信号回路（例えば
出力回路）用、小信号回路（例えば入力回路）用、アー
ス用などのプリントパターン（図示せず）が形成されて
いる。Printed patterns (not shown) for large signal circuits (for example, output circuits), for small signal circuits (for example, input circuits), for grounding, etc. are formed on the back surface of this printed circuit board 11.
またプリント回路板１１の表面（部品装着面側）には前
記取付孔１２を避は且つ装着部品に接しない位置に任意
数の印刷抵抗１３が付着されると共に印刷抵抗１３の両
端に接触して金属箔例えば銀箔よりなる接続用リード１
４が複数本付着されている。Further, an arbitrary number of printed resistors 13 are attached to the surface of the printed circuit board 11 (component mounting surface side) at positions that avoid the mounting holes 12 and do not come into contact with the mounted components, and are in contact with both ends of the printed resistors 13. Connection lead 1 made of metal foil, for example silver foil
Multiple pieces of 4 are attached.
そして接続用リード１４はプリント回路板１１に設けら
れたスルーホールメッキ孔１５を介してプリントパター
ンの適宜部分に接続される。The connection leads 14 are connected to appropriate portions of the printed pattern via through-hole plating holes 15 provided in the printed circuit board 11.
ところで、前記接続用リード１４のうち印刷抵抗１３の
接地側一端に連接された部分であって、且つ裏面に小信
号回路用プリントパターンなど外部雑音の誘導を特に避
けたいプリントパターンが対向しているリード１４′は
、上記パターンを覆うように広大に形成されている。By the way, the part of the connection lead 14 that is connected to one end of the ground side of the printed resistor 13 is facing a printed pattern such as a printed pattern for a small signal circuit, which is particularly desired to avoid inducing external noise, on the back side. The lead 14' is formed to be wide so as to cover the pattern.
そしてプリント回路板１１に設けられたスルーホールメ
ッキ孔１５を用いて、上記リード１４′の一部とアース
パターンの一部とが連接されている。Through-hole plating holes 15 provided in the printed circuit board 11 are used to connect a portion of the lead 14' and a portion of the ground pattern.
なおアースパターンのスルーホールメッキ孔部には硬化
性接着剤が付着されている。Note that a curable adhesive is attached to the through-hole plating hole portion of the ground pattern.
また、前記リード１４′の位置が前記取付孔１２の一部
を含む場合には、リード１４′に取付孔１２と同心的に
所定の大きさ部分を避けて欠除部が設けられ、装着部品
リード線との接触が防止される。Further, when the position of the lead 14' includes a part of the mounting hole 12, a cutout part is provided in the lead 14' concentrically with the mounting hole 12, avoiding a part of a predetermined size, and the part to be mounted is Contact with lead wires is prevented.
そして、これら接続用リード１４．１４’および印刷抵
抗１３が付着されたプリント回路板表面は前記欠除部を
含んで硬化性接着剤によりコーティングが施され、上記
抵抗１３、リード１４．１４’の剥離防止が図られてい
る。The surface of the printed circuit board to which these connection leads 14.14' and printed resistor 13 are attached is coated with a curable adhesive, including the cutout portion, and the resistor 13 and printed resistor 13 are coated with a curable adhesive. Efforts are made to prevent peeling.
上記したようなプリント回路板によれば、取付（Ｌ１２
と同心的に所定の大きさ部分を避けた欠除部を有するリ
ード１４′を設け、この状態で欠除部を含むリード１４
′、プリント回路板表面を硬化性接着剤でコーティング
している。According to the printed circuit board as described above, mounting (L12
A lead 14' having a cutout part of a predetermined size is provided concentrically with the lead 14' including the cutout part.
', The surface of the printed circuit board is coated with a curable adhesive.
したがって、リード１４′とプリント回路板とが一体的
に覆われるため、取付孔１２の周囲におけるリード１４
′の剥離を防止することができる。Therefore, since the leads 14' and the printed circuit board are integrally covered, the leads 14' around the mounting hole 12 are
′ can be prevented from peeling off.
なお、リード１４′としては小信号用プリントパターン
部のシールド用のもので説明したが、これに限らず他の
目的に使用されるパターンでも実施可能なことは勿論で
ある。Although the lead 14' has been described as one for shielding the printed pattern portion for small signals, it is of course possible to use a pattern used for other purposes.
以上、詳述したようにこの考案によれば、透孔の周縁部
における金属箔の剥離を防止することが可能なプリント
回路板を提供できる。As described in detail above, according to this invention, it is possible to provide a printed circuit board that can prevent peeling of the metal foil at the peripheral edge of the through hole.
図面は本考案に係るプリント回路板を部品装着面側から
見て示す正面図である。
１１・・・・・・プリント回路板、１２・・・・・・取
付孔、１３・・・・・・印刷抵抗、１４．１４’・・・
・・・接続用リード。The drawing is a front view of the printed circuit board according to the present invention, viewed from the component mounting side. 11...Printed circuit board, 12...Mounting hole, 13...Printed resistor, 14.14'...
... Connection lead.
Claims (1)
形成された透孔と、前記金属箔に透孔と同心的に所定の
大きさ部分を避けて形成された欠除部と、この欠除部を
含む金属箔が設けられたプリント回路板表面を硬化性接
着剤でコーティングすることにより透孔の周縁部におけ
る金属箔が剥離しないように構成したことを特徴とする
プリント回路板。A printed circuit board, a through hole formed in a metal foil portion of the printed circuit board, a cutout portion formed in the metal foil concentrically with the throughhole while avoiding a predetermined size portion, and this cutout. 1. A printed circuit board characterized in that the surface of the printed circuit board provided with the metal foil including the through hole is coated with a curable adhesive to prevent the metal foil from peeling off at the peripheral edge of the through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981074189U JPS5923439Y2 (en) | 1981-05-22 | 1981-05-22 | printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981074189U JPS5923439Y2 (en) | 1981-05-22 | 1981-05-22 | printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57128174U JPS57128174U (en) | 1982-08-10 |
| JPS5923439Y2 true JPS5923439Y2 (en) | 1984-07-12 |
Family
ID=29869966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981074189U Expired JPS5923439Y2 (en) | 1981-05-22 | 1981-05-22 | printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5923439Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2581103B2 (en) * | 1987-09-28 | 1997-02-12 | アイシン精機株式会社 | Conductive bonding method for chip parts |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5547070Y2 (en) * | 1971-09-17 | 1980-11-05 |
-
1981
- 1981-05-22 JP JP1981074189U patent/JPS5923439Y2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57128174U (en) | 1982-08-10 |
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