JPS5923394A - Enunciation body driving circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit for a sounding body, and its purpose is to drive a sounding drive circuit for attenuating chords into a C.
By incorporating it into a MOS integrated circuit, the number of external parts can be reduced and costs can be reduced, while also considering the further miniaturization of microelectronic devices such as watches and the addition of new performance.

A detailed explanation will be given below based on the drawings. FIG. 1 shows an example of a sounding body drive circuit conventionally used in a timepiece, in which a piezoelectric buzzer using a piezoelectric element is used as the sounding body. To explain the configuration of this circuit, P channel MO8) transistor 1 (hereinafter referred to as MO8T) and N channel MO8) transistor 1 (hereinafter referred to as MO8T)
The output terminal A of the gate circuit composed of 8T2 is connected to the resistor 6.
The external terminal 4 is connected to the base of a bipolar transistor 5 outside the integrated circuit. The emitter of the bipolar transistor 5 is connected to the low potential side V 6 B of the power supply, and the collector is connected to each of a coil 7 and a piezoelectric buzzer 8 whose one terminal is connected to the high potential side VDD of the power supply via the resistor 6. is connected to the other terminal of

When a pulse signal having a musical scale frequency is applied to the input terminal (1) of this gate circuit, an inverted signal thereof appears at the output terminal A as shown in FIG.

In FIG. 2, when the potential of the output terminal A is 7660, the bipolar transistor 5 is in an on state, and the coil 7 is in an on state.
A current flows through 1z. When the potential at the output terminal A becomes ■ss, the bipolar transistor 5 is turned off, so the current flowing through the coil 7 is cut off, and at this time, a back electromotive force is generated at the output terminal O in the positive direction. However, since the piezoelectric buzzer 8 acts as a capacitive load with respect to this voltage, a voltage waveform as shown in FIG. 2 is generated at the output terminal 0. The maximum peak value of this voltage waveform is approximately 6 cm. That is, the coil 7 is used for boosting the signal.

The first drawback of this conventional circuit is that the frequency range that can be used for sound generation is narrow. In other words, the waveform at the output terminal A in FIG. 2 is not a pressure wave, but has a limited period and cycle. That is, during a period when the potential to the output terminal is Vdd, the current flowing through the coil 7 gradually increases due to the inductance. The back electromotive voltage generated when the current is interrupted depends on the magnitude of the current flowing immediately before the interruption, so in order to maintain the volume of the piezoelectric buzzer 8 at a certain value, the current flowing through the coil 7 must be adjusted. It is necessary to keep the current flowing until the magnitude of is a sufficient value.

Therefore, the minimum value of the period during which the potential of the output terminal A should be Vdd is determined.

Next, the potential of output terminal A is VIl! The minimum value of the period that should be + is determined by the time it takes for the voltage waveform at the output terminal O to reach the maximum value, and the maximum value is different from the drive frequency due to the natural vibration of the piezoelectric buzzer 8. It is limited to the frequency range in which it does not produce sound.

Furthermore, the maximum value of the period during which the output terminal A is at vdd is:
There is a limit value in relation to power consumption. In this way, due to the restrictions on the voltage waveform at the output terminal A, the frequency range in which sound can be produced falls within an extremely limited range.

The disadvantage of FIG. 2 is that it is difficult to pronounce chords for the same reason as mentioned in the first disadvantage above.

In other words, a chord is composed of two or more different frequency components.
Therefore, the voltage waveform at the output terminal cannot satisfy the above-mentioned constraints.

The disadvantage of FIG. 3 is the presence of the polar transistor 5, the cost of which is relatively high. However, if we tried to replace the external bipolar transistor with a built-in MO8T, the high voltage generated when the piezoelectric fiber was subjected to mechanical shock would cause the CMO8 integrated circuit to latch up, so this could not be realized. There wasn't.

Next, FIG. 3 shows an example of a single-tone integrated attenuated sound generating circuit according to the prior art, in which the drain of a P-channel MOS T9 is connected to the polar transistor 50 through a resistor r12.
Connected to connection point B with the base.

At the connection point B, a plurality of resistors R116, R214, . . . are connected to V88 via a plurality of N-channel MO3T10.11. The plurality of N-channel MO8T10
．． The gate terminals C1 and C2 of 11 are given signals in a selective combination, and when the P channel MO8T9 is turned on, the high potential level at the connection B is connected to the resistor r and the front 8. The voltage is divided by the parallel resistance value of self-resistors R1 and R2.

Therefore, by changing the signals applied to the gate terminals C1 and C2 over time so that the high potential level at the connection point B gradually decreases, the current flowing through the coil 7 gradually decreases. The sound volume of Fuzzer 8 decreases.

This method is simple, but unless the number of resistor divider combinations is increased to a certain extent, the envelope of the attenuated sound will have stages, which will be unnatural.On the other hand, if the resistor divider combinations are increased, the integration of the integrated circuit will increase. 7 Make it worse. Furthermore, the notification 1j control signal generating circuit for controlling the resistance division requires a timer and a decoder, making it complicated.

Therefore, the circuit of Fig. 3 can be used to obtain a single envelope as shown in Fig. 4(a), with a force of 1, and tones of different scales as shown in Fig. 4(b). This becomes difficult to implement if a plurality of envelope circuits are required to generate envelope sounds independently.

Therefore, the present invention has been made to improve the various drawbacks mentioned above.

First, FIG. 5 is a circuit diagram showing an embodiment of the present invention, and its configuration can be roughly divided into envelope cells (2OA, 2OA and 2OA in the figure).
0B . . . shown in detail), booster circuit 60,
It consists of a level detector 40, a dry cutter 50, and a protection circuit 60.

Configuration of envelope cell 20A Belt, drain of N-channel MOST 21 (4 V ddK connected,
The source and substrate are connected to the drain of the N-channel MOST 22, connected to the capacitor 26 and grounded to Vdd, and further connected to the gate of the P-channel Δ10 S T 2 4, and both gates are It is connected to the inlet end J. The gate of the N-channel MOST22 is connected to the individual input terminal K, and the source and substrate are connected to v88. The north of the P-channel MO8T24 is connected to the drain of the P-channel MO8T25, and the P-channel MO8T24 is connected to the drain of the P-channel MO8T25.
The drain of O8T24 can be connected to the common output terminal N, and the substrate can be grounded to Vdd. Said P Chao, Le MO3T2
The gate of 5 is connected to the individual input end, the source is connected to the common end M, and the substrate is grounded to Vdd.

A thin whisker signal is supplied to the common terminal J from a whisker generating circuit, which will be described later. Different scale signals are applied to each of the individual input terminals L 1 , and a sound generation signal is applied to each of the individual input terminals. The common end M is a resistor 26
The common output terminal N is connected to the output terminal of the booster circuit 30 via the resistor 27, and the level detection circuit 40 and the driver 50
connected to.

FIG. 6 is a diagram showing operating waveforms of the envelope cell, in which a scale signal is applied to the individual input terminal L1, but when the gate terminal P of the P channel MOS T 24 is at a high voltage level vx. is the P channel MOS T2
4 is in the off state, the output terminal NVi is pulled down to the level of the output terminal 4 of the booster circuit 60 by the resistor 27.

Here, when the sound signal 1 is applied to the individual input terminal and becomes the Vda level for a short time, the N-channel MO6T22 is turned on during this time, so that the potential of the gate 7AP becomes It will be 5s. As a result, the front P-channel transistor 24 is turned on, and the scale signal appears at the output terminal N.

The whisker signal is applied to the common input terminal J, and when the N-channel MO6T21 is turned off for a short period of time by this whisker signal, part of the charge held in the capacitor 26 is released during this period, so that The potential at the gate end P rises in the direction of Vdd.

Therefore, the off-state of the P-channel MO8T24 is weakened and the on-resistance increases, so that the peak value of the scale signal appearing at the output terminal N decreases. This operation is repeated every cycle of the whisker signal, but the N-channel MO3T2
Since the source of the N channel M is connected to the gate end P, as the potential of the gate end P rises, the source of the N channel M
The ON state of the O8T210 is gradually weakened, and therefore the amount of charge released from the capacitor 26 by the whisker signal is also gradually reduced. Therefore, as time passes, the potential change at the gate end P gradually becomes gradual.

When sufficient time has passed, the potential HVd at the gate end P
It reaches level 8 which is obtained by subtracting the threshold voltage of the N-channel MO8T21 from d. Here, the N channel M
If the threshold voltages of O3T21 and the P-channel MO8T24 are approximately the same, the P-channel MO8T24
is almost off, so no scale signal appears at the output terminal N.

In this method, the potential of the gate end P is the voltage of the P channel MO.
Since the threshold voltage of the 8T24 approaches very gradually, the way the sound attenuates is extremely natural, eliminating the step phenomenon where the sound suddenly disappears midway, which is common with conventional built-in attenuation sound generation circuits. There is no. Further, the potential change at the gate end P can be controlled by appropriately selecting the width of the whisker signal, the value of the capacitor 26, the contactance value of the N-channel MO3T 21, and the period of the whisker signal.
Without particularly increasing the number of elements, it should be possible to make e1 so smooth that the difference in level is practically unnoticeable.

In the waveform diagram of the output terminal N in FIG. Varies depending on

Now, to explain the whisker signal generation circuit, the seventh
The figure shows a whisker signal generation circuit, in which one input terminal of a NOR gate 81 is connected to one input terminal of a RidNOR gate 86, and an output terminal B is connected to the other input terminal of the NOR gate 8. At the same time, one input terminal of the NOR gate 82 (((connected), and the remaining input terminal is connected to the NOR gate 82).
It is connected to the output terminal A of the R gate 82. The output terminal Q of the NOR gate 86 is connected to the remaining input terminal of the NOR gate 82.

FIG. 8 shows an operational waveform diagram of this whisker signal generating circuit. When the potential of the input terminal R is 7660, the output terminal Q is V,! +, output terminal A is at the level of Vdd, and output terminal B is at the level of Vsg.

When the potential of the input terminal R changes from Vdd to ■68, the eighth
The transmission level shown by the dashed line in the figure is passed, and from this point on, the output terminal Q begins to rise toward Vdd. When the level of the output terminal Q reaches the transmission level, the output terminal Avss
When the potential at the output end A reaches the transmission level, the output end B starts to rise toward Vdd, and when the level at the output end B reaches the transmission level, the output end Q voltage Start descending.

Therefore, the signal appearing at the output terminal Q becomes a thin whisker-like signal. This whisker signal is clear from the operation explanation above, but
It is guaranteed that at least the peak value will rise to the transmission level. However, the whisker signals required by the envelope cells 20A, 20B, . . . of the present invention shown and explained in FIG.

To satisfy this point, the sum of the falling time of output terminal A and the rising time of output terminal B should be longer than the rising time of output terminal Q.

Therefore, the rise time of the output terminal Q in the actual integrated circuit can be calculated, and the fall time of the output terminal A and the output terminal B
The conductance of the transistors constituting each NOR gate 81, 82, 86 is selected so that the sum of the rise-low time of 84.85, etc. will be taken.

Now, in FIG. 5, the driver 50 is a P-channel MO8T5 whose north end is connected to Vdd by a resistor 52.
1, and an N-channel MO8T53 which shares a drain with the P-channel MO3T51 and whose north end is connected to the output terminal v' of the booster circuit 60 via a resistor 54. The gate of the N-channel MO3T53 is connected to the output terminal N of the envelope cells 2OA, 20B...
It is also connected to a sounding body load 70 via a drain external terminal 64. The envelope cell 2
A scale signal with an attenuation envelope appears at the output terminal N of OA, 20B, etc., and the conductance of the N-channel MO8T53 changes depending on the peak value of this signal. The amount of current that flows also changes, and it becomes possible to obtain attenuated sound. At this time, if the sounding body load 70 is of a current-driven type, no more special configuration is required in principle. However, the sounding body load 70
If it is capacitive, such as a piezoelectric buzzer, a discharge circuit is required to discharge the charged charge.

In FIG. 5, the P-channel MO8T5i is the above-mentioned discharge transistor, and when the N-channel MO8T5.3 is almost off, the P-channel MO8T51 is turned on and short-circuits both ends of the sounding body load 70. . In this case, it is necessary to detect the strength of the on-state of the N-channel MO3T53, and the level detector 40 performs this.

The configuration of the level detector 40 is as follows. The source and substrate of the N-channel MO8T41 are connected to the output terminal V0 of the booster circuit 30, the gate is connected to the common output terminal N of the envelope cells 20A, 20B, and the drain is connected to the resistor 42. The output terminal of the inverter 46 becomes the output terminal S of the level detector 40.
Since the NCH2 and MO8T56 are manufactured in the same chip, their electrical characteristics are similar.

Therefore, the value of the resistor 42 and the conductance of the N-channel MO3T41 can be set so that the output of the inverter 46 is inverted to the 88 level when the N-channel MO8T55 is almost turned off.

FIG. 9 shows the waveform at the common output terminal N of the envelope cell 20A, the waveform at the output terminal S of the level detector 40, and the waveform at the external terminal 64 when the sounding body load 70 is a piezoelectric buzzer. The approximate condition is shown below.

In FIG. 5, the protection circuit 60 must be strong enough to prevent the integrated circuit from malfunctioning or running noise due to the high voltage generated when the piezoelectric buzzer receives an impact as described above. Therefore, in the present invention, the conventional idea of a protection circuit using diodes has been abandoned and a protection circuit using transistors has been adopted.

Figures 10 (a) and (b) show the conventional protection circuit structure and its conceptual equivalent circuit, and Figure 11 (a) and (b) show the protection circuit structure and its equivalent circuit in the present invention. .

In FIG. 11, a bipolar transistor 61 is a lateral PNP transistor with an N- substrate as a base, a P+ diffusion layer as an emitter, and a P'Jt diffused layer as a collector, and a transistor 62 has an N+ diffusion layer as an emitter and a P- This is a vertical NPN bipolar transistor with a diffusion layer as a base and an N-diffusion layer as a collector. An input terminal IN of the protection circuit is connected to one terminal of a polysilicon resistor 63 CD. The other terminal of the polysilicon resistor 66 is connected to the PNiP.
It is connected to the emitters of the bipolar transistor 61 and the NPN bipolar transistor 62, and serves as the output end OUT. The PNP bipolar transistor 61
The collector of the NPN bipolar transistor 620 is connected to 66, and the base of the NPN bipolar transistor 620 is connected to 66.

This protection circuit is extremely powerful, and has more than 10 times the performance compared to normal conventional protection circuits, even within confirmed ranges. Therefore, the piezoelectric buzzer (capacity 5ONF) is generated.
It has sufficient protection ability against high voltages over 00V,
The effectiveness of the implementation was extremely dogmatic.

Next, regarding the booster circuit 60 in FIG. 5, the embodiment shown here uses a coil 66, one end of which is connected to ■S8, and the other end connected to an external terminal. Connect to the drain of P-channel MO8T61 and the source of N-channel MO3T34 through filter 2. The source and substrate of the P-channel MO8T31 are connected to Vdd, and a boost signal is applied to the gate T. The gate and drain of the N-channel MO8T34 are commonly connected to a capacitor 66 via an external terminal 35, and serve as an output terminal vL. When the boosting signal T becomes low level and the P-channel MO3T3i is turned on, a current flows through the coil 33.

Next, when the boosting signal T becomes Vdd, the P-channel MOST 31 is turned off, and the current flowing through the coil 66 is cut off. At this time, a large negative voltage appears at the external terminal 62.

Since the N-channel MOS T-34 functions as a diode, the capacitor 36 is charged in a negative direction through this diode.

The voltage appearing at the output terminal (1) of the booster circuit 60 described in - varies depending on the inductance value of the coil 36, the state of the boost signal, the conductance of the P-channel MO3T31, the size of the N-channel MO3T34, etc. It was about -Bv at no load and about -4■ at maximum load. Naturally, the output voltage of the booster circuit 60 is vsI
There is no meaning unless it is designed so that it is lower than +.Conversely speaking, vL is always smaller than v68 during normal booster circuit operation.

Therefore, the step-up signal should be converted from a 8-level signal to a Vdd-VL level signal using a level shifter called Rare, which is very commonly used in watch electronic circuits. However, the size of the MO3T filter 1 can be made smaller.

Figure i12 shows an example of a level shifter circuit diagram.

This concludes the detailed explanation of the present invention shown in FIG. 5, but chord pronunciation will be further explained.

As shown in the time chart of FIG. 13, when a chord is generated, two or more signals of different periods and amplitudes of 1 J are synthesized at the common output terminal N of the envelope cell. At this time, even if the first scale signal N, for example, is below the detection level of the level detector 40 described above, if it matches another scale signal, for example N2, only that part is detected by the level detector 40. A case may occur in which the sounding body is driven again at a level exceeding 40. That is, in FIG. 13, at time t, the waveform N is already below the detection level of the level detector 40 (indicated by the dashed line), and therefore the sounding body is not driven.

However, at time L2, as a result of combining N1 and N2, the signal component of N1 rises to the detection level again and the sounding body is driven. As a result, the sounding body is driven by a signal different from the scale signal, and noise is generated. In order to further improve this point, the present invention has added improvements to the envelope cells 2oA, 2[IB...].

FIG. 14 shows another embodiment of the envelope cell, in which the same parts as shown in FIG.
9 and P channel M OS T28. The drain of the P-channel MO8T28 is connected to the gate end P,
The gate connected to the north and the substrate iI'1vdd can be connected to the output terminal Q of the data type flip-flow knob 29.

The data input end of the data type flip-flow knob 29 is connected to the output end S of the level detector 4o, the positive chronograph input end is connected to the scale signal input end, and the seven-node input end is connected to the scale signal input end. Terminal SE is connected to 1 to said input terminal.

When the sound signal applied to the other input terminal K becomes Vdd, the data type flip-flow knob 29 is set, and the ■dd level appears at the output terminal Q, so ^11
Since the P channel MO8T28 is off, the gate end P
is charged to V g s and the P-channel MO8T24
is fully turned on, and therefore the individual input terminal L1
The scale signal given to is V.

level, a sufficiently high output level is obtained at the common output terminal N, and therefore the output terminal S of the level detector 40 is at the Vdd level, so that the scale signal changes from Vss to Vdd. However, the state of the output terminal of the data type flip-flow knob 29 does not change.

After a certain period of time, the potential at the gate end P becomes V as described above.
dd, and therefore the on-resistance value of the P-channel MO8T24 increases, so that the scale signal changes to ■6. Even when the level of From V. 0, the level of the output terminal Q of the data type flip-flow knob 29 becomes 3. It ends up being at the level of Then, the P channel MO'5T
28 is turned on, and the gate terminal P is completely pulled to the Vdd level, so the N-channel MO8T24 is turned off, and the sound generation signal applied to the individual input terminal 1 is about to reach the Vdd level. will be maintained. That is, for a scale that is detected to be below the sound generation level by the level detector 40 even once, the output is completely prohibited until the next sound generation signal arrives, so that the above-mentioned inconvenience does not occur.

FIG. 15 is a circuit diagram showing an example of improvement of the envelope cell from a different point of view, and in the envelope cell shown in FIG. 5 or 14, the N channel MO8T
21 and the P-channel Mo 5124 are required to be approximately the same, but this may not always be satisfied depending on the manufacturing conditions of the integrated circuit. Therefore, an improvement was made to allow for variations in the threshold voltages between the two. That is, the drain of the N-channel MO3T21 whose gate is connected to the common input terminal J1 is not directly connected to the gate terminal P, and a new P-channel MO3T21 is connected to the common input terminal J1.
connected to the gate end P via the diode 7 constituted by the OS T 201, and connected to the P channel MO8T2.
By connecting the north of the gate terminal P to the common terminal M through a diode configured by the new N channel M OS T 202, instead of directly connecting the north terminal of the gate terminal P to the common terminal M, The level at which the potential approaches and the level at which the N-channel MOST is turned off are both equal to the sum of the threshold voltage of 103T to the N-channel and the threshold voltage of P-channel MO8T, which is a manufacturing problem. It is possible to overcome the effects of variations in

As described above, the present invention incorporates various new technologies to enable dispersion chords to be generated with different envelopes and to be built into an integrated circuit, and to improve conventional methods having similar functions. In comparison, it is significantly advantageous in terms of cost, and the ability to provide superior products at low prices is highly effective.

The gist of the present invention is, firstly, to enable IJ to produce wide tonal ranges and chords, and to reduce the number of external components as much as possible by eliminating external bipolar transistors.
It is driven by an S transistor.Secondly, a new protection circuit is implemented to strengthen the resulting protection circuit.Thirdly, a booster circuit is used to obtain a sufficient sound level.
The main point is that we have created a new all-in-one envelope generation circuit that is capable of producing dispersive chords and natural attenuated pronunciation.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional sound generation drive circuit 2, Fig. 2 is a waveform diagram explaining the circuit operation of Fig. 1, Fig. 3 is a circuit diagram showing a conventional attenuation sound generation method, and Fig. 4 (a). and Fig. 4(b) are waveform diagrams showing the differences between the conventional attenuated sound and the attenuated sound of the present invention, Fig. 5 is a circuit diagram showing an embodiment of the present invention, and Fig. 6 is the operation of the envelope cell. FIG. 7 is a circuit diagram showing the whisker signal generation circuit 2, FIG. 8 is an operational waveform diagram of the circuit in FIG. 7, and FIG. 9 is a waveform diagram explaining the action of the level detector.
Figure 0(a) and Figure 10(b) are structural diagrams and equivalent circuit diagrams showing conventional protection circuits, Figure 1(a) and Figure 11(
b) is a structural diagram and an equivalent circuit diagram showing the protection circuit 2 of the present invention;
Figure 12 is a circuit diagram showing an example of the level-7 lid, Figure 13.
14 is a circuit diagram showing another embodiment of the envelope circuit of the present invention, and FIG. 15 is a waveform diagram illustrating a further embodiment of the envelope circuit of the present invention. FIG. 20... Envelope cell, 30... Boost circuit, 40... Level detector, 50...
...Driver, 51.56...MOS transistor, 60-...Protection circuit, 70...Sounding body. Figure 2 Figure 3 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10

Claims (1)

[Claims] (1) The first MOS transistor includes a booster circuit and a first MOS transistor whose source and substrate are connected to the output of the booster circuit.
The drain of the MOS) transistor is connected to the sounding body through a protection circuit. (2) It has a booster circuit, a first MOS transistor whose north and substrate are connected to the output of the booster circuit, and an envelope generation circuit, and the output end of the envelope generation circuit is connected to the first MOS transistor. 1. A sounding element drive circuit, characterized in that the first MOS transistor is connected to the gate thereof, and the drain of the first MOS transistor is connected to the sounding element through a protection circuit. (3) a booster circuit; a first MOS transistor whose north and substrate are connected to the output of the booster circuit;
a second MOS transistor having a drain commonly connected to the drain of the S transistor and connected to one side of the power supply such as the north and the substrate; and a level detector;
The input terminal of the level detector is commonly connected to the gate of the first MOS transistor, and the output terminal is connected to the gate of the second MOS transistor.
S) Ranjisk goo) K connected, said first MOS
1. A sounding body drive circuit characterized in that the drain of the transistor and the second MOS transistor is connected to the sounding body through a protection circuit. (4) a booster circuit, a first MOS transistor whose north and substrate are connected to the booster circuit output;
A second MO with the OS + - transistor and drain connected in common, and the north and board connected to one side of the power supply.
S) transistor, a level detector, and an envelope generation circuit, the output of the envelope generation circuit being commonly connected to the gate of the first MOSFET transistor and the input terminal of the level detector; The output terminal of the level detector is connected to the gate of the second MOS) transistor, and the second MOS) transistor and the first MO8
A sounding body driving circuit characterized in that the drain of the transistor is configured to be connected to the sounding body through a protection circuit. (5) The sounding element driving circuit according to claim 1, wherein the protection circuit is constructed of an NPN bipolar transistor, a PNP transistor, and a resistor. (6) The booster circuit includes a coil, a third MOS transistor, a fourth MOS transistor, a first capacitor,
one end of the coil is connected to one side of a power supply, and the other end is connected to the drain of the third MOS transistor and the north of the fourth MOS transistor,
The gate and drain of the fourth MOS transistor are connected to one end of the first capacitor, and the other end of the first capacitor is connected to the other one of the power supplies together with the source and substrate of the third MOS transistor. The sounding element drive circuit according to claim 1, characterized in that the sounding element drive circuit is connected to the side. (The envelope generating circuit has at least a fifth, sixth, seventh, and eighth MOS) transistor and a second capacitor, and the drain of the transistor is connected to one side of the power supply. connected, the north and the board are connected to the sixth M
The drain of the OS transistor is commonly connected to one end of the capacitor and the gate of the seventh MOS transistor, and a sound generation signal for charging the second capacitor is applied to the gate of the sixth MOS transistor. and the fifth M
OS ) transistor and the seventh MO
The channels of the S transistors are connected in series, one end of the series circuit is connected to one side of the power supply, and the remaining end is connected to the output end of the booster circuit via a resistor. 3. The sounding element driving circuit according to claim 2, wherein the sounding element driving circuit is configured as an output terminal. (8) The envelope generating circuit further includes a flip-flop circuit, and the flip-flop is set by the sound generation signal and reset according to the output of the level detector, and the flip-flop circuit is in a reset state. 8. The sounding element drive circuit according to claim 7, wherein the second capacitor is configured to be discharged.