JPS59231663A - 系間共用dasdのマウント制御方式 - Google Patents

系間共用dasdのマウント制御方式

Info

Publication number
JPS59231663A
JPS59231663A JP58107509A JP10750983A JPS59231663A JP S59231663 A JPS59231663 A JP S59231663A JP 58107509 A JP58107509 A JP 58107509A JP 10750983 A JP10750983 A JP 10750983A JP S59231663 A JPS59231663 A JP S59231663A
Authority
JP
Japan
Prior art keywords
command
ipl
dasd
processing
task
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58107509A
Other languages
English (en)
Japanese (ja)
Other versions
JPH051488B2 (OSRAM
Inventor
Masanori Nishino
西野 雅範
Yoshimasa Saito
好正 斉藤
Keiki Nagai
永井 啓喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NTT Inc
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP58107509A priority Critical patent/JPS59231663A/ja
Publication of JPS59231663A publication Critical patent/JPS59231663A/ja
Publication of JPH051488B2 publication Critical patent/JPH051488B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP58107509A 1983-06-15 1983-06-15 系間共用dasdのマウント制御方式 Granted JPS59231663A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58107509A JPS59231663A (ja) 1983-06-15 1983-06-15 系間共用dasdのマウント制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58107509A JPS59231663A (ja) 1983-06-15 1983-06-15 系間共用dasdのマウント制御方式

Publications (2)

Publication Number Publication Date
JPS59231663A true JPS59231663A (ja) 1984-12-26
JPH051488B2 JPH051488B2 (OSRAM) 1993-01-08

Family

ID=14461005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58107509A Granted JPS59231663A (ja) 1983-06-15 1983-06-15 系間共用dasdのマウント制御方式

Country Status (1)

Country Link
JP (1) JPS59231663A (OSRAM)

Also Published As

Publication number Publication date
JPH051488B2 (OSRAM) 1993-01-08

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