JPS59229687A - 集積回路装置 - Google Patents

集積回路装置

Info

Publication number
JPS59229687A
JPS59229687A JP58103347A JP10334783A JPS59229687A JP S59229687 A JPS59229687 A JP S59229687A JP 58103347 A JP58103347 A JP 58103347A JP 10334783 A JP10334783 A JP 10334783A JP S59229687 A JPS59229687 A JP S59229687A
Authority
JP
Japan
Prior art keywords
signal
integrated circuit
external device
terminals
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58103347A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0233197B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Kobayashi
浩 小林
Tamio Saito
斎藤 民雄
Shigekazu Hori
堀 重和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58103347A priority Critical patent/JPS59229687A/ja
Publication of JPS59229687A publication Critical patent/JPS59229687A/ja
Publication of JPH0233197B2 publication Critical patent/JPH0233197B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Credit Cards Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP58103347A 1983-06-09 1983-06-09 集積回路装置 Granted JPS59229687A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58103347A JPS59229687A (ja) 1983-06-09 1983-06-09 集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58103347A JPS59229687A (ja) 1983-06-09 1983-06-09 集積回路装置

Publications (2)

Publication Number Publication Date
JPS59229687A true JPS59229687A (ja) 1984-12-24
JPH0233197B2 JPH0233197B2 (enrdf_load_stackoverflow) 1990-07-25

Family

ID=14351602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58103347A Granted JPS59229687A (ja) 1983-06-09 1983-06-09 集積回路装置

Country Status (1)

Country Link
JP (1) JPS59229687A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62109974U (enrdf_load_stackoverflow) * 1985-12-27 1987-07-13
JPH11330249A (ja) * 1998-04-30 1999-11-30 Micronas Intermetall Gmbh 集積回路をパラメ―タ化するための方法とそのための集積回路配置構成

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62109974U (enrdf_load_stackoverflow) * 1985-12-27 1987-07-13
JPH11330249A (ja) * 1998-04-30 1999-11-30 Micronas Intermetall Gmbh 集積回路をパラメ―タ化するための方法とそのための集積回路配置構成

Also Published As

Publication number Publication date
JPH0233197B2 (enrdf_load_stackoverflow) 1990-07-25

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