JPS5922919B2 - electronic clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fast-forward circuit used for functional testing of integrated circuits for watches.

Conventionally, the inspection of a watch IC is fast-forwarded using the method shown in FIG. 1 to shorten the inspection time.

In FIG. 1, 1 is a fast forward clock input terminal, 2 is a motor drive pulse generation circuit, 3 is a rotation detection sampling signal generation circuit, 4 is a rotation detection circuit, 5 is a motor drive circuit, 6 is a motor, 7 is a fast forward circuit. When performing fast forwarding, an AC signal having a higher frequency than the output of the fourth stage of the frequency dividing circuit is input to the clock input terminal 1 without connecting Xtal to the oscillation section (OSC). Therefore, the output from the fifth stage onwards has a uniformly high frequency, and the outputs of the motor drive pulse generation circuit 2 and the rotation detection circuit 3, and the pulse width and generation period at each point a, b, and c, are shortened. .
For example, if an AC signal that is four times higher than the output frequency of the fourth stage of the frequency dividing circuit is input to the clock input terminal 1, the pulses at each point a, b, and c, or the pulse width and generation period will be 1/1. It becomes 4. FIG. 3 shows the waveform when fast forwarding is not performed, and FIG. 4 shows the waveform when fast forwarding is performed. When such a shortened waveform is applied to a motor with inductance, the state of the current flowing is significantly different from that without fast forwarding. In such a state, the motor rotation detection circuit 4 does not operate normally, and the IC function cannot be tested. In order to eliminate the above-mentioned drawbacks, the present invention provides C.
The pulse generation period at each point a, b, and c is shortened and fast-forwarded without changing the pulse width at the point.

The purpose of this is to allow the motor rotation detection circuit to operate normally even during fast forwarding. The present invention will be explained in detail below with reference to the drawings.

FIG. 2 shows an embodiment of the invention. 2 is a motor, a drive pulse generation circuit, 4 is a rotation detection circuit, 5 is a motor drive circuit,
6 is a motor, 8 is a fast-forward circuit, 9 is a high-speed circuit, 10 is a fast-forward terminal, 11 is a rotation detection sampling signal generation circuit, and 12 is a pulse width extension circuit.

The difference from FIG. 1 is that the configurations of the fast-forward circuit 7 and the rotation detection sampling detection signal generation circuit 3 have been changed, and the fast-forward circuit 8
The rotation detection circuit 11 is configured to detect the V buzzer signal. Next, the operation will be explained.

When the fast-forward terminal 10 is open (no fast-forward), the output of the speed-up circuit 9 (NAND-0R gate), which is output to the fifth stage of the frequency dividing circuit, is equal to the output of the fourth stage. Further, the output of the pulse width extension circuit 12 is the product of the outputs of the sixth stage (512H2) and the seventh stage. At this time, the waveforms output at each point A, b, and c have the temporal relationship shown in Figure 3.
The signal at each point c is output every second. First, the motor drive pulse at point a is input to the motor drive circuit 5 to drive the motor 6. At the next moment, the c signal is input to the rotation detection circuit 4, and it is determined whether the motor has rotated or not. If it is not rotating, the rotation detection circuit 4 outputs "1" as the d signal (non-rotation detection signal) as shown in FIG. Then, "1" is input as the 3-input AND gate d signal of the motor drive pulse generation circuit 2, and an additional motor drive pulse is generated at point b. This occurs in the temporal relationship shown in FIG. When the c signal is input to the rotation detection circuit 4,
When it is determined that the motor is rotating, the d signal maintains the "O" level, unlike the state shown in FIG. Therefore, the d signal input to the 3-input AND gate of the motor drive pulse generation circuit 2 is maintained at the "0" level, and the b signal, unlike the state shown in FIG. 3, generates an additional motor drive pulse. "0" L... maintains the bell. In this way, an additional pulse (signal b) is output only when the motor does not rotate with the regular pulse (signal a), and the motor can be rotated without failure. Next, the operation when fast forwarding is performed by connecting the fast forwarding terminal 10 to VDD will be explained.

When the fast-forward terminal 10 is at the "1" level, the output of the speed-up circuit 9 (NAND-0R gate) of the fast-forward circuit 8 is equal to the output of the second stage of the frequency dividing circuit. Therefore, the outputs of the fifth to fifteenth stages of the frequency dividing circuit have four times the original frequency.
On the other hand, the output of the pulse extension circuit 12 is "1" regardless of the other two inputs (outputs of the sixth and seventh stages). As a result, the AC signals input to the motor drive pulse generation circuit 2 and the rotation detection sampling signal generation circuit 3 are only those from the eighth stage (512H2) to the fifteenth stage (4H2) of the frequency dividing circuit. In a circuit that generates a predetermined pulse using logical product as shown in FIG. 2, the pulse width is determined by the AC signal with the highest frequency, and the pulse generation period is determined by the AC signal with the lowest frequency. When fast forwarding, the highest frequency remains unchanged and the lowest frequency quadruples. Therefore, the pulse width of the output (signal c) of the rotation detection sampling signal generation circuit 11 remains unchanged, only the generation period is shortened, and the temporal relationship becomes as shown in FIG. In this way, during fast forwarding, only the generation period is shortened without changing the pulse width of the c signal? As described above, according to the present invention, the specific pulse width does not change during fast forwarding, so the waveform, peak value, etc. of the current flowing through the load can be made the same whether or not fast forwarding is performed.

Therefore, by using a motor or an inductive dummy load as a load connected to the output terminal for driving the motor 1, the functions of the clock circuit including rotation detection etc. can be tested by fast forwarding.

[Brief explanation of the drawing]

FIG. 1 shows a clock circuit diagram using a conventional fast-forwarding circuit. FIG. 2 is a circuit diagram showing one embodiment of the present invention. Figure 3 shows
FIG. 4 is a diagram showing the temporal relationship of waveforms of various parts in the circuits of FIGS. 1 and 2 when fast forwarding is not performed, and FIG. 4 is a diagram showing the temporal relationship of waveforms of various parts in FIG. 1 when fast forwarding is performed. . FIG. 5 is a diagram showing the temporal relationship of waveforms of various parts in FIG. 2 when fast-forwarding. 1... Clock input terminal, 2... Motor drive pulse generation circuit, 3...
...Rotation detection sampling signal generation circuit, 4...
... Rotation detection circuit, 5 ... Motor drive circuit, 6 ... Motor, 7 ... Rapid forward circuit,
8...Fast forward circuit, 9...High speed circuit, 10...Fast forward terminal, 11...Rotation detection sampling signal generation circuit, 12... ...Pulse width extension circuit.

Claims (1)

[Claims] 1. An oscillation circuit that generates a reference signal, a fast-forward switching circuit that inputs signals from two different arbitrary output terminals in the front stage of the frequency divider circuit to control the rate of fast-forwarding, and inputs the output signal of the fast-forward switching circuit. The latter part of the frequency dividing circuit receives pulses output from a plurality of output terminals of the latter part and synthesizes rotation detection pulses, and also receives pulses from the latter part and synthesizes pulses with higher frequencies among them during fast forwarding. a rotation detection sampling signal generation circuit that maintains a constant width of the rotation detection pulse whose pulse width is narrowed according to the rate of fast forwarding during fast forwarding by prohibiting input of the pulse with a gate circuit; An electronic timepiece comprising a motor drive circuit connected to the rotation detection sampling signal generation circuit via a rotation detection circuit, and a motor drive pulse generation circuit connected between the rear stage of the frequency dividing circuit and the motor drive circuit. .