JPS59228751A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To enable to protect very weak integrated circuit by interposing a resistor interposed between different diffused layers in addition to a protecting circuit between an external signal input pad a signal processing integrated circuit necessary for protecting the input. CONSTITUTION:An external signal is transmitted from an input pad through the input terminal 13 of an input protecting circuit and a diffused region 11 to an output terminal 14, and to a signal processing integrated circuit. This input protecting circuit has a P-type diffused layer 11 in an N-type semiconductor substrate 10, and an N-type diffused layer 12 in the layer 11. Input/output terminals are provided with P-type diffused layers 13, 14 at both sides of the layer 12. When the input voltage is low, the signal is transmitted through the layer 11 to the terminal 14. If only the input voltage increases, a large reverse bias is applied to the layer 11, and a depletion layer spreads as designated by a broken line. As a result, the impedance of the layer 11 between the terminals 13 and 14 increases, and a voltage transmitted to the terminal 14 is saturated.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input protection circuit which silently and totally cants input from an external input hand.

A semiconductor integrated circuit using a conventional input protection circuit will be explained with reference to FIGS. 1 and 2.

In general, a semiconductor integrated circuit is divided into an integrated circuit area 2 that actually processes signals from the outside, and an external area where an input Vin enters, as shown in FIG. A fMJK input protection circuit with a human power band is provided. In Figure 1.

In the case of the embodiment, a large gun pressure is not applied to the gate voltage VG of the signal processing integrated circuit region 2 because it is passed through the input protection circuit.

For example, a conventionally used input protection circuit is shown in FIG. The diffused resistor 6 and Z are connected in series, and a flang diode 8 is provided.

The diffused resistors 6 and 7 effectively form lamp diodes 6' and 7' with the substrate. The input protection circuit shown in FIG. 2 uses the rectification effect of the diode and the reverse breakdown vehicle pressure in principle, so the input terminal of the signal processing integrated circuit area 2 is exposed to static electricity. It is rarely effective if it is strong enough to withstand pressure. For example, in the case of the gate input protection circuit of an MO8 type concentrator circuit, the gate failure simulation thickness is 50.
It was effective when it was thick, at 0A or more, and the W\ breakdown voltage was large, at SOV or more. However, recently, with the increase in the degree of integration of integrated circuits, the gate i-oxide film is becoming thinner and the junction breakdown voltage is becoming lower.

In other words, as the static withstand voltage of signal processing integrated circuits is becoming lower, conventional input protection circuits are unable to protect signal processing integrated circuits from light, and integrated circuits are sometimes destroyed due to the static withstand voltage. K is becoming more and more likely to occur.

The present invention was developed to overcome the drawbacks of conventional integrated circuits as described above, and by using a novel input protection circuit, it is possible to create a semiconductor integrated circuit that is resistant to static pressure. It is something to give.

The semiconductor integrated circuit of the present invention is applied to the sixth and seventh adhesives 4. This will be explained using FIG.

FIG. 5 is a sectional view of the semiconductor region of the human power protection circuit used in the semiconductor integrated circuit of the present invention.

The external signal is transmitted from the input protection circuit to the output terminal 14 via the input terminal 16 diffusion region 11fr:
It is transmitted to the signal processing integrated circuit section. The human power protection circuit shown in FIG. 6 will be explained. As an example, a case of a 14-inch semiconductor substrate will be explained. P on the back of the N-type semiconductor substrate 10
(type diffusion) 11 is provided, and an N-type diffusion layer opening is provided in the P-type diffusion layer 11. The input/output terminals of the human power protection circuit are provided by P-type diffusion layers 15 and 14 that can make ohmic contact with both sides of the N-type diffusion layer 120, respectively. N-type diffusion layer 12
The potential is generally the same as that of the semiconductor substrate 10. Diffusion layer 15 is an electrode of semiconductor substrate 10 .

The principle of the human power protection circuit of the present invention will be explained.

First, when the input voltage ViN is a small value, the signal is transmitted to the output terminal 14 via the diffusion layer 11. Input pressure Vi
When N becomes large, the semiconductor substrate 1 is placed in the P-type diffusion layer 11.
A large reverse bias is applied between the 0 and the N-type semicircular substrate opening, and the depletion layer expands as shown by the broken line in FIG. As a result, the impedance of the diffusion layer 11 between the input terminal 16 and the output terminal 140 increases, and the voltage transmitted to the output terminal 14 becomes saturated.

FIG. 4 is a /C graph depicting the output magnetic pressure with respect to the input voltage of the human power protection circuit shown in FIG. As shown in Figure 4,
Even if the input pressure ViN is 1, the output magnetic pressure VOut of the input protection circuit will not exceed Vmay. That is,
The maximum inuyama force vomiting pressure Vmay of the input 1 protection circuit is controlled by the electrostatic withstand voltage υ of the signal processing integrated circuit connected after it. or can be obtained. The maximum output pressure Vmay of the input protection circuit can be controlled by the following parameters.

■ Depth of diffusion mortar 11 Hoe Concentration of diffusion layer 11 ■ Depth of diffusion layer 12 ■ Concentration of diffusion layer 12 ■ Shape of diffusion layer 12 ■ Impedance after the input protection circuit.

For example, in order to reduce Vmay f, the diffusion layer 12 can be made shallower by making the diffusion layer 11 shallower.

Further, Vmay can be reduced by reducing the impedance after the input protection circuit. V ay is not controlled to 5V.
For example, a 100A thin MO8 integrated circuit using modified English can be protected.

A specific embodiment of the present invention is shown in FIG. , the actual signal processing integrated circuit area 26, the input protection circuit 21 shown in FIG. 3, and the protection circuit 20 for protecting the input protection circuit 21 are connected in a series. The protection circuit 20 for protecting the input protection circuit may be a conventional protection circuit as shown in FIG.

Furthermore, if the output impedance is lowered by inserting the resistor 22 between the input terminal of the signal processing integrated circuit 26 that requires input maintenance and the substrate (another electrode may be used), it is possible to Even when heavy pressure is applied, the tonryu works will remain in the 5th position.
Since the current flows through the resistor as shown in the figure, the signal processing integrated circuit 26 is protected from large static electricity.

In the present invention, it is no secret that a part of the newly proposed circuit in the first half of FIG. 6 has a reverse conductivity type structure and has a protective effect of N6.

As is clear from the above explanation, in addition to the conventional protection circuit, a resistor 94 sandwiched between the diffusion layer and the external signal input hand and the signal processing integrated circuit that requires input protection is used. , very weak integrated circuits (e.g. gate warming kJ?- which is not possible with conventional protection circuits)
It has become possible to produce MO8 integrated circuits with less than 0 bus and integrated circuits (6tC) using PN junctions. Therefore, by protecting the entire FIJ of the present invention, it is possible to realize an integrated circuit with a high degree of integration.

[Brief explanation of drawings]

Fig. 1 is a diagram of an integrated circuit provided with a floor fiber circuit, Fig. 2 is a circuit diagram of a conventional protection circuit, and Fig. 6 is a diagram of a voltage summation element used in the protection circuit of the present invention. Fig. 4 is a custom-made diagram of the magnetic pressure limiter of Fig. 5, and Fig. 5 is a circuit diagram of an embodiment of the integrated circuit of the present invention. 1...Protection circuit, 2... ...Signal processing integrated circuit head, 6.4...
・・MOS transistor, 6.7・・・・Resistance,
6'7' 8... Teriode, 10.
...Substrate, 11...P-Wel
112.15...N Diffusion layer 41.5.14.
...P diffusion layer, 16.17 ... depletion layer, 20 ... conventional protection circuit, 22., ...M
(Against the above. Applicant: Daini Seidokusha Co., Ltd. Agent Patent Attorney: Figure 1, Figure 2, Figure 1, Figure 5)

Claims (1)

[Claims] a semiconductor substrate of a first conductivity type; a first diffusion layer of a first conductivity type and a conductive type provided within the semiconductor substrate; an input/output terminal provided within the diffusion layer; An input protection circuit is connected to the next stage circuit of the external signal power band, and the input protection circuit is provided within the layer and includes a second wide layer that limits the tidal current flowing between the input terminal and the output terminal. A semiconductor integrated circuit characterized by: