JPS59224141A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a contact with an active region of a channel stopping region by forming a film on the surface of a substrate in predetermined thickness and selectively implanting impurity ions by utilizing the difference of film thickness on the surface of the substrate generated by the film. CONSTITUTION:A pad oxide film 12 and a nitride film 13 are formed on a substrate 11 in succession, and left only in a predetermined section. An oxide film 14 is formed on the exposed surface of the substrate 11, and polysilicon 15 is shaped on the whole surface. P<+> impurity ions for a channel stop are implanted. Consequently, a P<+> impurity is implanted to the surface section of the substrate under the thin sections of the films 15, 14, 13, 12, a field region section except a prescribed range adjacent to an active region, through the thin sections of the films 15, 14, 13, 12 while being separated from the active region section. Accordingly, a channel stopping region 18 is formed parted from the active region section.

Description

[Detailed description of the invention] (Technical field) The present invention relates to a method of manufacturing a semiconductor device.

(Prior Art) The LOCO8 method is widely used as an element isolation technique in semiconductor device manufacturing methods. However, this L
In the OCO8 method, a large intermediate region called a bird's beak exists between the active region and the field region, which hinders high density.

In order to solve this problem with the LOCO8 method, a mask selective oxidation method was considered for framing. The method will be explained with reference to FIG.

Reference numeral 1 is a P-type silicon substrate. First, a pad oxide film 2 * 5ooi thick and a nitride film (first nitride film) 3 are sequentially formed on the entire surface of this substrate 1 to a 1oooa thickness, and then this nitride film 3 is formed.
By patterning the pad oxide film 2, the nitride film 3 and the rad oxide film 2 are left only in predetermined portions on the substrate 1 (FIG. 1(a)).

Next, a nitride film (
A second nitride film) 4 is formed to a thickness of 1500^ (Fig. 1(b)
)).

Thereafter, by dry etching the entire surface, the nitride film 4 is left only on the side surfaces of the nitride film 3 and the /F rad film 2 (FIG. 1(C)).

After this dry etching, ion implantation of r impurity for channel stop is performed. Then, the r impurity is implanted into the surface of the substrate other than the portion covered with the nitride films 3 and 4 and the pad oxide film 2. (FIG. 1(C)) After that, thermal oxidation treatment is performed. As a result, the nitride film 3,
A field oxide film 5 is formed to a thickness of 700A on the surface of the substrate other than the portions covered with the oxide film 4 and the flat oxide film 2. Also, at this time, the r impurity is thermally diffused into the substrate 1. Therefore, an r channel stop region 6 is formed under the field oxide film 5. (FIG. 1(d)) Thereafter, the nitride films 3 and 4 and pad oxide film 2 serving as a heat-resistant oxidation mask in the active region are removed. Then, ions are implanted into the exposed substrate portion to form a maactive region 7. (FIG. 1(e)) Bird's beaks are reduced when such a frame is formed using a mask selective oxidation method. On the other hand, in the mask selective oxidation method, the channel stop region 6 with a high concentration of P+ is in contact with the N''7 active region 7 and forms a PN junction with the active region 7. Decrease in junction breakdown voltage and MO
S) There is a problem in that the threshold value VTH of the transistor changes.

(Object of the Invention) The present invention has been made in view of the above points, and provides a method for manufacturing a semiconductor device that prevents the channel stop region from coming into contact with the active region and solves the conventional problems caused by the contact. The purpose is to provide.

(Example) An embodiment of the present invention will be described below with reference to FIG.

11 is a P-type silicon substrate. First, a pad oxide film 12i500A thick and a nitride film (first nitride film) 13 1.00OA thick Vζ are sequentially formed on the entire surface of this substrate 11, and then this nitride film 13 and a pad are formed. By patterning the oxide film 12, the nitride film 13 and pad oxide film 12 are formed on the substrate 11.
It is left only in the upper predetermined area (Fig. 2(a)).

Next, an oxide film 14 is formed to a thickness of 500X on the exposed surface of the substrate except for the portions where the nitride film 13 and the doped oxide film 12 are left. Thereafter, polysilicon 15 is formed on the entire surface of substrate 11 to a thickness of about 500 OA.

(FIG. 2(b)) Then, the polysilico y 15 ij s nitride film 13
It protrudes above the substrate 11 in a wide range with the notched oxide film 12 in the center, and covers the entire surface of the substrate 11.

Now, if we consider the polysilicon 15 and the oxide film 14 as well as the nitride film 13 and the notched oxide film 12 as one film, this film is formed thickly over the wide range;
In addition, the side portions are formed thinner. Furthermore, in terms of the thickness of this film in relation to the active region and the field region, this film is formed thickly on the active region and on a predetermined range of the field region adjacent to the active region, while it is thicker on the predetermined region. It is formed thinly over the peripheral field region except for the

Thereafter, ion implantation of P+ impurity for channel stop is performed at an implantation voltage of 240 KeV. Then.

The P+ impurity is added to the film (polysilicon 15. oxide film 14).
, nitride film 13. The pad oxide film 12 is implanted through a thin portion of the pad oxide film 12 into the underlying substrate surface, that is, into the field region excluding a predetermined area adjacent to the active region, away from the active region. (FIG. 2(b)) Next, after removing the polysilicon 15 and the oxide film 14,
A nitride film (second nitride film) 16' (r1500 thick) is formed on the entire surface of the substrate 11 including the nitride film 13 (see FIG. 2(C).
)).

Thereafter, by dry etching the entire surface, the nitride film 16 is left only on the side surfaces of the nitride film 13 and the pad oxide film 12 (FIG. 2(d)).

After this dry etching, a thermal oxidation treatment is performed.

As a result, a field oxide film 17 is formed to a thickness of 7000× on the surface of the substrate other than the portions covered with the nitride films 13 and 16 and the oxide film 12. Also, at this time, the f impurity is thermally diffused into the substrate 11. Therefore, an r channel stop region 18 is formed under field oxide film 17.

However, in this case, as a result of performing the ion implantation away from the active region, even if the impurities are thermally diffused, they do not reach the active region, and even if they do, they do not reach a high concentration, so the channel The stop region 18 is formed apart from the active region. (FIG. 2(e)) Thereafter, the nitride film 13, 16 and pad oxide film 12 serving as a heat-resistant oxidation mask in the active region are removed. Then, ions are implanted into the exposed substrate portion to form the N1 active region 19. (Fig. 2(f)) (Effects of the Invention) As is clear from the above embodiment, in the method of the present invention, a film is formed to a predetermined thickness on the surface of a substrate having a mask for selective oxidation, The resulting film thickness difference on the substrate surface is used to selectively implant impurity ions, and even if the impurities are diffused during subsequent selective oxidation, the impurities are prevented from reaching the active region. In addition, the ion implantation was performed at a distance from the active region so that the concentration would not become high even if the ion implantation reached the active region.
Since the channel stop region is formed apart from the active region and no PN junction is formed between the channel stop region and the active region, it is possible to improve the junction breakdown voltage and stabilize the threshold voltage VTR of the MOS transistor.

(Other Examples) Although the above embodiment describes the case where the present invention is applied to the mask selective oxidation method, the LOCO8 method, which is currently widely used, is also applicable to high junction breakdown voltage and threshold voltage. This invention can be applied for the purpose of stabilization.

Further, in one embodiment, polysilicon was used as the film formed on the surface of the substrate having a mask for 5-selective oxidation, but other films such as a CVD film may also be used.

[Brief explanation of drawings]

FIG. 1 is a sectional view with a frame for explaining a mask selective oxidation method, and FIG. 2 is a sectional view for explaining an embodiment of the method for manufacturing a semiconductor device of the present invention. 11...P-type silicon base layer, 13...Nitride film, 15
...Polysilicon, 17...Field oxide film, 1
8...Channel stop region, 19...N'~active region. Procedural amendment dated November 11, 1939, Director General of the Japan Patent Office Kazu Sugi Omata 1, Indication of the case, 1982 Patent Application No. 98066 2, Manufacturing method for semiconductor devices in the name of termination 3, Amendments made Relationship with the person's case Special ￥f Applicant (029) Oki Electric Works Co., Ltd. 4, Agent 5, Date of amendment order Showa year, month, day (Voluntary) deviance 6 栴j 7. Contents of the amendment attached. Street 2 Supplementary iF contents (1) Details %3 negative lines 17 to 19 [and...
...(#!1 figure (eJ) A device is formed. As one step, arsenic implantation is performed in order to form the source-drain. If only the final impurity profile of the region where the N+ layer is formed is shown, it will be shown in Figure 1 (e+). In Figure (e), what is the symbol 7 for the N II area?'' (2) Specificity Page 7, lines 12 to 14-1 ``And,
・・・・・・(Figure 2-(f)) After that, oxidation, impurity diffusion, insulating layer formation, wiring layer formation, deposition layer formation, etc. The desired device is formed by repeating the process several times. As one step, arsenic implantation is performed to form the source and drain. Figure 2 shows only the final impurity 70% failure in the region where the N+ layer is formed. (f) in Fig. 2 (in f+, the area of the N+ layer is indicated by the reference numeral 19.'') is corrected.

Claims (1)

[Claims] In a method for manufacturing a semiconductor device in which impurities for channel stop are ion-implanted into a semiconductor substrate and then selectively oxidized to form the entire field oxide film, the surface of the substrate having a mask for selective oxidation is ion-implanted to a predetermined thickness. By forming a film and selectively implanting ions of the impurity by utilizing the resulting film thickness difference on the substrate surface, even if the impurity is diffused during the subsequent selective oxidation, the impurity will be removed. 1. A method for manufacturing a semiconductor device, characterized in that the ion implantation is performed at a distance from the active region so that the ions do not reach the active region, and even if they do, the concentration is not high.