JPS59218732A - 半導体保護膜形成方法 - Google Patents
半導体保護膜形成方法Info
- Publication number
- JPS59218732A JPS59218732A JP58093221A JP9322183A JPS59218732A JP S59218732 A JPS59218732 A JP S59218732A JP 58093221 A JP58093221 A JP 58093221A JP 9322183 A JP9322183 A JP 9322183A JP S59218732 A JPS59218732 A JP S59218732A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor
- container
- vacuum
- vacuum container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58093221A JPS59218732A (ja) | 1983-05-26 | 1983-05-26 | 半導体保護膜形成方法 |
| US06/610,638 US4627991A (en) | 1983-05-26 | 1984-05-16 | Method for forming a protective film on a semiconductor body |
| DE19843419079 DE3419079A1 (de) | 1983-05-26 | 1984-05-22 | Verfahren zur bildung eines schutzfilms auf einem halbleiterkoerper |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58093221A JPS59218732A (ja) | 1983-05-26 | 1983-05-26 | 半導体保護膜形成方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59218732A true JPS59218732A (ja) | 1984-12-10 |
| JPH0118578B2 JPH0118578B2 (enExample) | 1989-04-06 |
Family
ID=14076500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58093221A Granted JPS59218732A (ja) | 1983-05-26 | 1983-05-26 | 半導体保護膜形成方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4627991A (enExample) |
| JP (1) | JPS59218732A (enExample) |
| DE (1) | DE3419079A1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5064683A (en) * | 1990-10-29 | 1991-11-12 | Motorola, Inc. | Method for polish planarizing a semiconductor substrate by using a boron nitride polish stop |
| JP5237833B2 (ja) * | 2007-01-22 | 2013-07-17 | パナソニック株式会社 | 半導体装置の製造方法及び半導体製造装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2836911C2 (de) * | 1978-08-23 | 1986-11-06 | Siemens AG, 1000 Berlin und 8000 München | Passivierungsschicht für Halbleiterbauelemente |
| SU836202A1 (ru) * | 1979-08-30 | 1981-06-07 | Могилевский технологический институт | Способ местного борировани стальныхдЕТАлЕй и COCTAB дл ЕгО ОСущЕСТВлЕНи |
| DD148349A1 (de) * | 1979-12-28 | 1981-05-20 | Gerhard Ebersbach | Verfahren zur herstellung extrem harter,verschleissfester schichten erhoehter haftfestigkeit |
| JPS56116673A (en) * | 1980-02-19 | 1981-09-12 | Sharp Corp | Amorphous thin film solar cell |
| US4436762A (en) * | 1982-07-26 | 1984-03-13 | Gte Laboratories Incorporated | Low pressure plasma discharge formation of refractory coatings |
| US4438183A (en) * | 1982-08-25 | 1984-03-20 | The United States Of America As Represented By The United States Department Of Energy | Photoelectrochemical cell having photoanode with thin boron phosphide coating as a corrosion resistant layer |
-
1983
- 1983-05-26 JP JP58093221A patent/JPS59218732A/ja active Granted
-
1984
- 1984-05-16 US US06/610,638 patent/US4627991A/en not_active Expired - Lifetime
- 1984-05-22 DE DE19843419079 patent/DE3419079A1/de active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE3419079A1 (de) | 1984-11-29 |
| JPH0118578B2 (enExample) | 1989-04-06 |
| US4627991A (en) | 1986-12-09 |
| DE3419079C2 (enExample) | 1992-07-02 |
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