JPS59218722A - 被膜形成方法 - Google Patents

被膜形成方法

Info

Publication number
JPS59218722A
JPS59218722A JP58092497A JP9249783A JPS59218722A JP S59218722 A JPS59218722 A JP S59218722A JP 58092497 A JP58092497 A JP 58092497A JP 9249783 A JP9249783 A JP 9249783A JP S59218722 A JPS59218722 A JP S59218722A
Authority
JP
Japan
Prior art keywords
discharge
film forming
forming method
photochemically reactive
reactive gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58092497A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0458174B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Tatsumi Hiramoto
立躬 平本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ushio Denki KK
Ushio Inc
Original Assignee
Ushio Denki KK
Ushio Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ushio Denki KK, Ushio Inc filed Critical Ushio Denki KK
Priority to JP58092497A priority Critical patent/JPS59218722A/ja
Publication of JPS59218722A publication Critical patent/JPS59218722A/ja
Publication of JPH0458174B2 publication Critical patent/JPH0458174B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
JP58092497A 1983-05-27 1983-05-27 被膜形成方法 Granted JPS59218722A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58092497A JPS59218722A (ja) 1983-05-27 1983-05-27 被膜形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58092497A JPS59218722A (ja) 1983-05-27 1983-05-27 被膜形成方法

Publications (2)

Publication Number Publication Date
JPS59218722A true JPS59218722A (ja) 1984-12-10
JPH0458174B2 JPH0458174B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-09-16

Family

ID=14055934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58092497A Granted JPS59218722A (ja) 1983-05-27 1983-05-27 被膜形成方法

Country Status (1)

Country Link
JP (1) JPS59218722A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030772A (ja) * 2003-12-19 2013-02-07 Mattson Technology Canada Inc 工作物の熱誘起運動を抑制する機器及び装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108231A (en) * 1980-02-01 1981-08-27 Ushio Inc Annealing method of semiconductor wafer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108231A (en) * 1980-02-01 1981-08-27 Ushio Inc Annealing method of semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030772A (ja) * 2003-12-19 2013-02-07 Mattson Technology Canada Inc 工作物の熱誘起運動を抑制する機器及び装置

Also Published As

Publication number Publication date
JPH0458174B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-09-16

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