JPS59211575A - Target for sputtering - Google Patents

Target for sputtering

Info

Publication number
JPS59211575A
JPS59211575A JP8606783A JP8606783A JPS59211575A JP S59211575 A JPS59211575 A JP S59211575A JP 8606783 A JP8606783 A JP 8606783A JP 8606783 A JP8606783 A JP 8606783A JP S59211575 A JPS59211575 A JP S59211575A
Authority
JP
Japan
Prior art keywords
sputtering
target
wafer
wirings
abnormal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8606783A
Other languages
Japanese (ja)
Inventor
Hidetoshi Yada
矢田 英俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP8606783A priority Critical patent/JPS59211575A/en
Publication of JPS59211575A publication Critical patent/JPS59211575A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/3407Cathode assembly for sputtering apparatus, e.g. Target

Abstract

PURPOSE:To provide a titled target which can decrease abnormal sputtering and prevent short circuiting between wirings and has high reliability by rounding or tapering the end parts of each face body of a sputtering member of a target on the side facing a target. CONSTITUTION:A sputtering member 22 of aluminum, etc. is provided on a supporting member 21 of copper, etc. and the end parts 23- of each face body of the member 22 on the side opposite from the member 21 are rounded to about 3-5mm. R, thereby obtaining a target. Formation of a film of aluminum, etc. on a semiconductor wafer by using such target with a sputtering device (not shown) is accomplished by positioning the rounded surface of the material 22 to face the wafer and performing sputtering, by which abnormal sputtering is considerably decreased and short circuiting between wirings is prevented.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、ス/fツタリング用メーグットの改良に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in a metering gear for skidding.

〔発明の技術的背景〕[Technical background of the invention]

周知の如く、半専体ワエへ上に1/等の被膜を形成する
ycは、第1図に示すようなスパッタ装置が用いられて
いる。
As is well known, a sputtering apparatus such as the one shown in FIG. 1 is used to form a 1/2 coat on a semi-dedicated wafer.

図中の1は、内部か約7 X I Q ” ’I’or
r  に保たれる真をボンf2に連結した真芋容器であ
る。
1 in the figure is internal or approximately 7
This is a sweet potato container in which the stem maintained at r is connected to the bomb f2.

この真空容器1の内部には、%L極となるスパッタリン
グ用ターガツト3が設けられている。このターガツト3
は、第2図に示す如く銅等からなる支持部□材4と直方
体形状のAI!、 kl/81等から:なるスパッタ#
H5とから構成されている。
Inside this vacuum vessel 1, a sputtering target 3 serving as a %L pole is provided. This targatsu 3
As shown in FIG. 2, the support member □ material 4 made of copper or the like and the rectangular parallelepiped AI! , kl/81 etc.: Sputter #
It is composed of H5.

前記真空容器1の内部のターガツト3と対間する位置に
は、半導体ウニ八6を保持する保持部材7が設けられて
いる。前記真空容器1内には、図示しない配管を通して
アルゴンガスが供給すれる。
A holding member 7 for holding a semiconductor mount 6 is provided inside the vacuum vessel 1 at a position opposite to the targate 3. Argon gas is supplied into the vacuum container 1 through a pipe (not shown).

〔背景技術の問題点〕[Problems with background technology]

しかしながら、前述[、たスパッタ装置に用いられる従
来のスパッタリング用ターガツトによれは、17473
部材6の端部8が直角形状をなしているため、異常スパ
ッタ現象が生じ、第3図(a〕、 (bJに示す如く、
本来膜厚0.7〜1.1μm程度の金属被膜9を部数す
べきところが、膜厚数μm〜数lOμmの異常被膜10
が部分的に生ずる。したがって、第3図(bJの点線部
分を拡人[−だ口4図の9.Cj<、前バ]:金施扱膜
9をパ、ターニングし、て配線11・・・を形1戊した
場合、配線17 r 7711’4j l”−)% ’
i(’+’ v% 1 g’ カ残存シテ”Q 絡にも
たらす恐ス圭かある。
However, according to the conventional sputtering target used in the sputtering apparatus mentioned above, 17473
Since the end portion 8 of the member 6 has a right-angled shape, an abnormal sputtering phenomenon occurs, as shown in FIGS. 3(a) and (bJ).
Although the metal coating 9 should originally have a thickness of about 0.7 to 1.1 μm, the abnormal coating 10 has a thickness of several μm to several 10 μm.
occurs partially. Therefore, in Fig. 3 (enlarge the dotted line part of bJ [9.Cj in Fig. 4], turn the gold-treated film 9, and form the wiring 11... into the shape 1). In this case, wiring 17 r 7711'4j l''-)%'
i('+'v% 1g') There is a risk that the remaining force will be brought into the relationship.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情kCtliMみてなされたもので、従
来と比べ”C異常ス・ぞンメ現象を低減して配線間の短
絡を防止しえるスパンタリング用ターダットを提供ゴる
こと金目的とするものでるる。
The present invention was made in view of the above-mentioned circumstances, and it is an object of the present invention to provide a spantering tardut that can reduce the C abnormality phenomenon and prevent short circuits between wirings compared to the conventional one. Ruru.

C発明の概要〕 本発明は、スパッタ部材のターゲットの各面体の少なく
ともウェハと対向する側の端部にアーノシ加工もしくは
テーノ4−加工のいずれか一方を施すことによって、異
常スパッメ現象を低減1−1配線間の短絡を防止できる
ものである。
C. Summary of the Invention] The present invention reduces the abnormal sputtering phenomenon by performing either Arnosi processing or Teno 4-processing on at least the end of each facet of the target of the sputtering member on the side facing the wafer. This can prevent short circuits between one wiring.

〔ざC明の実施例〕[Example of ZA C Ming]

以下、本発明の一実施例に係るスパンJ リング用l−
グソトケ第5図(al 、 (blに基づいて説明する
Hereinafter, a span J ring l- according to an embodiment of the present invention will be described.
The explanation will be based on Fig. 5 (al, (bl).

図中の21(Ii、例えは銅からなる支持部材である。In the figure, 21 (Ii) is a support member made of copper, for example.

この支持部材2]土には、1夕1]えはAJからなるス
パッタ部材22か設けられている。このスパッタ8iS
材22の各面体の削う1.支持部材2ノと反対側(又は
ウェハと対向する側)の端部23・・・には、例えは曲
亭半征31ツの光重かつけられている。なお、広1;1
部23・・・の丸りの半径1大体3〜5 ?、法の範囲
か好ま1−い。
A sputtering member 22 made of AJ is provided on the support member 2. This spatter 8iS
Cutting each face piece of material 22 1. On the end portion 23 on the side opposite to the support member 2 (or on the side facing the wafer), a light weight, for example, a light weight of 31 times, is attached. In addition, wide 1;1
The radius of the round of part 23... is approximately 3 to 5? , preferably within the legal range.

しかして、本発明によれは、スパッタ部材22の各面体
の支持部材2ノと反対側の端部23・・・Vζ半径3I
IAの丸みがつけられているため、5’S 常スパッタ
境象を、従米約10%でをンったのに対し、約3%まで
減少することかでき、配線間の短絡を防止できる。
According to the present invention, the end portion 23 of each facet of the sputtering member 22 on the opposite side from the support member 2 ... Vζ radius 3I
Since the IA is rounded, the 5'S sputtering condition can be reduced from about 10% to about 3%, and short circuits between wires can be prevented.

なお、本発明に係るスパンlリング用、J −rットは
、第5図(aJ 、 (bJ図示のものに限らず、例え
ば第6図に示す如くスパッタ部材22′の各面体の支持
部材2〕と反対側の端部にチー・(−加工(支持部材2
1の上面に対し15〜60度の傾斜)を施した構造のも
の、あるいは第7図に示す如くスパッタ部材22″の支
持部材21と反対側全体4略半球状にLだ414造のも
のでも上記実糺LJ1」と同様の効果が期待できる。
Note that the J-rt for spun rings according to the present invention is not limited to the one shown in FIGS. 2] and the opposite end of the support member 2).
1), or as shown in Fig. 7, the entire side opposite to the support member 21 of the sputtering member 22'' may have a substantially hemispherical L shape. The same effect as the above-mentioned Jitten LJ1 can be expected.

〔発明の効果〕〔Effect of the invention〕

以上計述した如く本発明によれは、異常スパッタ現象を
低減して配線間の短絡を防止し得る(g 和1%の商い
スパンメリング用ターガツトを提供できるものである。
As described above, according to the present invention, it is possible to reduce abnormal sputtering phenomena and prevent short circuits between wirings (a spunmeling target with a total weight of 1%).

【図面の簡単な説明】[Brief explanation of the drawing]

第1し1t;シスパッメ装置itの説明図、第2図は第
1図図示Qjスパッメ装置に用いられる従来のスパンタ
リングハJターケ゛ントの斜視図、第3図(a)は従来
のスパンタリングノ4−iターゲットを用いてクエへ表
面に金属被膜を形成した状態を説明するだめの断面図、
同図1bJ iは同図(a)の平面図、第4図は第3図
(1))の部分拡大平面図、8g5図(aJは木づ「明
の一玖施例に係わるスパッタリング用メーケ゛ントのi
j、lr Llli IAI、同図(【)jは同図(a
Jの平面図、811.6図及び第7図は大々本発明の他
の実施例を示ずスパソメリング用メーグソトの断面図で
ある。 1・・・真輩谷器、2・・・IA輩ポンプ′、7・・・
保持部ト4.2)・・・支持部材、22.22’  、
22”・・・スノ!ンク部Bs23・・・端部。 出鵜人代理人 弁理士 鈴 江 武 彦第1図 第2図 第3図 第4図
1st 1t: An explanatory diagram of the sysspame device IT, FIG. 2 is a perspective view of the conventional spunter ring J target used in the Qj spame device shown in FIG. 1, and FIG. - A cross-sectional view illustrating the state in which a metal film is formed on the surface of the cube using the i target,
Figure 1bJi is a plan view of Figure 3(a), Figure 4 is a partially enlarged plan view of Figure 3(1)), and Figure 8g5 (aJ is a sputtering make-up according to the example shown in Figure 1). i of
j, lr Llli IAI, same figure ([) j is same figure (a
The plan view of J, Figure 811.6 and Figure 7 are sectional views of a spasome ring machine without showing other embodiments of the present invention. 1... Shinya Taniki, 2... IA Guy Pump', 7...
Holding part 4.2)...Supporting member, 22.22',
22"...Snow! Nku part Bs23...End part. Takehiko Suzue, agent Patent attorney, Figure 1, Figure 2, Figure 3, Figure 4

Claims (1)

【特許請求の範囲】[Claims] スパソメ装が1を用いて半導体ワエハ上に被膜を形成す
る際に用いられるスパッタリング用ターガツトにおいて
、メーダントの各面体の少なくともワエハと対間する側
の端部にアール加工もしくはテーパー加工のいずれか一
方が糺されていることffi%徴とするスパッタリング
用ターガツト。
In a sputtering target used when a sputtering device 1 is used to form a film on a semiconductor wafer, at least the end of each face of the medant facing the wafer is rounded or tapered. A sputtering targat whose adhesive property is ffi%.
JP8606783A 1983-05-17 1983-05-17 Target for sputtering Pending JPS59211575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8606783A JPS59211575A (en) 1983-05-17 1983-05-17 Target for sputtering

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8606783A JPS59211575A (en) 1983-05-17 1983-05-17 Target for sputtering

Publications (1)

Publication Number Publication Date
JPS59211575A true JPS59211575A (en) 1984-11-30

Family

ID=13876355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8606783A Pending JPS59211575A (en) 1983-05-17 1983-05-17 Target for sputtering

Country Status (1)

Country Link
JP (1) JPS59211575A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63238269A (en) * 1987-03-26 1988-10-04 Mitsubishi Metal Corp Target for magnetron sputtering
JPH0246854U (en) * 1988-09-19 1990-03-30
JPH03191058A (en) * 1989-12-19 1991-08-21 Toshiba Corp Sputtering device
JPH06306592A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Ti target material for magnetron sputtering
JPH06306598A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Si target material for magnetron sputtering
JPH06306597A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Ti target material for magnetron sputtering
JPH06306596A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Si target material for magnetron sputtering
JP2007070715A (en) * 2005-09-09 2007-03-22 Idemitsu Kosan Co Ltd Sputtering target
JP2009127125A (en) * 2007-11-28 2009-06-11 Mitsui Mining & Smelting Co Ltd Sputtering target material and sputtering target obtained therefrom
WO2018069091A1 (en) * 2016-10-14 2018-04-19 Evatec Ag Sputtering source
US20230069264A1 (en) * 2021-08-30 2023-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Deposition apparatus, deposition target structure, and method

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63238269A (en) * 1987-03-26 1988-10-04 Mitsubishi Metal Corp Target for magnetron sputtering
JPH0246854U (en) * 1988-09-19 1990-03-30
JPH03191058A (en) * 1989-12-19 1991-08-21 Toshiba Corp Sputtering device
JPH06306592A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Ti target material for magnetron sputtering
JPH06306598A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Si target material for magnetron sputtering
JPH06306597A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Ti target material for magnetron sputtering
JPH06306596A (en) * 1993-04-23 1994-11-01 Mitsubishi Materials Corp Si target material for magnetron sputtering
JP2007070715A (en) * 2005-09-09 2007-03-22 Idemitsu Kosan Co Ltd Sputtering target
JP2009127125A (en) * 2007-11-28 2009-06-11 Mitsui Mining & Smelting Co Ltd Sputtering target material and sputtering target obtained therefrom
WO2018069091A1 (en) * 2016-10-14 2018-04-19 Evatec Ag Sputtering source
CN109804455A (en) * 2016-10-14 2019-05-24 瑞士艾发科技 Sputtering source
JP2019533762A (en) * 2016-10-14 2019-11-21 エヴァテック・アーゲー Sputtering source
CN109804455B (en) * 2016-10-14 2022-03-15 瑞士艾发科技 Sputtering source
US20230069264A1 (en) * 2021-08-30 2023-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Deposition apparatus, deposition target structure, and method
US11823878B2 (en) * 2021-08-30 2023-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Deposition apparatus, deposition target structure, and method

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