JPS592059B2 - calculator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a computer that can easily perform Signum calculations (sign function calculations).

In other words, the condition (X>0, X:
0, It is located on a calculator with a special key (the "Π mouth key").

For example, when performing the calculation f(x)=(-1)nA+(-1)mB, the following four calculation expressions are required depending on the conditions of n and m.

Conventionally, when performing such calculations, each variable ((-
1) Four calculation formulas are prepared depending on the sign of n, (-1)m), one of the four calculation formulas is selected depending on the solution of the variable part, and the calculation is executed. It was hot.

That is, FIG. 1 shows a flowchart showing the operation of a conventional computer, where C is the difference for the variable part (-1)n, and D is the difference for the variable part (-1)m.

One of the four arithmetic expressions is selected depending on the sign of the arrows C and D. In this way, in conventional calculators, it is necessary to prepare four arithmetic expressions to execute the above calculation example, so when the number of steps in the program increases and the calculation becomes complex, the number of steps in the program becomes enormous. In addition, the calculation operation was troublesome.

In view of the above-mentioned conventional drawbacks, the present invention provides a special signum key that commands the matching sign of the data of the variable part regarding the Sydanum calculation, and in response to this judge, the calculation control unit sends the calculation control signal. By outputting , various calculations are executed, and thereby operations and programs can be executed. ``It is designed to simplify the steps.

In the following, the present invention will be described with reference to the block circuit shown in the figure. In this embodiment, f(x)-(-1)NA+(-1)
The calculation of MB will be explained. In the figure, numerals 1 and 2 are registers for calculations, and data read from memory 1 or data input by key operations such as numeric keys are introduced from input A or input B to the corresponding registers, respectively.

This human power A is introduced into the register 1 via an AND gate 21 and an OR gate 23 by a control signal output from the arithmetic control section 7 to a line 51, and 1A of the register 1 is a sign digit. Input B is also connected to the line 53 from the arithmetic control section 7.
The signal is input to the register 2 via the AND gate 24 and the OR gate 26 by the control signal output to the register 2, and 2A of the register 2 is the sign digit.

The data in the arithmetic registers 1 and 1 constitute circulation paths through AND gates 22 and 25 into which the control signal output from the arithmetic control section 7 to the line 52 is introduced, and the data from the arithmetic control section 7 The arithmetic control signals output on lines 56 and 57 lead to the adder/subtractor 5 via the designated gate of gates 29-34.

The adder/subtractor 5 is configured to add the a input and b input or subtract the b input from the a input, and outputs a signal from the arithmetic control section 7 to the line 63; that is, output 017.
An addition or subtraction instruction is given to the adder/subtractor 5 by an addition command and a subtraction command by an output "07."

The output of the adder/subtractor 5 is introduced into the register 1 via a one-digit buffer 6, an AND gate 20 to which a control signal is applied via a line 50 from the arithmetic control section 7, and an OR gate 23.

3 and 4 are signum calculation registers, and data regarding the variable portion is introduced into the corresponding register from the input C or D from the storage means in which the data is stored.

That is, in response to an instruction from an operation key or program that instructs data in the storage means in conjunction with an operation key (D Watata key) that instructs a signum calculation, the arithmetic control section 7 outputs it to lines 54 and 55. The AND gates 27 and 28 are controlled by the control signal given to the register 3, and the data from the input C is introduced into the register 3 through the AND gate 27, and 3A of the register 3 is a sign digit.

Further, data from input D is conducted to register 4 via AND gate 28, and 4A of register 4 is a sign digit. Sign digits 3A and 4A of registers 3 and 4 above
If the data is negative (-), a logic 7 bit is introduced, and if it is positive (+), a logic "0" is introduced, and the output line 61 from the sign digit 3A is an AND gate 35. and output line 62 from sign digit 4A is input to AND gate 36.

Lines 58 and 59 from the arithmetic control section 7 are connected as the other inputs of the AND gates 35 and 36, and output is made to the lines 58 and 59 in response to the operation of the operation key.

Furthermore, the gate outputs of these AND gates 35 and 36 are introduced into the flip-flop 8 via an OR gate 37.

This flip-flop 8 is set if the sign digits of the registers 3 and 4 mentioned above are negative, and otherwise set if they are positive.

That is, when the sign digit 3A of the register 3 is negative, the output 0 pin is introduced from the line 61 to the AND gate 35, and when there is an output on the line 58, the AND gate 35 becomes conductive and the output 71/' becomes the output of the flip-flop 8. Introduced on the set side. Further, when the sign digit 3A is positive, the line 61 is output 2.02, and even if there is an output on the line 58, the AND gate 35 becomes non-conductive and there is no gate output. 8
The set side becomes the output 712 and is set. Similarly, the AND gate 36 is made conductive or non-conductive depending on the negative or positive state of the sign digit 4A of the register 4, and the flip-flop 8 is set when it is negative and the flip-flop 8 is set when it is positive. The set output of the flip-flop 8 is introduced from the line 60 to the arithmetic control section 7, and the set output 1! 1 is stored in the internal register in the arithmetic control section 7.

Also, when this set output is IO'', registers 3 and 4
The data is introduced into the arithmetic control unit 7 from lines 64 and 65, and it is determined whether the data is 10I or not, and when the result is that the data is I/0I, 10I is introduced into the internal register and further.
II'' is introduced into the internal register when it is not ol.

In the end, by operating the operation keys (Kuwadan/keys), the condition (X>0, X=0, X<0) of the variable part is detected from the sign and data of the variable part data, and the condition is confirmed. It is designed to be stored and introduced into the arithmetic control section 7. The arithmetic control unit 7 uses operation keys (
Input signals from the keyboard, numeric keys, and other fashion keys are introduced.

To explain the operation of the above-mentioned control circuit, the variable parts of (-1)n and (-1)m in the calculation example become -1, +1 or O depending on whether the variables of N and m are odd or even. The data of the variable part is introduced into the storage means. When executing the signum calculation, an operation key (SGN key) is operated to issue a command for the signum calculation, and in connection with this operation, a key operation is performed to specify the data of the variable part.

That is, the above (-1)n data is stored in the storage means (memory).
Suppose that data of (-1)m is introduced into C and also introduced into storage means D, then the above calculation example f(x)=(-1)
As for NA+(-1)MB, this signum calculation is executed by performing key operations such as SGNTEL flash, m ward, and m flash.

To explain sequentially in relation to this key operation, a signum calculation command is introduced into the arithmetic control unit 7 by the operation of the box key, and the variable part (-1) of the storage means C is input by the subsequent group key.
The data of n is specified, and this instruction is introduced into the arithmetic control section 7.

The arithmetic control section 7 outputs a signal on the line 54 in response to the above input to enable the AND gate 27, and the data in the storage means C is introduced from the input C into the signum calculation register 3. Then, the sign related to the introduced data is introduced into the code digit 3A, and 11'' is introduced for minus and 10I is introduced for plus.

In addition, in response to the [mutual block key], a signal is output on the line 58, and the AND gate 35 is enabled, and the above-mentioned code digit 3A is output.
The output from the digit 3A is inputted to the flip-flop 8 via an AND gate 35 and an OR gate 37, and if the sign digit 3A is negative, it is set, and if it is positive, it is set.

The set output of the flip-flop 8 is introduced from the line 60 to the arithmetic control unit 7, and when the set output is 11I (sign digit 3A is negative), 7-1'' is generated in the internal register of the arithmetic control unit 7.

Also, when the set output is IOI (sign digit 3A
is positive), the data in the signum calculation register 3 is introduced from the line 64 to the arithmetic control unit 7 to determine whether the data is IOI, and when the data is IOI, an LOI is generated in the internal register, and when the data is IO'' 7+11 is generated in the internal register when it is not.This operation is performed by setting the condition (
It detects X>0, X20, X<O).

Next, operate the flash key, which is a calculation instruction signal, and the prison key, which introduces data A to be input into calculation register 1 (the prison key is data, so it is actually a numeric key operation,
In this example, data is introduced into storage means A and the storage means (memory) is specified by the cause key, and the storage means (memory) is also specified for the B key. There is.

). Then, a signal is output from the arithmetic control unit 7 to the line 51, and the AND gate 21 becomes valid, and the data in the storage means A is introduced from the input A to the arithmetic register 1 via the AND gate 21 and the OR gate 23, and the above arithmetic control is performed. The data of the detection result generated in the internal register of section 7 is multiplied by the data of calculation register 1, and this result is introduced into calculation register 1. (However, it can be performed just like a normal multiplication operation.)

Next, an addition instruction is given by operating the Yen key, which is stored in the arithmetic control section 7.

Subsequently, data regarding the variable portion (-1) m of the storage means D is specified by operating the group key and then the m key, and this command is introduced into the arithmetic control section 7.

The arithmetic control section 7 outputs a signal on the line 55 in response to the above input to enable the AND gate 28, and the data in the storage means D is introduced from the input D into the signum calculation register 4.

Then, the code regarding the introduced data is 4 sign digits.
introduced into A. In addition, in response to the ward key, a signal is outputted to the line 59 to enable the AND gate 36, and the output from the sign digit 4A is inputted to the flip-flop 8 via the AND gate 36 and the OR gate 37. If the sign digit 4A is negative, it is set, and if it is positive, it is set. The set output of the flip-flop 8 is introduced from the line 60 to the arithmetic control unit 7, and '1-11,'0','+1' are stored in the internal register of the arithmetic control unit 7 in the same manner as in the detection of the above-mentioned condition. generated.

In other words, if the set output is 111/, -1 is generated, and if the set output is IOI, the data in register 4 is introduced from line 65 to arithmetic control section 7, and the data is output to //O.
//Determine whether or not and 70! This is to detect I/'+11. Next, the factor key of the arithmetic exponent and the arithmetic register 2
When the m key is operated to introduce data B to be input into the input circuit, a signal is output from the arithmetic control section 7 to the line 53, and the AND gate 24 becomes valid. The data of the detection result generated in the internal register of the arithmetic control section 7 and the arithmetic register 1 are introduced into the arithmetic register 2 via the
This result is stored in calculation register 1.
be introduced.

Since the arithmetic control unit 7 stores an addition instruction command using the Yen key, a condition result regarding the data in the signum calculation register 3, and a condition result regarding the data in the register 4, these are stored in the registers 1 and 2. Regarding the introduced data A+B, A-B, -A+B, -A-B1
One of the operations will be selected.

The arithmetic control unit 7 sends a signal to the Yoshi line 63 where it detects A+B.
It outputs a signal B to instruct the adder/subtractor 5 to add, and outputs a signal to the line 57 to enable the AND gates 30 and 32. The data of register 2 is introduced into the a side of the AND gate 32 and the OR gate 34.
is introduced into the b side of the adder/subtractor 5 through the adder/subtractor 5 to perform addition.

The result of the addition is input to the register 1 via the AND gate 20 and OR gate 23, which are output as signals from the buffer 6 and the arithmetic control section 7 to the line 50 and are enabled. When the arithmetic control unit 7 detects A-B, it outputs a signal IO'' to the line 63 to instruct the adder/subtractor 5 to perform a subtraction command, and similarly to the above, it enables the AND gates 30 and 32 to read the data in the register 1. The data of register 2 is introduced into the a side of adder/subtractor 5 and the data of register 2 is introduced into the b side of adder/subtractor 5, and the result is introduced into register 1.

When the arithmetic control unit 7 detects -A+B, it outputs a signal IO'5 to the line 63 to instruct the adder/subtractor 5 to perform a subtraction command, and outputs a signal to the line 56 to output the signal IO'5 to the AND gates 29, 33.
is valid, and the data in register 1 is passed to AND gate 38.
, the data in the register 2 is introduced into the a side of the adder/subtractor 5 via the AND gate 29 and the OR gate 31, and the result is introduced into the register 1.

When the arithmetic control 7 detects -A-B, a signal is sent to the line 63.
11 to instruct the adder/subtractor 5 to add an instruction, and enable AND gates 30 and 32 to transfer the data in register 1 to the a side of adder/subtractor 5 and the data in register 2 to the b side of adder/subtractor 5. and cause the result to be introduced into register 1.

As described above, in the present invention, the operation key instructs to detect the condition (X>0, and an arithmetic control unit that outputs an arithmetic control signal in response to the detection result, and the arithmetic control unit controls the arithmetic control signal in response to the detection result to execute various calculations. Since the conditions of the variable part can be easily detected using the above operation keys (ku wadan keys), this operation becomes extremely simple, and the arithmetic expression f(x)=(-1)NA+( -1) f(x)=SGN. C. X. A+SGN. D. X. B
It has the feature that various calculations can be performed by simply preparing one calculation formula, and the program steps can therefore be extremely simplified.

[Brief explanation of the drawing]

FIG. 1 is a flowchart for signum calculation by a conventional computer, and FIG. 2 is a block diagram showing a control circuit for controlling execution of signum calculation by the computer of the present invention. 1 and 2: register for calculation, 3 and 4: register for signum calculation, 5: adder/subtractor, 7: calculation control section, 8: flip-flop.

Claims (1)

[Claims] 1 Conditions for a certain variable X in an arithmetic expression (X>0, X=0,
<0) In executing signum calculations in which the calculation formula used differs depending on 0), a detection means for detecting the condition of the data in response to an instruction from the key, and an arithmetic control section for outputting an arithmetic control signal in response to the result of the detection means. A computer characterized in that the calculation control signal of the calculation control section causes calculations to be executed according to the conditions of the variable part.