JPS59204469A - Inverter device - Google Patents

Inverter device

Info

Publication number
JPS59204469A
JPS59204469A JP58077162A JP7716283A JPS59204469A JP S59204469 A JPS59204469 A JP S59204469A JP 58077162 A JP58077162 A JP 58077162A JP 7716283 A JP7716283 A JP 7716283A JP S59204469 A JPS59204469 A JP S59204469A
Authority
JP
Japan
Prior art keywords
output
circuit
outputs
carrier wave
inverter device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58077162A
Other languages
Japanese (ja)
Inventor
Yoshihiro Sekino
関野 吉宏
Masayuki Shibata
柴田 正之
Nobuhiro Hodaka
保高 伸洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daiichi Components Ltd
Original Assignee
Shinano Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinano Electric Co Ltd filed Critical Shinano Electric Co Ltd
Priority to JP58077162A priority Critical patent/JPS59204469A/en
Publication of JPS59204469A publication Critical patent/JPS59204469A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

PURPOSE:To reduce the size of a filter by applying carriers of reverse phases to two pulse modulators for controlling to open or close switching elements of two sets of converters, and combining the outputs of the converters, thereby enhanceing harmonic waves of AC outputs. CONSTITUTION:Converters 21, 22 are compared of switches 311-314, 315-318 made of semiconductor elements such as transistors to convert a DC of a DC power source 1 into AC. These switches 311-314, 315-318 are controlled to be opened or closed by two pulse width modulators, to which carriers of different phases of 180 deg. from each other are applied. The outputs of the converters 21, 22 are added through transformers 61, 62, and supplied through a filter 4 to a load 5. Or, the difference of the outputs of the converters 21, 22 may be produced.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、直流電圧電源から正弦波交流電圧を得るイン
バータ装置に関する。特にインバータ変換回路の半導体
スイッチ素子をパルス幅変調信号で開閉制御するインバ
ータ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to an inverter device that obtains a sinusoidal AC voltage from a DC voltage power source. In particular, the present invention relates to an inverter device that controls opening and closing of semiconductor switching elements of an inverter conversion circuit using a pulse width modulation signal.

〔従来技術の説明〕[Description of prior art]

第1図は、従来から使用されているインバータ装置の主
回路ブロック構成図である。第1図において、1は直流
電源、2は変換回路である。この変換回路2は、例えば
トランジスタGTOサイリスクなどの半導体素子からな
るスイッチ31〜34により構成され、外部からの制御
信号により開閉制御される。4は歪を含む直流電圧を正
弦波に成形するフィルタ、5はインバータの負荷である
FIG. 1 is a main circuit block diagram of a conventionally used inverter device. In FIG. 1, 1 is a DC power supply and 2 is a conversion circuit. This conversion circuit 2 is constituted by switches 31 to 34 made of semiconductor elements such as transistors GTO SIRISK, and is controlled to open and close by external control signals. 4 is a filter that shapes a DC voltage containing distortion into a sine wave, and 5 is an inverter load.

この開閉は、スイッチ32および33が開き、スイッチ
31および34が閉じている期間には、直流電源lから
電圧レベルEの正極性電圧がフィルタ4に与えられ、ス
イッチ32および33が閉じ、スイッチ31および34
が開いている期間には、電圧レベルEの負極性電圧がフ
ィルタ4に与えられる。したがって、スイッチ31およ
び34の対と、スイッチ32および330対とを交互に
開閉させることにより、変換回路2の出力にパルス状の
交流電圧が得られる。
During this opening and closing, when the switches 32 and 33 are open and the switches 31 and 34 are closed, a positive polarity voltage of voltage level E is applied from the DC power supply l to the filter 4, the switches 32 and 33 are closed, and the switch 31 is closed. and 34
During the period when the filter 4 is open, a negative polarity voltage of voltage level E is applied to the filter 4. Therefore, by alternately opening and closing the pair of switches 31 and 34 and the pair of switches 32 and 330, a pulsed AC voltage can be obtained at the output of the conversion circuit 2.

この交流電圧はフィルタ4を通して正弦波交流電圧に変
換され9荷5に供給される。このフィルタ4の出力に正
弦波を効率的に得るために、低次の高調波成分を零また
は十分に小さくするように半導体スイッチの開閉を制御
する。
This AC voltage is converted into a sinusoidal AC voltage through a filter 4 and supplied to a load 5. In order to efficiently obtain a sine wave as the output of the filter 4, the opening and closing of the semiconductor switch is controlled so that the low-order harmonic components are reduced to zero or sufficiently small.

第2図は、上記従来例インバータ制御回路のブロック構
成例を示す図である。第2図において、正弦波発振器1
1は基準となる交流の基準正弦波電圧を発生する発振器
である。その正弦波出力を減算器12のプラス入力に導
く。減算器12のマイナス入力には、インバータの出力
である正弦波交流電圧Vを導く。この減算器12では両
入力電圧の差電圧をとり、その差電圧を誤差増幅器13
の入力に導く。誤差増幅器13は入力された差電圧を増
幅し、正弦波に近い波形の出力を、変調信号としてpw
M(パルス幅変調)変調器14に与える。
FIG. 2 is a diagram showing an example of the block configuration of the conventional inverter control circuit. In FIG. 2, a sine wave oscillator 1
Reference numeral 1 denotes an oscillator that generates an AC reference sine wave voltage as a reference. The sine wave output is led to the plus input of the subtracter 12. A sine wave AC voltage V, which is the output of the inverter, is introduced into the minus input of the subtracter 12. This subtracter 12 takes the difference voltage between both input voltages, and the difference voltage is sent to the error amplifier 13.
leads to the input. The error amplifier 13 amplifies the input difference voltage and outputs an output with a waveform close to a sine wave as a modulation signal pw.
M (pulse width modulation) modulator 14.

さらにPWM変調器14の入力には搬送波発振器15か
らの三角波状の搬送波を与える。このPWM変調器14
は搬送波発生器からの搬送波を誤差増幅器13からの変
調信号によりパルス幅変調し、結果として得られるパル
ス幅変調された信号は論理回路16に導く。論理回路1
6はこのパルス幅変調された信号に基づいて変換回路2
のスイッチ31〜34にそれぞれ送出する。
Further, a triangular carrier wave from a carrier wave oscillator 15 is applied to the input of the PWM modulator 14 . This PWM modulator 14
pulse width modulates the carrier wave from the carrier wave generator with the modulating signal from the error amplifier 13 and leads the resulting pulse width modulated signal to the logic circuit 16. logic circuit 1
6 is a conversion circuit 2 based on this pulse width modulated signal.
The signals are sent to the switches 31 to 34, respectively.

この従来例回路の動作を第3図の信号波形図を参照して
説明する。第3図A〜Eは第1図および第2図に示すA
−E点の電圧波形図である。インバータ変換回路2の出
力正弦波交流電圧Aを基準正弦波発振器11の出力電圧
と比較し、その差信号によって変調信号Bを得る。さら
に搬送波発生器15から三角波状の搬送波信号Cを得て
、これをPWM変調器14の変調信号入力に与える。こ
の結果、変調信号BがIM送送波信号束りレベルが高い
期間に出力信号が送出されて信号りを得る。この信号り
を論理回路16にて、上記信号の逆極性の信号Eを得る
。この信号りおよびEでそれぞれ半導体スイッチ31 
34と32 33の各対を駆動する。
The operation of this conventional circuit will be explained with reference to the signal waveform diagram of FIG. Figure 3 A to E are A shown in Figures 1 and 2.
- It is a voltage waveform diagram of point E. The output sine wave AC voltage A of the inverter conversion circuit 2 is compared with the output voltage of the reference sine wave oscillator 11, and a modulation signal B is obtained from the difference signal. Furthermore, a triangular carrier wave signal C is obtained from the carrier wave generator 15 and is applied to the modulation signal input of the PWM modulator 14 . As a result, the output signal is transmitted during the period in which the modulated signal B has a high IM transmission/transmission signal bundle level, thereby obtaining a signal. This signal is sent to a logic circuit 16 to obtain a signal E having the opposite polarity to the above signal. With this signal RI and E, the semiconductor switch 31
34 and each pair of 32 and 33 are driven.

その結果インバータ変換回路2の出力には、波形Aの出
力が得られる。
As a result, an output of waveform A is obtained as the output of the inverter conversion circuit 2.

このようなインバータ装置では、搬送波信号波形fc、
基本波周波数をrsとすると、変換回路2の出力電圧に
含まれる高調波成分のスペクトルは第4図に示すように fc ”nXfs  (n=o、2.+l・”・・)と
なり、周波数fcの高調波成分が最も大きくなる。した
がって出力波形からすれば、搬送波の周波数を高くする
ほどフィルタ4は小形化が可能であるが、実際には搬送
波の周波数を高くすると半導体スイッチのオン・オフの
回数が増え、スイッチング損失が増大するという問題が
あるため、搬送波の周波数を高くすることができない。
In such an inverter device, the carrier signal waveform fc,
When the fundamental wave frequency is rs, the spectrum of the harmonic components included in the output voltage of the conversion circuit 2 becomes fc "nXfs (n=o, 2.+l・"...) as shown in FIG. 4, and the frequency fc The harmonic component of is the largest. Therefore, from the perspective of the output waveform, the higher the frequency of the carrier wave, the more compact the filter 4 can be.However, in reality, increasing the frequency of the carrier wave increases the number of times the semiconductor switch is turned on and off, increasing switching loss. Because of this problem, the frequency of the carrier wave cannot be increased.

したがってフィルタ4を小さくすることができない欠点
がある。
Therefore, there is a drawback that the filter 4 cannot be made smaller.

〔発明の目的〕[Purpose of the invention]

本発明は、このような欠点を解消するもので、半導体ス
イッチのオン・オフ回数を増すことなく、フィルタを小
形化するとともに、効率のよいインバータ装置を提供す
ることを目的とする。
SUMMARY OF THE INVENTION The present invention aims to eliminate such drawbacks, and to provide an efficient inverter device that reduces the size of the filter without increasing the number of on/off operations of the semiconductor switch.

(発明の特徴〕 本発明は、複数のスイッチ素子による変換回路として、
はぼ同等望ましくは同等の構成による2組の変換回路を
備え、その2組の変換回路の入力は共に直流入力端子に
並列に接続し、その2組の変換回路の交流出力の和また
は差をとって交流出力とする。それぞれその2組の変換
回路のスイッチ素子を開閉制御するために、2個のパル
ス幅変調回路を設け、その2個のパルス幅変調回路の搬
送波入力には互いに位相が】80°異なる搬送波を与え
るように構成することにより、各スイッチ素子の開閉周
波数は従来例装置と等しく、交流出力の高調波を従来例
装置の2倍にすることを特徴とする。
(Features of the Invention) The present invention provides a conversion circuit using a plurality of switch elements.
It is equipped with two sets of conversion circuits with preferably equivalent configurations, the inputs of the two sets of conversion circuits are both connected in parallel to the DC input terminal, and the sum or difference of the AC outputs of the two sets of conversion circuits is calculated. It is used as an AC output. Two pulse width modulation circuits are provided in order to control the opening and closing of the switching elements of the two sets of conversion circuits, and carrier waves whose phases are different from each other by ]80° are applied to the carrier wave inputs of the two pulse width modulation circuits. With this configuration, the switching frequency of each switching element is the same as that of the conventional device, and the harmonics of the AC output are twice as high as that of the conventional device.

〔実施例による説明〕[Explanation based on examples]

以下、本発明の実施例を図面に基づいて説明する。 Embodiments of the present invention will be described below based on the drawings.

第5図は本発明の第1実施例装置の要部ブロック構成図
である。第5図において、1は直流電源、21および2
2は変換回路である。変換回路21および22はトラン
ジスタなどの半導体素子からなるスイッチ311〜31
4および315〜318で構成され、直流電源lの直流
を交流に変換する。61および62は変換回路21およ
び22の各出力の和をとるための変圧器で、その二次巻
線を直列に結線する。4は歪交流電圧を正弦波化するた
めのフィルタ、5ばインバータの負荷である。
FIG. 5 is a block diagram of main parts of the apparatus according to the first embodiment of the present invention. In Fig. 5, 1 is a DC power supply, 21 and 2
2 is a conversion circuit. The conversion circuits 21 and 22 are switches 311 to 31 made of semiconductor elements such as transistors.
4 and 315 to 318, and converts the direct current of the direct current power supply l into alternating current. 61 and 62 are transformers for summing the respective outputs of the conversion circuits 21 and 22, and their secondary windings are connected in series. 4 is a filter for converting the distorted AC voltage into a sine wave, and 5 is an inverter load.

第6図は上記第1実施例の制御回路のブロック構成図で
ある。第6図において、正弦波発振器11は基準となる
交流の基準正弦波電圧を発生する発振器である。その正
弦波出力は減算器12のプラス入力に導く。減算器I2
のマイナス入力にはインバータ変換回路21および22
の加算出力である正弦波交流電圧(AI )を導き、こ
の減算器12で両型圧の差電圧をとる。その差電圧を誤
差増幅器13に導く。誤差増幅器13は入力された差電
圧を増幅し、正弦波に近い波形の出力を変調信号として
PWM変調器141および142に与える。
FIG. 6 is a block diagram of the control circuit of the first embodiment. In FIG. 6, a sine wave oscillator 11 is an oscillator that generates a reference alternating current sine wave voltage. Its sinusoidal output is led to the positive input of subtractor 12. Subtractor I2
Inverter conversion circuits 21 and 22 are connected to the negative input of
A sine wave alternating current voltage (AI), which is the addition output of the subtractor 12, is derived, and the difference voltage between the two types of pressures is obtained by the subtracter 12. The differential voltage is led to the error amplifier 13. The error amplifier 13 amplifies the input difference voltage and provides an output with a waveform close to a sine wave to the PWM modulators 141 and 142 as a modulation signal.

一方、PWM変調器141には搬送波発生器15からの
三角波状の搬送波を与え、さらに別のPWM変調器14
2には搬送波発生器15から三角波状の搬送波を反転増
幅器17を通すことにより 180°位相がずれ、振幅
は等しい三角波状の搬送波を与える。
On the other hand, a triangular carrier wave from the carrier wave generator 15 is applied to the PWM modulator 141, and another PWM modulator 14
2, a triangular carrier wave from a carrier wave generator 15 is passed through an inverting amplifier 17 to provide a triangular carrier wave with a phase shift of 180 degrees and an equal amplitude.

このPWM変調器141および142は、搬送波を誤差
増幅器13からの変調信号によりパルス幅変調する回路
であり、PWM変調器141と142の出力信号は、基
本波に対しては同位相であり、搬送波に対しては逆位相
のパルス幅変調された信号となる。
The PWM modulators 141 and 142 are circuits that pulse width modulate the carrier wave using the modulation signal from the error amplifier 13. The output signals of the PWM modulators 141 and 142 are in phase with respect to the fundamental wave, and the carrier wave is The result is a pulse width modulated signal with an opposite phase.

論理回路161および162は、このパルス幅変調され
た信号に基づいて変換回路21および22のスイッチ3
11〜314および315〜318の制御信号となるオ
ン・オフパターンを発生し、スイッチ311〜314お
よび315〜318を駆動するように構成される。
Logic circuits 161 and 162 switch switches 3 of conversion circuits 21 and 22 based on this pulse width modulated signal.
It is configured to generate an on/off pattern serving as a control signal for switches 11 to 314 and 315 to 318 to drive the switches 311 to 314 and 315 to 318.

次に、本発明の第1実施例回路の動作を回路各部の信号
波形を参照して説明する。
Next, the operation of the circuit according to the first embodiment of the present invention will be explained with reference to signal waveforms of each part of the circuit.

第7図A1〜に1は、上記第1実施例回路の各部A1〜
に1の信号波形である。インバータ出力の正弦波交流電
圧AIと、基準正弦波発振器11の出力電圧とを比較し
、その差信号によって変調信号B1を得る。さらに搬送
波発生器15からの搬送波信号C1と、反転増幅器17
を通した反転搬送波信号D1とを、それぞれPWM変調
器141および142に導く。PWM変調器141では
、変調信号B1が搬送波信号CIよりレベルが高い期間
に出力信号が送出されて信号E1を得る。また、PWM
変調器142では、変調信号B1が搬送波信号DIより
レベルが高い期間に出力信号が送出されて信号Flを得
る。論理回路1f+1または162では、そ0 輝特− 21 <      (D(J    O田 M変調器141に与え、一方、上記搬送波E3を利得1
の反転増幅器17にて位相反転し、搬送波F3としてP
WM変調器142に与える。
1 in FIG. 7 indicates each part A1 to A1 of the circuit of the first embodiment.
This is the signal waveform of 1. The sine wave AC voltage AI output from the inverter is compared with the output voltage of the reference sine wave oscillator 11, and a modulation signal B1 is obtained from the difference signal. Furthermore, the carrier wave signal C1 from the carrier wave generator 15 and the inverting amplifier 17
and the inverted carrier wave signal D1 passed through the PWM modulators 141 and 142, respectively. In the PWM modulator 141, an output signal is sent out during a period in which the modulation signal B1 is higher in level than the carrier wave signal CI, and a signal E1 is obtained. Also, PWM
In the modulator 142, an output signal is sent out during a period in which the modulation signal B1 is higher in level than the carrier wave signal DI, and a signal Fl is obtained. In the logic circuit 1f+1 or 162, the carrier wave E3 is given to the modulator 141 with a gain of 1
The phase is inverted in the inverting amplifier 17 of P as carrier wave F3.
WM modulator 142.

PWM変調器142の出力B3は、さらに反転回路21
にて位相反転を行い、論理回路164に入力する。論理
回路163および】64にて変換回路71および72の
駆動する信号に構成し、変換回路71および72を駆動
する。これにより第12図A3と03に示す信号が得ら
れ、これが変換回路7エおよび72の出力波形となる。
The output B3 of the PWM modulator 142 is further supplied to the inverting circuit 21.
Phase inversion is performed at , and the signal is input to logic circuit 164 . Logic circuits 163 and 64 configure signals for driving conversion circuits 71 and 72, and drive conversion circuits 71 and 72. As a result, the signals shown in A3 and 03 in FIG. 12 are obtained, and these become the output waveforms of the conversion circuits 7e and 72.

この両者の出力の差をとることによって第12図G3に
示す波形の出力が得られる。以上の実施例による説明で
は、変調波をインバータ出力と基準正弦半波の誤差信号
としたが、モータ制御用などの場合は正弦半波発振器出
力を変調信号としても差しつかえない。また、本実施例
では単相出力をインバータ装置に適用した場合について
説明したが、本発明を3組使用すれば、同様に3相イン
バータが構成できる。
By taking the difference between these two outputs, an output having the waveform shown in FIG. 12 G3 can be obtained. In the above embodiments, the modulated wave is an error signal between the inverter output and the standard sine half wave, but in the case of motor control, etc., the output of a sine half wave oscillator may be used as the modulating signal. Further, in this embodiment, a case has been described in which a single-phase output is applied to an inverter device, but if three sets of the present invention are used, a three-phase inverter can be configured in the same way.

〔発明の効果〕 このように、本発明によれば、1つの変調信号と、18
0°の位相差をもつ2つの搬送波信号とから得られる2
組のインバータの出力を和または差をとることによって
、インバータの出力に含まれる搬送波信号による高調波
成分の周波数を上げることができる。このために、フィ
ルタの遮断周波数を上げ、フィルタの負担を軽くするこ
とができる。さらに、半導体スイッチのスイッチング回
数が少なくてよいので、スイッチング損失を小さくする
ことができるインバータ装置が得られる。
[Effects of the Invention] As described above, according to the present invention, one modulation signal and 18
2 obtained from two carrier signals with a phase difference of 0°
By adding or subtracting the outputs of a pair of inverters, it is possible to increase the frequency of the harmonic component due to the carrier signal included in the output of the inverters. For this reason, the cutoff frequency of the filter can be increased and the load on the filter can be reduced. Furthermore, since the number of times the semiconductor switch is switched is small, an inverter device that can reduce switching loss can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例インバータ装置の主回路を示すブロック
構成図。 第2図は上記従来例のインバータ制御回路を示すブロッ
ク構成図。 第3図は上記従来例のインバータの各部信号波形図。 第4図は上記従来例のインバータ出力に含まれる周波数
スペクトル。 第5図は本発明の第1実施例回路を示す主回路5 のブロック構成図。 第6図は第1実施例回路の制御回路を示すブロック構成
図。 第7図は第1実施例回路の制御回路の各部信号波形図。 第8図は第2実施例回路の制御回路を示すブロック構成
図。 第9図は第2実施例回路の各部信号波形図。 第10図は第3実施例回路を示す主回路のブロック構成
図。 第11図は第3実施例回路の制御回路を示すブロック構
成図。 第12図は第3実施例回路の各部信号波形図。 特許出願人    信濃電気株式会社 −2代理人 弁
理士 井 出 直 孝 2.′、1−1 糺− 7 6 輝特− 」 〈   の(JO田 1 G1 児 7al 篤 8 図 第 9 回 7172 光12 図 第 11図
FIG. 1 is a block diagram showing the main circuit of a conventional inverter device. FIG. 2 is a block diagram showing the inverter control circuit of the conventional example. FIG. 3 is a signal waveform diagram of each part of the conventional inverter. FIG. 4 shows a frequency spectrum included in the inverter output of the above conventional example. FIG. 5 is a block diagram of a main circuit 5 showing a circuit according to a first embodiment of the present invention. FIG. 6 is a block configuration diagram showing a control circuit of the circuit of the first embodiment. FIG. 7 is a signal waveform diagram of each part of the control circuit of the first embodiment circuit. FIG. 8 is a block diagram showing the control circuit of the second embodiment circuit. FIG. 9 is a signal waveform diagram of each part of the circuit of the second embodiment. FIG. 10 is a block diagram of the main circuit showing the circuit of the third embodiment. FIG. 11 is a block configuration diagram showing a control circuit of the third embodiment circuit. FIG. 12 is a signal waveform diagram of each part of the circuit of the third embodiment. Patent applicant Shinano Electric Co., Ltd. -2 Agent Patent attorney Naotaka Ide 2. ', 1-1 纺- 7 6 Terutoku-'' (JOda 1 G1 child 7al Atsushi 8 Fig. 9th 7172 Hikari 12 Fig. 11

Claims (5)

【特許請求の範囲】[Claims] (1)直流電源入力端子と、 複数のスイッチ素子を含みこのスイッチ素子を交互に開
閉することにより上記入力端子に与えられる直流を交流
に変換して出力する第一の変換回路と、 この第一の変換回路とほぼ同等の構成であって上記入力
端子に与えられる直流を交流に変換して出力する第二の
変換回路と、 交流出力の基本波周波数を与える基本波周波数発生手段
と、 上記スイッチ素子の開閉周波数を与える搬送波発生手段
と、 上記基本波周波数発生手段の出力を変調入力とし、上記
搬送波発生手段の特定位相の出力を搬送波入力として、
上記第一の変換回路の複数のスイッチ素子にパルス幅変
調された開閉制御信号を与える第一のパルス幅変調回路
と、 上記基本波周波数発生手段の出力を変調入力とし、上記
搬送波発生手段の特定位相と反対位相の出力を搬送波入
力として、上記第二の変換回路の複数のスイッチ素子に
パルス幅変調された開閉制御信号を与える第二のパルス
幅変調回路と、上記第一および第二の変換回路の交流出
力を合成する回路手段と、 この回路手段の出力から基本波周波数成分を抽出するフ
ィルタと を備えたインバータ装置。
(1) a DC power input terminal; a first conversion circuit that includes a plurality of switching elements and converts the DC applied to the input terminal into AC and outputs the AC by alternately opening and closing the switching elements; a second conversion circuit which has almost the same configuration as the conversion circuit and which converts the direct current applied to the input terminal into alternating current and outputs the converted alternating current; a fundamental wave frequency generating means which provides the fundamental frequency of the alternating current output; and the above switch. carrier wave generation means for providing the switching frequency of the element; the output of the fundamental wave frequency generation means as a modulation input; and the output of a specific phase of the carrier wave generation means as a carrier wave input;
a first pulse width modulation circuit that provides a pulse width modulated opening/closing control signal to the plurality of switch elements of the first conversion circuit; and a modulation input that uses the output of the fundamental wave frequency generation means to identify the carrier wave generation means. a second pulse width modulation circuit that uses an output of the opposite phase as a carrier wave input to provide a pulse width modulated opening/closing control signal to the plurality of switch elements of the second conversion circuit; and the first and second conversion circuits. An inverter device comprising circuit means for synthesizing alternating current outputs of the circuits, and a filter for extracting a fundamental frequency component from the output of the circuit means.
(2)合成する回路手段は、第一および第二の変換回路
の交流出力の和をとるように構成された特許請求の範囲
第(1)項に記載のインバータ装置。
(2) The inverter device according to claim (1), wherein the combining circuit means is configured to sum the AC outputs of the first and second conversion circuits.
(3)合成する回路手段は、第一および第二の変換回路
の交流出力の差をとるように構成された特許請求の範囲
第(])項に記載のインバータ装置。
(3) The inverter device according to claim 1, wherein the combining circuit means is configured to take the difference between the AC outputs of the first and second conversion circuits.
(4)基本波周波数発生手段は、基準正弦波発振器と、
この発振器出力信号とインバータ装置の出力交流電圧の
差電圧をとる手段と、この差電圧を増幅する手段とを含
む特許請求の範囲第(1)項ないし第(3)項のいずれ
かに記載のインバータ装置。
(4) The fundamental wave frequency generating means includes a reference sine wave oscillator,
Claims 1 to 3 include means for taking a voltage difference between this oscillator output signal and the output AC voltage of the inverter device, and means for amplifying this voltage difference. Inverter device.
(5)搬送波発生手段は、三角波を発生するように構成
された特許請求の範囲第(1)項ないし第(4)項のい
ずれかに記載のインバータ装置。
(5) The inverter device according to any one of claims (1) to (4), wherein the carrier wave generating means is configured to generate a triangular wave.
JP58077162A 1983-04-30 1983-04-30 Inverter device Pending JPS59204469A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58077162A JPS59204469A (en) 1983-04-30 1983-04-30 Inverter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58077162A JPS59204469A (en) 1983-04-30 1983-04-30 Inverter device

Publications (1)

Publication Number Publication Date
JPS59204469A true JPS59204469A (en) 1984-11-19

Family

ID=13626086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58077162A Pending JPS59204469A (en) 1983-04-30 1983-04-30 Inverter device

Country Status (1)

Country Link
JP (1) JPS59204469A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61288780A (en) * 1985-06-13 1986-12-18 Toshiba Corp Controlling method for power converter
JPS6237070A (en) * 1985-08-05 1987-02-18 Mitsubishi Electric Corp Multiple type pulse width modulation inverter
EP0730339A2 (en) * 1993-04-02 1996-09-04 Mitsubishi Denki Kabushiki Kaisha Power inverting apparatus
US8680794B2 (en) 2009-11-26 2014-03-25 Panasonic Corporation Load drive system, motor drive system, and vehicle control system
JP2016005378A (en) * 2014-06-18 2016-01-12 株式会社日立製作所 Inverter and drive system employing the same
US20180361830A1 (en) * 2017-06-19 2018-12-20 Ford Global Technologies, Llc Dual electric drive a/c compressor system and method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610079A (en) * 1979-06-30 1981-02-02 Toshiba Corp Inverter
JPS56110405A (en) * 1980-01-31 1981-09-01 Toyo Electric Mfg Co Ltd Controlling method of phase difference for inverter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610079A (en) * 1979-06-30 1981-02-02 Toshiba Corp Inverter
JPS56110405A (en) * 1980-01-31 1981-09-01 Toyo Electric Mfg Co Ltd Controlling method of phase difference for inverter

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61288780A (en) * 1985-06-13 1986-12-18 Toshiba Corp Controlling method for power converter
JPS6237070A (en) * 1985-08-05 1987-02-18 Mitsubishi Electric Corp Multiple type pulse width modulation inverter
EP0730339A2 (en) * 1993-04-02 1996-09-04 Mitsubishi Denki Kabushiki Kaisha Power inverting apparatus
EP0730339A3 (en) * 1993-04-02 1997-04-02 Mitsubishi Electric Corp Power inverting apparatus
US8680794B2 (en) 2009-11-26 2014-03-25 Panasonic Corporation Load drive system, motor drive system, and vehicle control system
JP2016005378A (en) * 2014-06-18 2016-01-12 株式会社日立製作所 Inverter and drive system employing the same
US20180361830A1 (en) * 2017-06-19 2018-12-20 Ford Global Technologies, Llc Dual electric drive a/c compressor system and method

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