JPS59203984A - Electronic time-signal timepiece - Google Patents

Abstract

PURPOSE:To set a striking time optionally and easily through simple constitution by storing whether time-signal is performed or not for every regular time, and controlling the generation of a time-striking sound. CONSTITUTION:When a switch S2 is closed, a flip-flop F3 is reset and a low- level Q output becomes a time-signal inhibiting signal. At the same time, a flip- flop F5 is set and a monostable multivibrator W3 is triggered to impress a write command to a storage circuit M while controlling a multiplexer MP. Then, the counted value A of a duodecimal counter CT3 driven in response to the switch S2 and the forenoon signal of a flip-flop F4 driven by the flow signal of the counter CT3 are passed through a decoder DE to generate an address, writing the time-signal inhibiting signal in the address of AM one o'clock of the circuit M. The switch S2 is operated again to write the time-signal inhibiting signal in the addresses of AM two o'clock, three o'clock-. A time-striking permitting signal for every regular time is written similarly by operating a switch S1. Thus, a regular striking time is set optionally easily through the simple constitution.

Description

[Detailed description of the invention] The present invention relates to an electronic timepiece.

Some conventional electronic time clocks have a night time stop that stops the time signal only during certain hours at night, but this is inconvenient for people who live in different time zones, so there is a strong desire for something that can set the time of the time signal arbitrarily. It had been.

SUMMARY OF THE INVENTION Therefore, the present invention provides an electronic time signal clock that can arbitrarily set the time signal with simple configuration and operation.

An embodiment of the present invention will be described below based on the drawings. 1st
In the figure, Q is an oscillator, D is a frequency divider, TG is a time signal control signal generation circuit that determines the interval of time signal sounds, CG is a time signal generation circuit, and J is a sound generating device. H is an hourly signal generation circuit, OTl is a hexadecimal counter that counts the number of times reported, C, T2
OT is a hexadecimal counter for counting the hour, and OT is a hexadecimal counter for setting the time report. CM is a comparison circuit, MP is a multiplexer, DE is a decoder, M is a storage circuit consisting of RAM, and SG is an audio circuit. F1-F7 are flip-flop circuits, 01-G12 are gate circuits, W1-W
4 is a one-shot pulse generator, and ■ is an inverter. Sl is a switch for setting the morning time and alarm set time, S2 is a switch for setting the afternoon time and alarm prohibition time, and S3 is a switch Si+"
2 mode changeover switch.

Next, the operation will be explained. The correction operation for adjusting the counter CT2 to the current time will now be described. In this case, the switch S3 is closed to open the gate circuits G, , G5, and the flip-flop circuit F7 is triggered to open the gate circuit G8.

For example, if the current time is around 10 a.m., the switch S1 is closed ten times. The first closing of switch S1 causes gate circuit G3+G? The one-shot pulse generator W1 is triggered via +GQ, and its output pulse presets the counter OT2 to "1". On the other hand, the flip-flop circuit F7 is reset by the pulse from the gate circuit G8, the gate circuit G8 is closed, and no preset pulse is generated from the one-shot pulse generator W1 thereafter.

Incidentally, simultaneously with the above preset pulse, a pulse from the gate circuit G is supplied to the clock input of the counter CT2 via the gate circuit G2, but the above preset pulse takes priority and the counter OT2 receives "1" as described above. is preset.

The counter OT2 is incremented one by one by the second and subsequent pulses from the switch S0, and is set to "10" by closing ten times in total.

On the other hand, the flip-flop circuit F2 is reset by a pulse from the gate circuit G3, and AM is set.

In this way, the morning time is set by closing the switch S the number of times that the morning time occurs.

Further, when setting the afternoon time, the switch S2 is closed the same number of times as above, and in this case, the flip-flop circuit F2 is set and the afternoon time is set.

As described above, switch S or S2 can be set up to 12
By closing the clock, the morning or afternoon time is set in the counter OT2 and the flip-flop circuit F2.

Next, a description will be given of the operation of setting data indicating whether or not to make a time signal on the hour each hour from 1 to 24 o'clock.First, switch S3 is opened and gate circuit G4 is activated.

G6 is opened and a pulse is generated from the one-shot pulse generator W2 to reset the counter OT3 and the flip-flop circuit F4.

Therefore, a case will be described in which, for example, time reporting is prohibited from 1 am to 6 am, time reporting is performed from 7 am to 10 pm, and time reporting is prohibited from 11.12 pm. First, flip-flop circuit F is reset by flipping switch S2, and its output Q is set to 0. This becomes the data for the time signal.

The pulse due to the above closing of switch S2 is applied to the gate [IKG
It is supplied to the counter OT3 via a+Go, and its content becomes "1" and 1 o'clock is set.

The output of this counter OT and the flip-flop circuit lA1
The output of 't is fed to multiplexer MP. On the other hand, the above pulse that has passed through the gate circuit G9 is
o. It is assumed that the opening and closing of gate circuit 0.0 is controlled by the output of flip-flop circuit F1, and flip-flop circuit F is set on the hour and is currently in a reset state. Therefore, gate circuit GI
O is open, and the pulse passes through it, setting the flip-flop circuit F, and generating one pulse from the one-shot pulse generator W3. The output Q of the flip-flop circuit F selects the counter CiT from the multiplexer MP and the output of the flip-flop circuit F4, and the decoder DE specifies the address of 1:00 a.m. in the memory circuit M.

On the other hand, a write pulse is generated from the gate circuit Gll, and the time signal start data "On" from the flip-flop circuit F3 is written to the above address.The above pulse from the one-shot pulse generator W3 is also supplied to the audio circuit 8G, 8G is counter GT.

and receives the output of flip-flop circuit F4,
This generates an audio signal of "1 a.m." or "1 o'clock," and the sound is generated by the sound generating device.

Next, by closing the switch S2 again, "2" is set in the counter CT, and in the same manner as above, the time signal prohibition data tt On is written to the 2:00 a.m. address of the memory circuit M, and "2:00 a.m." is written. Alternatively, a voice saying "2 o'clock" is generated.

Similarly, switch S2 is used to report until 6:00 am [(,
Forbidden data is set.

Since a time signal will be given from 7 a.m., the time signal set data is set using the switch S1. That is, switch SI
By closing, the flip-flop circuit F3 is set and its output Q becomes II11I, which becomes the time signal set data. This time signal set data to1zp is written into the memory circuit M in the same manner as described above, and the time is notified by voice. In this way, the settings are made sequentially until 12 o'clock, and then when switch S2 is closed, the counter OT
3, a carry signal @ is generated and the Noritsubu flop circuit F4 is triggered and switched in the afternoon.

The time signal set data is set by the switch S1 until 10 p.m. And at 11.12pm switch S2
Set the time report prohibition data by.

As described above, time report prohibition data or time report set data is set for each correct poem of the first order starting from 1:00 a.m. using switches S1 and S2.

Next, the operation of time reporting based on the above data will be explained. When the hour is on the hour, one output is generated from the hour signal generation circuit H, and the flip-flop circuit F1 is set.

In response to this output, the counter OT2 is incremented by one and counts the hour. For example, if it is 10 o'clock, "10" is counted. This carry signal from the counter OT2 is supplied to the Noritsubu frog circuit F2, and outputs for determining morning and afternoon are generated. The outputs of this flip-flop circuit F2 and counter OT2 are supplied to multiplexer MP.

On the other hand, by the above set of unrip 70 tube circuit F1, 7
6F5 is reset and its output Q
7 lipfrog 1 from multiplexer MP by
The outputs of the variable F2 and the counter cT2 are selected and the memory circuit M is addressed. Further, a read command is given to the memory circuit M when the output of the flip flop circuit F5 is enabled. Therefore, if it is now 10 a.m., the data for 10 a.m., ie, the time signal set data 111H, is read out from the memory circuit M. This data enables the time signal generation circuit CG to operate.

Therefore, time reporting is carried out as follows. Gate circuit G by setting flip-flow 71 circuit 'F1
1 is open, and from the time signal control signal generation time 11TG,
A constant periodic control signal is passed through which determines the interval of the alarm tone. Each time this control signal is generated, a time signal is generated from the time signal generation circuit Ca, and a time signal is generated from the sound generating device.

The control signal is supplied to a counter OT, and the number of time reports is counted. When the number of time signals matches the contents of the counter OT2, an output is generated from the ratio axis circuit CM and the gate circuit G1□ is opened. At this time, the fall of the control signal causes the output of the gate circuit G12 to become II11I, triggering the flip-flop circuit Fc, and the output causes a pulse to be generated from the pulse generator W4, and the counter OT-, flip-flop circuit Fl+ '6 is liquided and the time report ends.

By the way, since the time signal prohibition data is stored in the memory circuit M from 11:00 pm to 6:00 a.m., the time signal prohibition data is read out at each hour (on the hour), and the time signal generating circuit CG becomes inoperable. status, and no time reporting is performed.

Note that confirmation of the set time by voice is not limited to the above. For example, when the switch s3 is closed and the data setting mode is entered, "1
After setting the 1 o'clock data, say ``Ready to set the hour'' and say ``
It is also possible to pronounce "2 o'clock set ready," and then similarly pronounce the time at which the next digit should be set.

Next, another embodiment will be described based on FIG. 2. Reference numeral A denotes a pulse generating circuit which receives the output from the frequency divider circuit and generates a narrow pulse with a cycle of, for example, 4 seconds. B is a detection circuit which produces an output when 24 hours are counted by the Noritsu flop circuit F4 and counter OT3. F8~'F
1o is a flip-flop circuit, 013 to G□6 are gate circuits, and v2 is an impark circuit. The same reference numerals as in FIG. 1 indicate the same parts.

The operation of writing data indicating whether or not to perform time reporting into the memory circuit M in the above (, q configuration) will be explained. First, the switch S3 is opened and the flip-flop circuit F4 + F
B v F9 and counter CT3 are reset. On the other hand, a pulse with a period of 4 seconds is generated from the pulse generating circuit A, and the flip-flop circuits F+o+FB'2 are reset and set, respectively. Furthermore, the above pulse is applied to the gate circuit G
The signal is supplied to the counter OT via the IB and also to the audio circuit SG via the gate circuit G15, producing a sound saying "1:00 a.m." or "1:00 a.m.". On the other hand, the outputs of the flip-flop circuit F4 and the counter OT3 are selected by the multiplexer MP as in the above embodiment, and the 1:00 am address of the memory time J%5M is designated.

Therefore, if you want to make a time signal at 1 a.m., the switch S should be turned off before the next pulse is generated from the pulse generation circuit A.
Close 1. This triggers the flip circuit F1o, its output Q becomes "'1", and the time signal set data is supplied to the memory circuit M. This data is written into the memory circuit M at the rising edge of the next pulse from the pulse generating circuit A.

In addition, when the time notification is not to be performed, the switch S1 is not closed. In this case, since the flip-flop circuit FIO remains reset, its output Q is time signal prohibition data "0", which is written into the memory circuit M by the next pulse.

Similarly to the above, the contents of the counter CT3 are incremented every time a pulse with a period of 4 seconds is generated from the pulse generating circuit A.
"2 a.m.", "3 a.m.", etc. are sequentially pronounced by the output of the audio circuit SG.

In order to make a time signal on the hour that has been sounded, the switch S0 is closed and the time signal set data is set until the next hour is sounded. If the time is not to be reported, no switch operation is performed.

In this way, data indicating whether or not to make a time report is set in the memory circuit M every hour on the hour, and when the setting is made until 24 o'clock, that is, 12 o'clock in the afternoon, an output is generated from the detection circuit B and the flip-flop circuit F8 is triggered. Ru. The output is possible tt Dn
Became gate circuit G engineer.

, G1. is closed, and the output Q opens the gate circuit 016. Therefore, when a pulse is generated from the pulse generating circuit A, it is passed through the gate circuit G16 to the flip-flop circuit F9.
is triggered, and the gate circuit G11 is closed due to its output.

The setting operation is thus completed.

Note that other operations are the same as in FIG. 1.

In each of the embodiments described above, the time signal generation circuit CG is inactivated by the time signal prohibition data to stop the sound, but the sound may be stopped at any point such as by closing the gate circuit G1.

As described above, according to the present invention, it is possible to arbitrarily set data as to whether or not to issue a time signal on the hour with a simple configuration and switch operation. Therefore, it is possible to arbitrarily set a time period for the alarm to stop ringing, such as when the user is away or when going to bed, and it is also possible to make the alarm sound every 2 hours or every 3 hours, if necessary. It is also possible to issue a time signal only at a specific hour to serve as an alarm. Furthermore, setting errors can be prevented by notifying the user of the time by voice each time the data is set.

[Brief explanation of drawings]

FIG. 1 is a logic circuit diagram showing one embodiment of the present invention, and FIG. 2 is a logic circuit diagram showing another embodiment.
Memory @ path Sl, S,...Switch OT1~OT,...Counter L...Sound generation device Ca...Time signal generation circuit Person: Seikodai Co., Ltd., Koo J.・1 Agent: Patent attorney: Tsutomu Mogami

Claims (1)

[Claims] A memory circuit that stores data on whether or not to make a time signal for each hour, a setting device that sets the above data in this memory circuit, a counting circuit that counts the hour, and a current state based on the output of this counting circuit. a selection circuit that reads data corresponding to the hour on the hour from the memory circuit; a time signal device that generates a time signal sound a number of times corresponding to the content of the counting circuit on the hour; and a control circuit for controlling the generation of a time signal sound from the time signal device.