JPS59195737A - Print controlling system - Google Patents

Abstract

PURPOSE:To print characters and a graph in the same line to use a print form efficiently by setting a frame space code to a graph insertion position and accessing a graphic buffer for the frame space code to write data in an image buffer. CONSTITUTION:A master CPU11 commands to a slave CPU25 to generate a graph in a graphic buffer GB32 through a graphic display controller GDC30, and data is displayed on a CRT24. Next, a frame space is designated to the graph insertion position in a display file 15, and data stored in the file 15 is edited again. Stored data is read out from the file 15 to a printer controller PRC31 through a common fubber 20 to print sentence data. When printing reaches the area of the frame space, a control part 17 generates a control word with software and gives it to the PRC31, and graphic data is read out from the GB32 through the GDC30 to print the graph. Thus, characters and the graph are printed in the same line even when graphs are mixed in documents.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a print control system when graphics such as graphs are mixed in a document.

[Prior art and its problems]

Conventionally, in electronic computers, Japanese word processors, etc., when graphics such as graphs are mixed in a document, document data stored in a document memory 1 and graphic data stored in a graphic memory 2 are used as shown in FIG. is sent to the print control unit 3 and printed on the print paper 4, but
Document data is printed using a normal print write command, and graphic data is printed on different lines in an all-graphic print mode. That is, as shown in FIG. 1, the document data 5 and the graphic data 6 are printed on different lines and completely separated. In this case, C
Even if you copy the entire surface of the RT display area at a printing ratio of 1:1, it will only be the size of a postcard, so if you use line printer paper, which is commonly used as print paper 4, the graphic data 6 This results in areas 7 in which no printing is done at all on the side parts. As described above, in the conventional printing method, when graphics such as graphs are mixed in a document, there is a problem in that a waste area 7 is created that is not printed.

[Purpose of the invention]

The present invention has been made in view of the above points, and allows document data and graphic data to be arbitrarily printed on the same line even when figures such as graphs are mixed in a document, and printing paper can be used efficiently. It is an object of the present invention to provide a print control method that can equalize the character spacing in lines containing only text and lines containing text and graphs.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Second
In the figure, 1 is a document memory that stores document data;
2 is a graphic memory that stores graphic data. The document data and graphic data are read out by the print control section 3A and printed on the cylinder paper 4. In this case, the print control unit 3A controls the document data 5a and the graphic data 6 to be printed in a mixed manner on the same line. Furthermore, the print control unit 3A controls so that the printed character positions of the document data 5 in a line in which only text is printed and the document data 5a in a line in which text and graphs are mixed are aligned to the same position.

Next, the overall circuit configuration of the present invention will be explained with reference to FIG. In the figure, 1 is a master CPU, and this master CPσ11 is connected to a ROM IJ via a pass line 12.
, direct memory access controller (hereinafter abbreviated as DMAC) 14, display file 1
5. A control unit 17 equipped with a CRT buffer 16,
A CRT controller 18, an interface 19, and a common buffer 20 are connected. Document data is written to the CRT buffer 16, and the document data is
According to the control of the CRT controller 18, the data is read out to the one-screen buffer 2. The document data written in the one-screen buffer 21 is converted into dot pattern data by the character generator 22 and sent to the CRT display section 24 via the dart circuit 23. Further, 25 is a slave CPU, and this slave CPU 25 includes a memory 27 storing control programs such as O8 via a pass line 26, a ROM 2B, a DMAC 29, and a graphic degradation controller (hereinafter abbreviated as GDC). ) 30, printer controller 31, character generator 22, interface 19, and common buffer zo are connected. Then, the GDCJO writes graphic data to the graph 4y/9th buffer 32 and displays it on the CRT display section 24 via the dirt circuit 23. Further, document data sent from the disk gray file 15 is written into the printer controller 3I, and graphic data held in the graphic buffer 32 is written via the GDC 30. This printer controller 31 sends the input document data to the character generator 22! The graphic data is outputted as it is via the printer interface 33 and printed by the printer 34.

Next, the general operation of the circuit shown in FIG. 3 will be explained with reference to FIG. 4. First, a graph creation process is performed as shown in FIG. 4 (1). In this graph creation process, the mask CP
U J Z sends a command to the slave CPU 25 to activate it, and the graphic d7 buffer 3 is sent via the GDC 30.
2. Create the desired graph. The data written in this graphic buffer 32 is outputted via the dart circuit 23 and displayed on the CRT display section 24.

Next, the graph insertion position is determined as shown in FIG. 4(2). That is, the area to be hard-copied is specified for the displayed graph. This hard copy area is specified at its starting position (Xl.

Yl) and the end position (X2).

This is done by specifying Yx). Also, in the Disgray file 15, a frame is drawn at the position where the graph is to be inserted. In this frame, Sidi Rui File 15
The stored data within will be re-edited. Next, as shown in FIG. 4(3), the printer controller 31 is initialized (7° link open), and the document data is printed in FIG. 4(4). That is, storage data is transferred from the display file 15 to the common buffer 20.
The document data is read out to the printer controller 31 via the printer controller 31, and the document data is printed. In this case, the disk file 15 contains
In a line containing only text, a control code and a character code are stored as shown in FIG. 4 (4). The printing of the document data continues as long as the line data consisting only of text is read from the disk gray file 15. And display file 1
As the data readout progresses and reaches the area where the inside frame is being read, the control unit 17 reads the control code, mixed printing declaration status, and hard copy area designation (X
t + Yt )+ (X2 rY2 ), a control word consisting of a dummy code is created by software and given to the printer controller 31. Thereafter, the control unit 17 reads line data including a character code and a frame code (FFOO) from the disk gray file 15 as shown in FIG. The printer controller 31 prints characters in the character code area in the same way as in the text-only line, but in the frame area, the designated area (X1
+Yt) + (X21Y2) graphic data is read and printed. Similar printing processing is performed while line data including character codes and frame codes are being read from the disk gray file 15. When the reading of the line data including the character code and the frame code from the Disgray file 15 is completed, the control section 17 controls the control code, the mixed printing end declaration, and the dummy code, as shown in FIG. 4 (7). A word is created by software and output to the printer controller 3. As a result, the printer controller 31 returns to the normal printing mode, and then performs normal printing on the data read from the disk gray file 15, as shown in FIG. 4(8). When all printing is completed, the printer is closed as shown in FIG. 4 (9).

Next, details of the printer controller 3 shown in FIG. 3 will be explained with reference to FIG. 5. In the figure, reference numeral 41 denotes a code conversion unit that converts the character code sent from the Disgray file 15 via the common buffer 2o into a corresponding address of the character generator 22, and inputs it into the code buffer 42. This code buffer 42 is controlled in writing and reading by a code buffer control section 43, temporarily stores the code converted by the code conversion section 4, and provides it to the code discrimination section 44. This code determination unit 44 determines whether the code given from the code buffer 42 is a character code (K code) or a frame code. When the first in-frame code is detected, the detection signal is outputted, and an internal free-lag frog 45 is set to temporarily stop the operation. When the code discrimination section 44 discriminates that the input code is a character code, it outputs the character code together with a discrimination signal to the character generator address register (hereinafter abbreviated as CG address register) 46, and the character generator 22 outputs the character code together with a discrimination signal. Specify the address. The dot pattern data read out from this character generator 22 is r
-) The image is sent to the vertical/horizontal conversion circuit 48 via the circuit 47, and after vertical/horizontal conversion is performed, it is written into the image/9/9 file 49. Since the electrodes of the print head in the printer 34 are arranged in the vertical direction, the vertical/horizontal conversion circuit 48 converts the output of the character generator 22 in the vertical direction in accordance with this arrangement. Writing and reading of the image buffer 49 is controlled by an image buffer control section 50, and the data held therein is sent to the printer 34 via the interface 33.

Further, the character code discrimination signal, in-frame code discrimination signal, first in-frame discrimination signal, and write clock outputted from the code discrimination section 44 are sent to the code buffer control section 43 via the OR circuit 51. Further, the character code discrimination signal and the first in-frame code discrimination signal output from the code discrimination section 44 are sent to the dart circuit 47. Further, the first in-frame code discrimination signal is sent to the graphic control section 52. This graphic control unit 52 receives mixed printing declaration status, hard copy area designation data (X1+Yt) (X21Y2), or mixed printing end declaration status sent from the control unit 17 in FIG. 3 via the common buffer 20. is input. Further, the mixed printing declaration status is input to the set terminal S of the declaration flip-flop 53. Furthermore, the graphic control section 52 is given line break control data from a line break control section 54 . This line feed control section 54 outputs line feed control data of 24 dots for a character print line or 6 dots specifying the line spacing of character print when performing printing processing of graphic data, and the output data is used for the above-mentioned graphic control. In addition to the part 52, the signal is sent to the printer 34 via the interface 33 as a life force signal LF. The graphic control section 52 reads graphic data in a designated area from the graphic buffer 32 in accordance with each of the input data, and outputs it to the vertical/horizontal conversion circuit 48 via the r-t circuit 47. Then, the graphic control unit 52
Every time reading of one line of data from the graphic buffer 32 is completed, a 1-line P signal is outputted to the reset terminal R of the Fritsuno Frog 45 provided in the vertical/horizontal conversion circuit 48 and the code discrimination section 44. input. When this fritsunoflora f45 is reset, the code discriminator 44
resumes operation. Furthermore, the graphic control section 5
2 gives a reset signal to the declaration flip-flop fss when data reading of the designated area from the graphic buffer 32 is completed. The output of the declaration flip-flop 53 is sent to the code discriminator 44 and is also input to the enable terminal E of the mode flip-flop f55. On the other hand, the code buffer control unit as specifies the digits for the code buffer 42 after the code buffer length data is set, but what if it specifies up to the last digit?
Outputs low signal. This gellow signal is input to the binary counter 61 as a trigger signal. The output of the binary counter 61 is input to the mode flip-flop 55 via the one-shot circuit 62. This mode flip-flop 55 performs an inverting operation each time a '1'' signal is input while an enable signal is being applied, and the operation mode is set by its output.In other words, the mode flip-flop 55 ,tt
A normal printing mode PD is established when the O'' signal is output, and a ruled line mode KD is established in which graphic data is printed between each character line when the @1'' signal is output.

The output of the mode flip-flop 55 is sent to the code modification section 41 and line feed control section 54, as well as to the common buffer 2o.

Further, the output of the one-shot circuit 62 is sent to the printer 34 as a printer write command, and is also sent to the mask CPU 11 via the interface 19 as a 1-line processing signal.

Further, the output of the one-shot circuit 62 is sent to the image puffer control section 50. The image buffer control section 50 further includes a carry signal outputted every 24 dots from the CG address register 46, a code detection signal in a frame outputted from the code discrimination section 44, and an l line outputted from the graphic control section 52. The end signal is input via the OR circuit 63.

Next, details of the main parts in FIG. 5 will be explained. First, details of the graphic control section 52 will be explained with reference to FIG. Hard copy area designation data (Xl, Yt) r (X2, y,
) are X, set latch circuit 71a, X2 set latch circuit 7 l b , Y.

Set latch circuit 72a, Y22 set latch path 72b
are set respectively. The data X1 set in the X1 set latch circuit 71a is latched by the X latch circuit 74 via the data setter/IP register 73 according to the start declaration status. The data latched in the X latch circuit 74 is extracted by the 72-byte control unit 75.
At the same time, it is input to the 24'' adder circuit 76 and the arithmetic circuit 27.The arithmetic circuit 77 is also inputted with the X27'-adder held in the X2 set latch circuit 71b.The arithmetic circuit 77 is r24 1x2-
The calculation result is output to the vertical/horizontal conversion circuit 48, and when the calculation result becomes ``24'', the output line 77! Outputs a 1-line output signal from L. This 1-line processing signal is input to the 72-byte extraction control section 75, and is also input to the vertical/horizontal conversion circuit 48.
sent to. Furthermore, the output of the 24-adder circuit 76 is
The signal is sent to the X latch circuit 74 via the data monograph 23.

The X latch circuit 74 performs a latch operation in response to the start declaration status input via the OR circuit 78 and the end signal from the 72-byte extraction control section 75.

On the other hand, data Y is loaded onto the Y11 set latch path 72IL.

is latched by the Y latch circuit 80 via the data setter t4 register 79 according to the start declaration status. This y
The data latched by the latch circuit 80 is sent to the 72-byte extraction control section 75 and is also input to the adder circuit 81.

Furthermore, line feed data “24” or “6” is input to the adder circuit 81 from the line feed control unit 54. The output of the adder circuit 81 is sent to the y latch circuit 80 via the data separator 79. The latched data of the Y latch circuit 80 is also sent to the comparator 82 and compared with the data Y2 held in the Y22 set latch path 72b. The comparator 82 outputs the data "Yt" held in the Y22 set latch path 72b.
Subtract the data ryJ held in the y latch circuit 80 from ? When the signal goes low, the start declaration flag flag 53 is reset by that signal. In addition, the above 7
The first in-frame code is input from the code discrimination section 44 to the 2-byte extraction control section 75 via the OR circuit 83 as a start command.

The 72-byte extraction control unit 75 starts operating in response to the start command, accesses the graphic buffer 32 according to the data latched in the X latch circuit 74 and the Y latch circuit 80, reads out the stored data, and reads out the stored data, as shown in FIG. As shown in FIG. 3, the data is outputted to the vertical/horizontal conversion circuit 48 via the dart circuit 47. The 72-byte extraction controller 76 outputs an end signal when reading the 72-byte storage data of p24 x 24 dots, and outputs an end signal to the monostable 84.
At the same time, as described above, it is applied as a latch timing signal to the X latch circuit 74 via the OR circuit 78.

The output of the monostable multivibrator 84 is
The 72-byte extraction signal is input to the control unit 75 via the OR circuit 83 as a start command. Then, the 72-byte extraction control section 75 ends its operation upon receiving the 1-line processing signal from the arithmetic circuit 77.

FIG. 7 shows the details of the code buffer control section 43 in FIG. 5, which consists of a length register 91 in which length data is set and a pointer 92 that specifies the address of the code buffer 42. The contents of the length register 9 are multiplied by r-IJ-J by the output of the OR circuit 51 in FIG.

Then, the length register 91 outputs ? The low signal is taken out to the outside.

FIG. 8 shows details of the line feed control section 54 in FIG. 5. In the figure, 101 is a first code storage section that stores a numerical code of "24", and 102 is a second code storage section that stores a numerical code of "6". The numerical codes stored in the code storage sections 101 and 102 are selected by the AND circuits 103 and 104 and latched by the latch circuit 106 via the OR circuit 105. The AND circuit 104 receives the output of the mode flip-flop 55 shown in FIG. When the output of the mode flip controller 7655 is @0'' and the normal printing mode is specified, the output "24" of the first code storage section 101 is latched to the latch circuit 106 via the AND circuit 103 and the OR circuit 105. be done. Furthermore, when the output of the mode flip-flop 55 is "1" and the ruled line mode is set, the output "6" of the second code storage section 102 is the AND circuit 1.
04 and the OR circuit 105 to the latch circuit 106.

This figure shows details of the vertical/horizontal conversion circuit 48 in FIG. 9. In the figure, numeral 11 is a vertical/horizontal conversion section, into which data from the dart circuit 47 of FIG. 5 is input. Also, 112
In the child circuit, data r24-IX2XN sent from the arithmetic circuit 77 in FIG. 6 is latched by the 1-line processing signal. The data latched by the latch circuit 112 is sent to the vertical/horizontal converter 111. This vertical/horizontal converter 111 performs vertical/horizontal conversion according to the data from the latch circuit 112, and converts the data into the fifth
It is output to the image buffer 49 in the figure. Further, the multiplexer 113 is input with all 1o'' data. The multiplexer 113 selects the input data based on the output of the flip-flop 114. The flip-flop 114 receives the write end signal from the printer 34. and is reset by the carry signal of the data counter 124 in FIG.
1 is selected, and when the flip-flora 7'' 114 is set, the all 0# signal is selected and output.

Next, details of the image controller 50 shown in FIG. 5 will be explained with reference to FIG. 10.

In the figure, numeral 12 is a character pitch number storage section, in which, for example, 81 bytes are written in advance as the character pitch number. The data stored in the character pitch number storage section 121 is sent to the image buffer pointer 123 via the adder circuit 122. The data stored in the image buffer pointer 123 is stored in the data counter 12.
4 and the adder circuit 122. Further, 125 is a monostaple multivibrator, which is triggered by the output of the OR circuit 51 shown in FIG. The Q supply output of the multivibrator 125 is input as a load signal to the image buffer pointer 123, and the σ supply output is input to the trigger terminal of the monostable multivibrator 126. The output signal of the vibrator 126 is input to the data counter 124 as a load signal. Also,
A flip-flop 127 is set by a printer write command output from the one-shot circuit 62 in FIG. The output of the flip-flop 127 is input to the AND circuit 128 along with the system clock, and the output of the AND circuit 128 is input to the clock terminal of the data counter 124 along with the data transmission clock via the OR circuit 129. Ru.

The address of the image buffer 49 is specified by the contents of the data counter 124, and when the process reaches the final address, a carry signal is output from the data counter 124, and the reset terminal R of the flip-flop 127 is output.
and the reset terminal R of the image buffer pointer 123
is input to.

The image buffer control unit 50 configured as described above initially controls the data counter 1 as shown in FIG. 11(1).
24 and the contents of the image buffer pointer 123 are rO
It is J. And character generator 22
When writing the data sent from the computer via the dart circuit 47 and the vertical/horizontal conversion circuit 48 to the image buffer 49,
The data transmission clock is sent to the data counter 124 via the OR circuit 129, and its contents are counted up. The address of the image buffer 49 is designated by the count contents of the data counter 124, and character data is written into the image buffer 49. And the first
As shown in FIG. 1 (2), the count content of the data counter 124 becomes "72", and character data of 72 bytes of characters and one character of "R24X24 J)" are written to the image buffer 49. and C in Figure 5.
A carry signal is output from the G address register 46,
Monostable multi-novel generator 125 is triggered via OR circuit 63. As a result, the output of the monostable multi-nog ibrator 125 becomes 11'' and provides a load signal to the image buffer pointer 12.

Therefore, as shown in FIG. 11(3), the character pitch number "81" stored in the character pitch number storage section 121 is loaded into the image buffer 123 via the adder circuit 122. After that, when the Q side output of the multivibrator 125 falls to 10'', the η side output becomes ``1'' and the multivibrator 126 is triggered, and its output becomes ``1''.
''. As a result, the data ``81'' held in the image buffer pointer 123 is loaded into the data counter 124 as shown in FIG. 11(4). That is, the content of the data counter 124 changes from "72" to "81", and the content of the image buffer 49 changes from "72" bytes to "81".
No data is written for "9" bytes (3 dots). For the above processing, a character interval of 3 bits is provided in the image buffer 49. After that, the data counter 124 is reset by Jr8 according to the data transmission clock.
Counting up from the value of 1J, image buffer 49
Specify the address of. And image buffer 49
When character data for the next character is written to , the character pitch number "81" stored in the character pitch number storage section 121 as described above is sent to the image buffer pointer 123 via the adder circuit 122. At this time, since the value of the image buffer pointer 123 is r81J, the adder circuit 122 performs the addition of "r81+81=162", and the addition result r162J25- is loaded into the image buffer pointer 123. The same process is repeated thereafter, and character data is sequentially written into the image buffer 49. Then, when writing n characters of character data to the image buffer 49, if the first frame code is detected and the mode is set to write graphic data, then the contents of the data counter 124 and the image buffer pointer 123 are as shown in FIG. (5
), both are r81Xnj. In this state, the graphic data read out from the graphic buffer 32 by the graphic control unit 52 is transferred to the image buffer 4 via the f-) circuit 47 and the vertical/horizontal conversion circuit 48.
9 and the contents of the data counter 124 are sequentially counted up by the data transmission clock. According to the count value of the data counter 124, graphic data is written into the image buffer 49 as shown in FIG. 11(6). When one line of data is read from the graphic buffer 32, a one line finish signal is output from the graphic controller 32, and the count-up operation of the data counter 124 is stopped. Further, the multivibrator 125 is triggered by the 1-line processing signal, and the value r81X(n+1)J is loaded into the image buffer pointer 123 as shown in FIG. 11(7). After that, Multi Pie Break 125
The multivibrator 126 is triggered by the fourth side output, and the contents r81X(n+1)J of the image buffer pointer 123 are loaded into the data counter 124 as shown in FIG. 11(8). When the code discriminator 44 detects the first in-frame code, it sets an internal flip-flop 45 to temporarily stop its operation, and then resumes its operation when the flip-flop 45 is reset by the 1-line processing signal. resume. Then, the code discrimination section 44
When the next in-frame code detection signal is output from , the multivibrators 125 and 126 are sequentially triggered, and the contents of the image buffer pointer 123 and data counter 124 are sequentially incremented by "81". Then, when the character code following the in-frame code is read from the code buffer 42, a character code detection signal is output from the code discriminator 44, and the multi-nog ibrator 125 is activated. As a result, operations similar to those described in FIGS. 11 (1) to (5) above are performed, and character data is written into the image buffer 49 one character at a time. When data writing to the image buffer 49 is completed, a carry signal is output from the data counter 124, and the contents of the image buffer pointer 123 are cleared. Also, at this time, a pollo signal is output from the code buffer control section 4s, the binary counter 6 is inverted, and the one-shot circuit 62 outputs a printer write command. By this printer write command), the flip-flop 127 is set and the dart of the AND circuit 128 is opened. Therefore, the system clock is sent to the data counter 124 via the AND circuit 128 and the OR circuit 129, and the data counter 124 is counted up. The output of the data counter 124 causes the data held in the image buffer 49 to be sent to the printer 34 via the interface 33.
sent to. Further, the printer write signal outputted from the one-shot circuit 62 is sent to the vertical/horizontal conversion circuit 48 shown in FIG. 9, and sets the flip-flop 114. Therefore, the multiplexer 113 selects all "'O" signals and outputs them to the image buffer 49.

Therefore, after the image buffer 49 outputs the held data to the printer 34, the 'O' signal is written. Then, when all the held data of the image buffer 49 is sent to the printer 34, the image buffer controller 50 A carry signal is output from the data counter 124, and the image buffer pointer 123 and the frizzoflo f12
7 is reset. In addition, the data counter 124
The flip-flop 114 of the vertical/horizontal conversion circuit 48 is reset by the carry signal, and the multiplexer 113 is switched to the vertical/horizontal conversion section 29-111 side. As described above, the image buffer control unit 5o specifies addresses of the image buffer 49 in units of 81 bytes in total, consisting of 72 bytes for one character and 9 bytes for character spacing. Regardless of the length of the next line of graphic data, the position of character data written after the graphic data can be aligned with the position of character data on other lines.

Next, the overall operation of the present invention will be explained with reference to the flowchart of FIG. After creating the graph and determining the graph insertion position in Figure 4 (1) and (2), and then opening the printer and initializing it, the first
The process shown in the flowchart of FIG. 2 is started. first,
As shown in step A, the code length is set from the control section 17 in FIG. 3 to the code buffer control section 43 in FIG. Next, as shown in step A2, the 1'J/1- character data is read from the display file 15 and transferred to the printer controller 31, and the code converter 41 converts the data to the character generator 22.
are converted into corresponding codes and sequentially written into the code buffer 42 under the control of the code buffer control unit 43. When data writing to the code buffer 42 is completed, the code buffer control section 43 outputs a low signal, and the binary counter 61 performs an inverting operation, but at this point, no printer write is output yet. When data is written to the code buffer 42 as described above, the code number 9 length is set again in the code buffer control section 43, and the stored data is read from the code buffer 42. First, as shown in Stella 7'A3, the first character code is read from the code buffer 42, and the code discriminator 4 reads out the first character code.
Give to 4. The code determination unit 44 first determines whether the declaration flip flora 7653 is set as shown in step A4. If the flip-flop 53 is set, the process proceeds to step A, where it is determined whether or not it is the first in-frame code. Determine whether it exists or not. If it is determined in step A6 that the code is not in the frame, or in step A4
If it is determined that the declaration flip-flop 53 is not set, the process advances to step Aγ and the character generator 22 is accessed. For example, if it is assumed that only the character code is written to the code buffer 42 as shown in FIG.
Proceed to.

In this step Aγ, the code discriminator 44 outputs a character code detection signal and a character code, sets them in the CG address register 46, and reads out the dratono and turn data corresponding to the character code from the character generator 22. The signal is inputted to the vertical/horizontal conversion circuit 48 via the circuit 47 . Accordingly, the vertical/horizontal conversion circuit 48 performs step A8.
At step A9, the image is vertically and horizontally converted and set in the image buffer 49 as shown in step A9. This writing of data to the image buffer 49 is controlled by the image buffer controller 50 as described above, and in step AI (1) various pointers in the image buffer controller 5o are updated. , the character code detection signal output from the code discriminator 44 is sent to the OR circuit 5.
1 to the code buffer control unit 43, and various pointers are updated as shown in step All. As a result of this pointer update, it is determined in step A12 whether or not a pollo signal has been generated from the code buffer control section 43. If the value is not low, the process returns to step A3 and the same process is repeated, and turn data such as dratono is read from the character generator 22 according to the character code read from the code buffer 42, and the image buffer 4
Write to 9.

When all character codes are read from the code buffer 42, a pollo signal is output from the code buffer control section 43, and the binary counter 33-61 is inverted again. The one-shot circuit 62 is triggered by the inverted output at this time, and a one-shot pulse is output. This one-shot signal is sent to the printer 34 as a printer write command, and is also sent to the image buffer control section 50. As a result, the data held in the image data pad 49 is sent to the printer 34 and printed as shown in Stella 7°All. The contents of the image J buffer 49 are then cleared in step At4. Thereafter, in step A15, it is determined by the mode flip-flop 55 whether the normal printer mode P or the ruled line mode is designated. In this case, the normal printer mode is specified, so
Proceeding to step A11l, the line feed control section 54 specifies a normal 24-dot line feed. Next step AI?
It is determined whether the printer is closed or not, and if the printer is not closed, the process returns to step A0. That is, the output of the one-shot circuit 62 is sent to the master CPU 11 as one line end, and the step A! The operations from then on are repeated.

Next, the operation when printing a mixture of character data and graphic data will be explained. When performing mixed printing, as explained in FIG.
is set, and the read copy area specification data (
X1+Y+)(Xs t Yz) is the latch circuit 71a171b in the graphic control unit 52 shown in FIG.
Set to +72a, 72b. Thereafter, in the process of steps Al and A in FIG. 12, one line of data read from the display file 15 is code-converted as shown in FIG. 14 and written into the code buffer 42. Then, when the data written in this code buffer 42 is read out to the code discrimination section 44 in step As, since the declaration fritsuno flop 53 is set at this time, the data is transferred to step A via Stella 7''A4. Then, the code determination section 44 determines whether or not it is the first code in the frame.

At this point, the code in the frame has not been read yet, so
The judgment result in step A11 is No, Stella 7'A
Proceed to step 6. In this step, it is determined whether or not the code in the frame is the second or subsequent code, but the result of the determination is No, and the process proceeds to step A7. This step Aγ
From then on, the character generator 22 will operate according to the character code read from the code buffer 42 as described above.
9 turn data is read out from the image buffer 49 and written into the image buffer 49. The same process is repeated while the character code is being read from the code buffer 42. Then, when the first in-frame code is read out from the code buffer 42, the determination result in step A is YES, and the process advances to step All. That is, the code discrimination section 44
When detecting the first in-frame code, it outputs the detection signal to the graphic control section 52, sets the internal flip roller 7'45, and stops the subsequent operation. The graphic control unit 52 starts the multi-operation based on the first in-frame detection signal 72.
, the user accesses the Yoshi graphic resources 32.

Then, the data is read out from the graphic buffer 32 in units of 72 bytes, and the vertical/horizontal conversion circuit 48 performs vertical/horizontal conversion as shown in step Ale.
Set the image buffer 'A2o as shown in . Then, when the graphics control unit 52 reads one line of graphic data from the graphics buffer 32 and sets it in the image buffer 49, the graphics control unit 52
outputs a 1-line output signal. This 1-line processing signal is sent to the code discriminator 44 and resets the F-flop 45. By resetting the flip-flop f45, the code discriminator 44 resumes its operation and sends a discrimination signal to the code buffer controller 43. As a result, the stored contents are read out from the code buffer 42 again. In this case, the in-frame codes from 37-2 onwards are read from the code buffer 42. This in-frame code is detected in Stella 76A6.

In this case, data is not read from the graphic buffer 32, but an in-frame code detection signal is sent to the image buffer control section 50 to perform the operations described in FIGS. 10 and 11.

Thereafter, while the in-frame code is being read from the code buffer 42, similar processing is performed. Then, when the character code following the in-frame code is read out from the code buffer 42, the process advances from step A6 to step A7, and the dot pattern data corresponding to the character code is read out from the character generator 22 in the same manner as in the above case. ,
The image buffer 49 is set.

Through the above processing, a mixture of character data and graphic data is set in the image buffer 49 as shown in FIG. And from the code buffer control unit 43? When the low signal is output, the process proceeds from Stella 7''Alm to step A13, where it generates a prime write command.At this point, the 38-declaration flip-flop 7p53 is set and the enable signal is sent to the mode flip-flop 55. Therefore, the mode flip-flop 55 is set by the printer write command.Therefore, after that, Stella 7'A,
, and then proceeds to step A15, the flip flora-f
55, it is determined that the ruled line mode is designated, and the process proceeds to step Agt, where the line feed amount in the line feed amount control section 54 is changed. That is, the line feed control unit 54 shown in FIG. 8 outputs the line feed amount according to the output of the flip-flop 55, but when the output of the flip-flop 55 is '1'',
The gate of the AND circuit 104 opens, and the second code storage section 1
The numeric code “6” held in 02 is transferred to the latch circuit 10.
6, the printer 34 and the graphic control unit 5
Output to 2. Further, the output of the flip-flop 55 is sent to the code conversion section 41 and the common buffer 20. This common buffer 20 includes a flip-flop 55
11'' signal is given, the same data as the previous time is given to the code converter 41. At this time, the code converter 41
In step A22, as shown in FIG. 15, the character code is converted into a space code and given to the code holder 42, and the code in the frame is written as is to the code holder 42. Then, the above-described force processing is performed according to the flowchart shown in FIG. 812, but data is not written to the image buffer 49 for the space code portion. When the first in-frame code is detected, the detection signal is sent to the graphics control section 52, and data is read from the graphics buffer 32. In this case, the graphic control unit 52 adds the line feed amount “6” from the line feed control unit 54 to the y-direction address and sets it in the y latch circuit 80. Therefore, the 72-byte extraction controller 75 extracts data in a width of 6 bits (in the y direction) from the graphic buffer 32 and sets it in the image buffer 49, as shown in FIG. In this manner, only graphic data is written to the image buffer 49 in the ruled line mode.

Then, when the code buffer control section 43 outputs a low signal, the data held in the image buffer 49 is sent to the printer 34 and printed. In this case, the graphic printing is done between each character line. ! This is done with a 96-bit line spacing. Also, according to the printer write command, the mode flip controller 7°55 is inverted, and its output returns to "01. Therefore, in the line feed control section 54 of FIG. 8, the output of the inverter 107 is
", and the gate of the AND circuit 103 is opened. Therefore, the numerical code "24" stored in the first code storage section 101 is latched by the latch circuit 106 and output to the outside. For this reason, the next data is code no buffer 44.
If the data is written to 24 dots wide, the process returns to 24-dot width data processing. Thereafter, the same process is repeated while the declaration flip controller f53 is set, and the data of each line containing a mixture of character data and graphic data is transferred from the image buffer 49 to the printer 34 as shown in FIG. It is sent and printed. Then, after reading the data in the designated area from the graphic buffer 32, the graphic control unit 32 resets the mixed printing declaration status flip flop 53. By resetting the buffer f53, the process returns to data processing of only character codes shown in FIG. 13. Then, as shown in FIG.
Step AI in the diagram? The process ends when it is determined.

〔Effect of the invention〕

As described above, according to the present invention, even when graphics such as graphs are mixed in a document, document data and graphic data can be arbitrarily printed between the same lines, and printing paper can be used efficiently. Further, the character positions can be aligned in the same line in a line containing only text and a line containing text and graphs.

42-

[Brief explanation of drawings]

Figure 1 shows a conventional printing control system, Figures 2 to 16 show an embodiment of the present invention, Figure 2 shows an overview of the control system, and Figure 3 shows the entire system. 4 is a block diagram showing the general configuration of the printer controller, FIG. 4 is a diagram showing the general operation of print control, FIG. 5 is a circuit diagram showing details of the printer controller in FIG. 3, and FIG. 6 is a diagram showing the graphic control section in FIG. 5. FIG. 7 is a circuit diagram showing details of the code buffer control section in FIG. 5;
8 is a circuit configuration diagram showing details of the line feed control section in FIG. 5, FIG. 9 is a circuit configuration diagram showing details of the vertical/horizontal conversion circuit in FIG. 5, and FIG. 10 is an image buffer control section in FIG. 5. 11 is a circuit configuration diagram showing the details of the 10th
A diagram for explaining the operation of the image buffer control unit in FIG. 12, a flowchart showing the overall operation,
13 to 15[j, (A diagram for explaining the data writing operation to the image buffer. FIG. 16 is a diagram showing the correspondence between data storage in the image buffer and the printing state. 11... Master CPU, 12.26...Pass line, 15...Display file, 16...CRT
Buffer, 19.33...Interface, 2o...
- Common buffer, 22... Character generator, 31... Printer controller, 32... Graphic buffer, 34... Printer, 41... Code converter, 42... Code buffer, 43... Code buffer control unit, 44...Code discrimination unit, 48...
・Vertical/horizontal conversion circuit, 49...Image buffer, 5°・
...'(me-'))4 buffer control unit, 52...graphic control unit, 54...line feed control unit. Applicant's representative Patent attorney Takehiko Suzue

Claims (3)

[Claims] (1) A means for setting a frame code at the graph insertion position in the print record area for the data file, and accessing a character code for the character code read from the data file at the time of printout, and The present invention is characterized by comprising means for accessing the medium code to a graphic buffer and writing it into an image buffer, and means for printing character data and graphic data on the same line according to the data written to the image buffer. Printing control method. (2) A patent claim characterized in that when printing a mixture of the character data and graphic data, different line feed amounts are specified when printing on normal lines and when printing graphic data between lines. Range of printing control method described in item 1〇 (3) When writing a mixture of character data and graphic data to the above image buffer, after writing the graphic data, write the graphic data write start address position, specified character width, and character spacing to the image buffer. 2. The printing control method according to claim 1, wherein the designated address is updated sequentially in the address update position after passing through the graphic data storage area, and character data is written from the address update position after passing through the graphic data storage area.