JPS59191203A - Dielectric porcelain material - Google Patents
Dielectric porcelain materialInfo
- Publication number
- JPS59191203A JPS59191203A JP58065873A JP6587383A JPS59191203A JP S59191203 A JPS59191203 A JP S59191203A JP 58065873 A JP58065873 A JP 58065873A JP 6587383 A JP6587383 A JP 6587383A JP S59191203 A JPS59191203 A JP S59191203A
- Authority
- JP
- Japan
- Prior art keywords
- dielectric
- chip
- magnetic
- layer
- composite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Inorganic Insulating Materials (AREA)
- Compositions Of Oxide Ceramics (AREA)
- Ceramic Capacitors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は低温焼結型で高いQを有する誘電体磁器材料に
係り9%に一括焼結体たより構成されるLC複合チップ
素子のコンデンサ部分として好適な低温焼結誘電体磁器
材料に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a capacitor portion of an LC composite chip element, which is made of a low-temperature sintered dielectric ceramic material having a high Q, and is composed of 9% bulk sintered material. The present invention relates to a low-temperature sintered dielectric ceramic material suitable for use as a low-temperature sintered dielectric ceramic material.
従来、LC複合素子は別個に製造されたコイル及びコン
デンサを組合せた形で構成され9例えばフィルタとして
広く使用されている。Conventionally, LC composite devices are constructed from a combination of separately manufactured coils and capacitors and are widely used, for example, as filters.
ところでLC複合素子にはコンデンサと巻線型コイルを
適当に組合せて樹脂モールドし、リード線を付けたもの
が一般的に使用されている。しかしこの樹脂モールドタ
イプのものは、最近の電子機器の薄層化、ポータプル化
に対してはかなり大型であってこれらに対応しえなくな
っている。By the way, an LC composite element is generally used in which a capacitor and a wire-wound coil are appropriately combined, resin-molded, and lead wires are attached. However, this resin mold type is quite large and cannot accommodate the recent thinner and more portable electronic devices.
それ故、これらに対応するものとしてリードレ、スのL
C複合チップ製のものが提供されている。Therefore, as a corresponding item, the L of the lead dress and the
C composite chips are available.
ところで、従来の此種のLC複合チップ部品は。By the way, this type of conventional LC composite chip component...
第1図に示す如(、Ti0zやBaTiOsなどの誘電
体粉末のペーストを印刷法により適当な剥離性基板(図
示省略)上に印刷して誘電体層1を形成し。As shown in FIG. 1, a dielectric layer 1 is formed by printing a paste of dielectric powder such as TiOz or BaTiOs on a suitable removable substrate (not shown) by a printing method.
その上にAg 、 Ag−Pd 、 Pd 等の金属
粉末のペーストを印刷法によりこの誘電体層1上に印刷
して電極2を形成し、更にその上に誘電体層3を印刷し
く図面では構成をわかり易くするために分解して示しで
ある)、この誘電体層3上に他の電極4を形成する。そ
してこの電極4上にガラス粉末や7エライト−誘電体粉
末混合物のペーストによる中間層5を印刷形成し、その
上に今度は透磁性磁性フェライト粉末のペーストによる
磁性体層6を印刷し、さらに上記の金属粉末と同様な粉
末のペーストによりコイル形成用導体7を印刷し、導体
7の一部をマスクする磁性体層8を印刷し、さらに導体
7に接続する導体9を印刷する。以下同様にして磁性体
層10.導体11.磁性体層12.導体13.磁性体層
14及び導体15を印刷し、最後に磁性体層16を積層
する。On top of that, a paste of metal powder such as Ag, Ag-Pd, Pd, etc. is printed on this dielectric layer 1 by a printing method to form an electrode 2, and then a dielectric layer 3 is printed on it. (shown exploded for clarity), another electrode 4 is formed on this dielectric layer 3. Then, on this electrode 4, an intermediate layer 5 made of a paste of glass powder or a 7-elite-dielectric powder mixture is printed, and on top of that, a magnetic layer 6 made of a paste of permeable magnetic ferrite powder is printed, and then the above-mentioned A coil-forming conductor 7 is printed using a powder paste similar to the metal powder described above, a magnetic layer 8 that masks a part of the conductor 7 is printed, and a conductor 9 to be connected to the conductor 7 is printed. Similarly, the magnetic layer 10. Conductor 11. Magnetic layer 12. Conductor 13. A magnetic layer 14 and a conductor 15 are printed, and finally a magnetic layer 16 is laminated.
このようにして得た積層体を高温、焼成して一体焼結体
に変換し、第2図に示す如く2両端の導体露出端に適当
な外部端子(銀ペースト等)17゜18を焼付けてLC
複合チップ部品を完成する。The thus obtained laminate is fired at high temperature to convert it into an integral sintered body, and as shown in Fig. 2, appropriate external terminals (silver paste, etc.) 17°18 are baked on the exposed conductor ends at both ends. L.C.
Complete composite chip parts.
このときその等価回路は第3図に示す如きものとなる。At this time, the equivalent circuit becomes as shown in FIG.
ところで、上記の場合において中間層5の存在は次の理
由による。すなわちコンデンサ用積層体を構成している
誘電体層1,3はT i02やBaTl03により構成
され、またコイル用積層体を構成して−る磁性体層6,
8.・・・・・・等は透磁性の磁性7エ2イトにより構
成されているためこれらの誘電体層と磁性体層は熱膨張
係数が異なる。したがってこれらの誘電体層と磁性体層
をそのまま単純に積層すれば焼結後の冷却時において収
縮率が異なるため割れやソリが発生して不良部品となり
易い。それ故、これらの中間程度の熱膨張係数を有する
中間層5を介在させることが必要であった。By the way, in the above case, the existence of the intermediate layer 5 is due to the following reason. That is, the dielectric layers 1 and 3 constituting the laminated body for a capacitor are composed of Ti02 and BaT103, and the magnetic layers 6 and 3 constituting the laminated body for a coil are composed of Ti02 and BaT103.
8. . . . etc. are composed of permeable magnetic 7E2ite, and therefore these dielectric layers and magnetic layers have different coefficients of thermal expansion. Therefore, if these dielectric layers and magnetic layers are simply laminated as they are, the shrinkage rates will be different during cooling after sintering, which will likely cause cracks and warpage, resulting in defective parts. Therefore, it was necessary to interpose an intermediate layer 5 having a coefficient of thermal expansion intermediate between these.
そしてこのような一括型のものに代り、シート法、印刷
法等によシコンデンサを構成する誘電体と電極の積層、
焼結と、インダクタを構成する磁性体と電極の積層を別
々に行って個々の積層チップを所定の温度で焼成してそ
れぞれチップコンデンサ、チップインダクタとし、これ
らを1個、1個接着してLC複合チップを作成していた
。しかしこのような方法ではチップ焼結体を接着する方
法が、チップ焼結体が微小なため製造工程が煩雑となシ
大量生産が容易にできないという欠点がある。Instead of such a one-piece type, the dielectric and electrodes constituting the capacitor are laminated by sheet method, printing method, etc.
Sintering and laminating the magnetic material and electrodes that make up the inductor are performed separately, and each laminated chip is fired at a predetermined temperature to form a chip capacitor and a chip inductor, respectively, and these are bonded one by one to form an LC. They were creating a composite chip. However, in this method, the method of bonding the chip sintered body has the drawback that the manufacturing process is complicated because the chip sintered body is minute, and mass production cannot be easily carried out.
このように一括焼成型のLC複合チップ部品では;ンデ
ンサ部分の誘電体とインダクタ部分の磁性フェライトと
の熱膨張係数の差を吸収するため中間層を必要とすると
いう問題があシ、また接着型のものでは別々に焼結、さ
れた中間接着層により微小なチップを接着させなければ
ならないという煩雑な工程を必要とする問題がおる。In this way, batch-fired LC composite chip parts have the problem of requiring an intermediate layer to absorb the difference in thermal expansion coefficient between the dielectric material in the capacitor part and the magnetic ferrite part in the inductor part. However, there is a problem in that a complicated process is required in which minute chips must be bonded using an intermediate adhesive layer that is sintered separately.
このような問題を改善するために2本発明者等はその熱
膨張係数が90〜100X10”/’Cである磁性フェ
ライトと一緒に焼成されるときに磁性フェライトとの間
に熱膨張係数の実質的な差がなく。In order to improve this problem, the inventors of the present invention have developed a structure in which the coefficient of thermal expansion is between 90 and 100 x 10''/'C when fired together with magnetic ferrite. There is no difference.
且つそれに対して十分な接着強度を有する材料を探求し
た結果、 Tie2主体でCuOまたはCuOとMn酸
化物の混合焼結体が所期の目的を達成するものであるこ
とを見出した。As a result of searching for a material with sufficient adhesive strength for this purpose, it was found that a sintered body consisting mainly of Tie2 of CuO or a mixture of CuO and Mn oxide would achieve the desired purpose.
しかも本発明の材料は全ての電気的特性を満足し、比較
的低温度で焼結し得るもの(磁性フェライトと同程度の
焼結温度及び収縮率を有する)であることがわかった。Moreover, it was found that the material of the present invention satisfies all electrical properties and can be sintered at a relatively low temperature (has a sintering temperature and shrinkage rate comparable to that of magnetic ferrite).
従って焼成前KLC一体化したものを積層してこれを焼
成してLC複合チップを製造することができるので、従
来のように焼結体を1個ずつ接着する必要もなく、大量
生産が容易で、材料の消費量も中間層や中間接着層が不
要であるために少なくてすみ、製造コストを低減できる
ようになる利点を有する。Therefore, it is possible to manufacture an LC composite chip by laminating and firing the KLC integrated before firing, so there is no need to glue sintered bodies one by one as in the past, and mass production is easy. This has the advantage that the amount of material consumed can be reduced since no intermediate layer or intermediate adhesive layer is required, and manufacturing costs can be reduced.
次に本発明の詳細な説明する。 Next, the present invention will be explained in detail.
実施例1 市販の酸化チタン、酸化鋼、炭酸マンガンを。Example 1 Commercially available titanium oxide, oxidized steel, and manganese carbonate.
’rio、9s、o モル% 、 Cu05.0 モル
%、 、 MnC010,757wt %の割合で重量
100grになるように秤量し。'rio, 9s, o mol%, Cu05.0 mol%, MnC010,757wt% were weighed to give a weight of 100g.
これに純水200gr、メノウ石120gr を加え
。Add 200g of pure water and 120g of agate stone to this.
ボールミルに入れて16時間混合し、脱水乾燥した。そ
して乾燥粉末50gr、結着剤としてエチルセルロース
の8チ溶液(溶媒はターピネオール)16gr、溶剤と
してターピネオール25 grを秤量し、ライカイ機で
3時間攪拌した後、三本ロール処理してペーストを作っ
た。The mixture was placed in a ball mill and mixed for 16 hours, followed by dehydration and drying. Then, 50g of dry powder, 16g of ethylcellulose 8-ti solution (solvent: terpineol) as a binder, and 25g of terpineol as a solvent were weighed out, stirred for 3 hours in a Raikai machine, and processed with three rolls to form a paste.
このペースト及びAg粉のペーストをスクリーン印刷法
により交互に積層してチップコンデンサを作シ乾燥後、
焼結体寸法4.5X3.2mのチップに切断し、860
℃゛で2時間空気中で焼結してチップコンデンサを得た
。これによシ得られた諸特性は第1表に示す通りでちっ
た。This paste and the paste of Ag powder were alternately laminated by screen printing to make a chip capacitor. After drying,
Cut the sintered body into chips with dimensions of 4.5 x 3.2 m, and
A chip capacitor was obtained by sintering in air at °C for 2 hours. The various properties obtained were as shown in Table 1.
ここでαは熱膨張係数、 shは収縮率で焼成前の寸
法を基準として焼成後の収縮状態を示すもの。Here, α is the coefficient of thermal expansion, and sh is the shrinkage rate, which indicates the shrinkage state after firing based on the dimensions before firing.
IRは絶縁抵抗、vカは破壊電圧で50μm間隔の場合
を示す。IR is insulation resistance, v is breakdown voltage, and shows the case where the distance is 50 μm.
実施例2
酸化チタン、酸化鋼の配合比を変え、上記実施例1と同
じ方法でチップコンデンサを製造した。Example 2 A chip capacitor was manufactured in the same manner as in Example 1, except that the blending ratio of titanium oxide and oxidized steel was changed.
その諸特性は第2表に示す通りでおる。Its properties are shown in Table 2.
以下余白
第2表
上記特性はLC複合チップ部品のコンデンサ部として全
て満足している。Table 2 (margin) The above characteristics are all satisfied as a capacitor part of an LC composite chip component.
実施例3 焼成温度860℃で空気中で焼成して得たNi、Cu。Example 3 Ni and Cu obtained by firing in air at a firing temperature of 860°C.
Znフェライトで、特性として/i= 109 、Q(
4MHz)=56 、5h=16.5%、α=94X1
[1−ン℃を有する磁性フェライトを巻数10T8で積
層し、その上に上記実施例1の誘電体材料を積層し、L
C複合チップ部品とし、860℃で2時間空気中で焼成
してLC複合チップ部品の焼結体を得た。その減衰量の
周波数特性を第4図に示す。このチップの共振周波数は
5.936MHzで減衰量25.35dB でアシ、十
分に実用に供することができる。Zn ferrite has the characteristics /i=109,Q(
4MHz)=56, 5h=16.5%, α=94X1
[Magnetic ferrite having a temperature of 1-10°C is laminated with a number of turns of 10T8, and the dielectric material of Example 1 is laminated thereon, and L
A C composite chip component was prepared and fired in air at 860° C. for 2 hours to obtain a sintered body of an LC composite chip component. The frequency characteristics of the attenuation amount are shown in FIG. This chip has a resonant frequency of 5.936 MHz and an attenuation of 25.35 dB, which is sufficient for practical use.
本発明によれば磁性フェライトと略同じ熱膨張係数を有
し、同一温度で焼成可能な誘電体を提供することができ
るので、中間層を使用することな(LC複合チップ部品
を1回の焼成で一括焼成することができる。その結果、
非常に小型のLC複合チップ部品を能率よく生産するこ
とができる。According to the present invention, it is possible to provide a dielectric material that has approximately the same coefficient of thermal expansion as magnetic ferrite and can be fired at the same temperature. can be fired in bulk.As a result,
Very small LC composite chip parts can be efficiently produced.
第1図〜第3図は従来の中間層を必要としたLC複合チ
ップ部品の説明図、第4図は本発明の一実施例による複
合チップ部品の特性図を示す。
1.3 誘電体層
2.4 電極
5 中間層1 to 3 are explanatory diagrams of a conventional LC composite chip component requiring an intermediate layer, and FIG. 4 is a characteristic diagram of a composite chip component according to an embodiment of the present invention. 1.3 Dielectric layer 2.4 Electrode 5 Intermediate layer
Claims (1)
) t cuo (0,1〜50モル%)からなるセ
ラミックコンデンサ用の誘電体磁器材料。 (2)上記誘電体にMn ′IcMnC0,に換算して
5.0w%まで添加したことを特徴とする特許請求の範
囲第(1)項記載の誘電体磁器材料。[Claims] (11T loz (50-99-9%/”ly
) t cuo (0.1 to 50 mol%) dielectric ceramic material for ceramic capacitors. (2) The dielectric ceramic material according to claim (1), wherein up to 5.0 w% of Mn'IcMnC0 is added to the dielectric.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58065873A JPS59191203A (en) | 1983-04-14 | 1983-04-14 | Dielectric porcelain material |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58065873A JPS59191203A (en) | 1983-04-14 | 1983-04-14 | Dielectric porcelain material |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59191203A true JPS59191203A (en) | 1984-10-30 |
JPS6257042B2 JPS6257042B2 (en) | 1987-11-28 |
Family
ID=13299526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58065873A Granted JPS59191203A (en) | 1983-04-14 | 1983-04-14 | Dielectric porcelain material |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59191203A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2338478B (en) * | 1998-06-15 | 2002-12-24 | South Bank Univ Entpr Ltd | Ceramic composites |
-
1983
- 1983-04-14 JP JP58065873A patent/JPS59191203A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2338478B (en) * | 1998-06-15 | 2002-12-24 | South Bank Univ Entpr Ltd | Ceramic composites |
Also Published As
Publication number | Publication date |
---|---|
JPS6257042B2 (en) | 1987-11-28 |
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