JPS59186477A - Image pickup system - Google Patents

Abstract

PURPOSE:To perform external synchronization without requiring a special terminal for external synchronism, synchronizing signal generator, and cable by impressing a vertical and a horizontal synchronizing signal separated synchronously from an input video signal to reset terminals of an incorporated synchronizing signal generating circuit. CONSTITUTION:A video signal obtained by an image pickup and passed through a video output buffer amplifier 34 is outputted from a video input/output terminal 31, and an image pickup device 22 impressed with a DC component turns off the transistor (TR) 50 of a video output buffer amplifier 34 because of the DC component and also operates a DC detecting circuit 32. Further, a video signal A which is inputted from a terminal 31 and shown up to time t1 is applied to a synchronizing signal separating circuit 33 at this time, so the vertical synchronizing signal VSYNC and horizontal synchronizing signal HSYNC are separated and outputted. Further, those signals are applied to V reset and H reset terminals of the synchronizing signal generating circuit 37 and the image pickup device 22 outputs a video signal shown between time t1 and time t2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an imaging system in which external synchronization is suppressed.

[Background of the invention]

For example, consider an example of a conventional imaging system that switches between two imaging devices and records on one VTR.

This will be explained using drawings.

In FIG. 1, -1 and 2 are image pickup devices, 6 and 4 are video signal output terminals, 5 is a switcher, and 6 is a VTR 17 is a video input terminal.

The imaging devices 1 and 2 shown in FIG. 1 each have a built-in synchronizing signal generating circuit, and the synchronizing signals of these circuits are generated independently. For this.

The video signals output from the two imaging devices 1.2 are not synchronized.

As a result, in FIG. 1, when the switcher 5 switches the video signal recorded on the VTR 6, the VT
The servo of R6 was disturbed, and when that part was played back, it produced noise and was unsightly.

In order to avoid this phenomenon, conventional methods have been devised to synchronize the synchronization signals of two imaging devices, for example. below,
Using Figures 2 and 3.

This method will be explained.

In Figure 2, 1' and 2' are external synchronization input terminals 1
0 and 11 are the imaging devices, and 8 is a synchronization signal generator. Note that the same reference numerals as in FIG. 1 indicate the same parts and equivalent parts.

In FIG. 2, two imaging devices 1' and 2' operate with a synchronization signal from a single synchronization signal generator 8. In FIG. As a result, the video signals of the two imaging devices 1' and 2' are synchronized, so even if the switcher 5 switches the video signals, no servo disturbance occurs in the VTR 6.

In FIG. 3, 1# is an imaging device having a synchronization signal output terminal 12 that outputs a synchronization signal from a built-in synchronization signal generation circuit. Note that the same reference numerals as in FIG. 2 indicate the same parts and equivalent parts.

In FIG. 3, at the external synchronization input terminal 11 of the imaging device 2',
Imaging device 1's synchronization number 48 is input. Therefore, the video signal output of imaging device 2' is input to imaging device 1'.
is synchronized with the video output signal. Therefore, in FIG. 3, even if the switcher 5 switches, the servo of the VTR 6 will not be disturbed.

Similar to the case in FIG. 2, this does not occur.

If the arrangement is as shown in FIGS. 2 and 3, the first problem in the conventional example can be solved. However, in FIG. 2, external synchronization input terminals 10 and 11 and a synchronization signal generator 8 are separately required for the imaging devices 1' and 2'. Further, in FIG. 3, the image pickup devices 1' and 2' require an output terminal 12 and an input terminal 11 for the synchronizing signal.

In general, to connect a home VTR and a home imaging device, 1
One cable with 0 wires bundled and a 10-bin multi-connector are used. In these 10 bottles,
Signals have already been allocated and there are no idle bins. Therefore, in order to apply external synchronization with the conventional method shown in Figure 2.3, an external synchronization terminal is required on the imaging device in addition to the forward-bending 1o bin multi-connector, and the cable is no longer required. I needed one.

As a result, the conventional imaging system has the disadvantage that even if external synchronization is achieved, the system is complex and unsuitable for home use.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a camera system in which external synchronization can be applied without using an external synchronization terminal, a synchronization signal generator, or an unnecessary cable. .

[Summary of the invention]

The features of the present invention include ``switching means that outputs a selected video signal and adds a predetermined DC component to this video signal and outputs the same; and in response to switching of the switching means, outputs a captured video signal. and a video input/output terminal that receives a video signal containing a DC component from the switching means.

A DC whose input side is connected to the video input/output terminal.
a detection circuit, a synchronization signal separation circuit whose input side is also connected to the video input/output terminal, and a vertical synchronization signal separation circuit separated by the synchronization signal separation circuit according to the output signal with a DC component from the DC detection circuit. and a pair of gate circuits that open the gates to allow horizontal synchronization signals to pass through.

A synchronous signal generating circuit having a pair of reset terminals inputting outputs of the pair of gate circuits, and capable of being reset when the gates of the pair of gate circuits are open.

The point is that it has been established.

[Embodiments of the invention]

An embodiment of the present invention is shown in FIG. 4 and will be described below.

In the same figure, reference numerals 21 and 22 are imaging devices each incorporating a synchronization circuit shown in FIG. 5, 25 is a switcher, and 25
, 24 are video input/output terminals of the imaging devices 21 and 22;
26 is a DC component addition circuit.

Note that the same reference numerals as in FIGS. 1 to 3 indicate the same parts and equivalent parts.

When the movable contacts c and f of the interlocking switch (SF) in the switcher 25 are tilted toward the fixed contacts α and d,
A video signal output from the video input/output terminal 26 of the imaging device 21 is connected to the contact α.

C, and is input to the video input terminal 7 of the VTR 6 and recorded.

On the other hand, in this state, a signal obtained by adding the DC component from the DC component addition circuit 26 to the output video signal from the imaging device 21 passes through the contacts f and d.

It is applied to the video signal input/output terminal 24 of the imaging device 22.

Here, the synchronous circuit shown in FIG. 5 will be explained.

In the figure, reference numeral 31 denotes a video input/output terminal, which corresponds to the terminals 23 and 24 in FIG. 32 is an I)C detection circuit;
53 is a synchronization signal separation circuit, 34 is a video output buffer amplifier, 35 and 36 are gate circuits, and 37 is an r reset (V
This is a synchronous signal generation circuit with R) and H reset (HR) terminals.

6(,4) to CD) are waveform charts (time charts) showing the waveforms of each part in FIG. 5, and C in FIG.
A) to CD) correspond to each other. Note that the synchronizing signal A' in FIG. 6 (, 4) shows only the horizontal synchronizing signal to simplify the explanation.

D from the DC component addition circuit 26 is connected to the video input/output terminal 31.
In the imaging device 21 when the C component is not applied, that is, when the mable contacts c and f are collapsed to the fixed contacts a and d9t11 in FIG. 4, the video output buffer amplifier 64 as shown in FIG. Transistor 50 does not cut off. As a result, the video input/output terminal 2 of the imaging device 21
3. That is, from the terminal 31 in FIG.
In the imaging device 22 in which the switcher 25 in the figure is as described above (in the illustrated state), the transistor 50 of the video output buffer amplifier 34 in FIG. 5 is cut off due to the DC component, and the DC detection circuit 32 is operated. . Furthermore, at this time, the video signal (, 4) inputted from the terminal 61 and shown up to time tl in FIG.
NC) and horizontal synchronization signal (H5YNC) are separated and output. Therefore, by time t1 in FIG. 6, the output CB>, S/L of the DC detection circuit 32 shown in FIG. , the horizontal synchronization signal 4g shown in FIG.

The synchronization signal generation circuit 67 uses a crystal oscillator as a source oscillation.
A synchronization signal (composite sync) is generated, and when an input is made to the V-reset terminal and the H-reset terminal, the vertical synchronization signal and horizontal synchronization signal are each reset at that timing.

That is, when the switcher 25 is in the state shown in FIG. 4 described above, it synchronizes with the synchronization signal of the video signal from the imaging device 21 at time 1 of FIG. 6 CD). An imaging device 22 as shown above
A synchronization signal is generated. However, the synchronizing signal in FIG. 6 C1)) only shows the horizontal synchronizing signal corresponding to FIG. 6 CA).

Next, at time t1, the movable contact C9f of the switcher 25 changes to the fixed contact 6. When it falls to the d side, the video output buffer amplifier 34 of the imaging device 22 does not cut off.

Time 1 in Figure 6 CA). A video signal as shown at t2 is output from the camera device 22.

At this time, the output of the DC detection circuit 32 of the imaging device 22 is
As shown at times t1 to t2 in FIG. 6 (CB), the gate circuits 35 and 36 are turned off because they are at a low level. As a result, the synchronous signal generation circuit 570V reset and fl
Vertical and horizontal synchronizing signals are not applied to the IJ upper setter (time t in Figure 6).

-t2), the circuit 67 enters a self-oscillation state.

By the way, in this embodiment, since the timing of the first vertical and horizontal synchronizing signals in this self-oscillation state is regulated by the respective rates, the signals are output from the imaging device 21 as shown in FIG. 6 (CD). Synchronization is achieved with the same phase as the phase of each synchronization issue up to time t1.

On the other hand, at this time, the video signal containing the DC component is applied to the imaging device 21iIllll,l. As a result, the synchronization signal generation circuit 37 of the imaging device 21 excavates in synchronization with the imaging device 22, contrary to what was done up until then.

Note that at time t2, when the dyeable contact C9f of the switcher 25 is switched again to the state shown in FIG. 4, the states shown in FIGS.
As is clear from D), the mode returns to the same mode as up to time t1. By applying a video signal containing a DC component to the terminal.

The configuration is such that the vertical and horizontal synchronization signals that are synchronized and separated from the input video signal are applied to the reset terminal of the built-in synchronization signal generation circuit, so there is no need for a special terminal for external synchronization, a synchronization signal generator, or a cable. Therefore, an imaging system that can be externally synchronized can be obtained.

Further, the present invention has the effect of maintaining complete compatibility with conventional imaging systems.

[Brief explanation of drawings]

1 to 6 are block diagrams for explaining an example of a conventional imaging system, FIG. 4 is a block diagram for explaining an embodiment of the present invention, and FIG. 5 is a block diagram for explaining an example of a conventional imaging system. FIG. 6 is a block diagram for explaining the inside of the device, FIG. 6 is a time chart for explaining the operation of FIG. 2, and FIG. 7 is a circuit diagram showing a specific example of the video output buffer amplifier shown in FIG. . 21, 22...Imaging device 25.24.31...Video input/output terminal 25...
Switcher 26...DCfi, minute addition circuit 32...DC detection circuit 33--synchronization signal separation circuit 34...video output amplifier. 35, 36...Gate circuit 37...Synchronizing signal generation circuit 50...Transistor No. z, No. 4 [ffi'

Claims (1)

[Claims] (1) Switching means for outputting a video signal selected by switching and adding and outputting a scheduled DCJff to this video signal; a video input/output terminal that receives a video signal containing a DC component from the means; a DC detection circuit whose input side is connected to the video input/output terminal; and a DC detection circuit whose input side is also connected to the video input/output terminal. a pair of gate circuits that open gates to pass the vertical and horizontal synchronization signals separated by the synchronization signal separation circuit in response to the output signal with a DC component from the DC detection circuit; and a pair of reset terminals for inputting the outputs of the pair of gate circuits. An imaging system comprising: a synchronization signal generation circuit that is reset when the gates of the pair of gate circuits are open.