JPS63283281A - Video output device - Google Patents

Video output device

Info

Publication number
JPS63283281A
JPS63283281A JP11681587A JP11681587A JPS63283281A JP S63283281 A JPS63283281 A JP S63283281A JP 11681587 A JP11681587 A JP 11681587A JP 11681587 A JP11681587 A JP 11681587A JP S63283281 A JPS63283281 A JP S63283281A
Authority
JP
Japan
Prior art keywords
signal
picture
master
slave
synchronizing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11681587A
Other languages
Japanese (ja)
Inventor
Morihito Rokuta
六田 守人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11681587A priority Critical patent/JPS63283281A/en
Publication of JPS63283281A publication Critical patent/JPS63283281A/en
Pending legal-status Critical Current

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  • Studio Circuits (AREA)

Abstract

PURPOSE:To output a video signal resistant to external noise even in a case where no signal exists on a master picture and the cycle of whose synchronizing signal coincides with the cycle of an ordinary television signal, by using the synchronizing signal of a slave picture side by detecting the fact of the no signal of the master picture when it occurs, in the case that the slave picture is inserted in the master picture. CONSTITUTION:From inputted master picture and slave picture, the synchronizing signals are extracted by synchronization separating circuits 12 and 15, and are inputted to a synchronizing signal switching circuit 14. The synchronizing signal switching circuit 14 switches the synchronizing signal to that of the slave picture only when no signal exists on the master picture by a master picture no signal detection circuit 13. A signal made into the slave picture by a slave picture conversion circuit 16 is synthesized with the master picture generally at a picture synthesizing circuit 11, and when no signal exists on the master picture, only a slave picture forming signal is outputted. Next, a synchronizing signal detector 21 detects the synchronizing signal from the master picture. The signal is stored in a capacitor, and increases the base potential of a transistor 22, and turns ON the transistor. As a matter of course, the transistor is burned OFF at the time of no signal on the master picture. By turning OFF the transistor, a vertical synchronizing signal VD is switched from a master VD to a slave VD by a synchronizing signal change-over switch 23.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は映像出力装置に係り、時に2−面馨合成する際
に最適な装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a video output device, and sometimes to an optimal device for two-plane image compositing.

〔従来の技術〕[Conventional technology]

近年、ディジタル技術のテレビ受像機およびビデオテー
プレコーダ等の家庭電化製品への導入が著しくなってき
ている。
In recent years, the introduction of digital technology into home appliances such as television receivers and videotape recorders has increased significantly.

その−例として親画面中に他の画面をある一定の面積比
で縮少した子画面をはめ込む方式を採用する装置が登場
してきた(以下P in Pと呼ぶこととする)。
As an example of this, a device has appeared that employs a method of inserting a child screen in which another screen is reduced by a certain area ratio into a main screen (hereinafter referred to as P in P).

このPinP回路において親画面が無信号時に子画面を
出力する場合を考えてみる。
Let us consider a case in which the main screen outputs a child screen when there is no signal in this PinP circuit.

一般的にPinPl路全体ン制御する親画面の周期分離
回路は無信号時でも同期信号を発生する回路が必要とな
って(る。
Generally, a period separation circuit for a main screen that controls the entire PinPl path requires a circuit that generates a synchronizing signal even when there is no signal.

この回路がアナログ的な回路構成の場合、つまり自己発
振回路を持ち外部から同期信号が入力時は周波数と移相
の両方共も同期する方式の場合、完全に無信号でない時
はその雑音により不安定な動作となり問題である。
If this circuit has an analog circuit configuration, that is, if it has a self-oscillation circuit and synchronizes both the frequency and phase shift when a synchronizing signal is input from the outside, the noise will cause noise when there is not a completely no signal. This is a problem because it causes stable operation.

またこの回路がデジタル的回路構成の場合、つまりクロ
ックをカウントダクンする方式の場合、一般的に同回路
は無信号時からの同期引き込みを考慮して垂直回期の周
期を実際の周期よりも長めに設定しであるため、テレビ
受信機によっては同期引き込みが不可能となる。
In addition, if this circuit has a digital circuit configuration, that is, if it uses a method that counts down the clock, the circuit generally makes the vertical period longer than the actual period in order to take synchronization in when there is no signal. Because it is set to , synchronization may not be possible depending on the TV receiver.

なおこの種の装置として関連するものに例えば特開昭6
1−194984号公報等が挙げられる。
Related devices of this type include, for example, Japanese Patent Application Laid-Open No. 6
1-194984 and the like.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上のように上記従来技術を用いて親画面が無信号時に
子画面を出力する時、アナログ的同期分離回路を用いた
方式では外S雑音に対して弱(なるという問題があった
。さらにディジタル的な同期分離回路を用いた場合も垂
直同期の周期が広(なり、テレビ受像機によっては全(
同期がかからなくなるという問題があった。
As described above, when using the above conventional technology to output a sub screen when the main screen has no signal, the method using an analog synchronization separation circuit has the problem of being weak against external S noise. Even when a typical sync separation circuit is used, the vertical synchronization period becomes wide (and depending on the TV receiver, the entire period (
There was a problem with synchronization.

本発明の目的は、親画面無信号時に子画面を出力する際
、外S雑音に対しも強(、全世界のテレビ受像機でも同
期のかかる装置を提供することにある。
An object of the present invention is to provide a device that is resistant to external S noise (and synchronized even with television receivers all over the world) when outputting a sub-screen when there is no signal on the main screen.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、親画面が無信号になった場合、それを検知
して子画面側の同期信号を使用することにより、4戊す
ることができる。
The above objective can be achieved by detecting when there is no signal on the main screen and using the synchronization signal on the sub-screen side.

〔作用〕[Effect]

親画面が無信号になった時にそれを検出し【子画面側の
同期信号を使用することにより、子lI!Ii面信号の
みが出力される。
Detects when the main screen becomes silent and [by using the synchronization signal on the child screen side, the child screen! Only the Ii plane signal is output.

〔実施例〕〔Example〕

第1図は本発明の概要を示したものである。 FIG. 1 shows an overview of the present invention.

入力した親画面および子画面は同期分離回路12・15
により同期信号を抽出する。抽出の同期信号は同期信号
切換回路14に入力する。同期切換回路14は親画面無
信号検出回路13により、親画面が無信号時のみ子画面
同期信号に切り換える。子画面変換回路16により子画
面化された信号は通常は画面合成回路11で親画面と合
成されるが、親画面が無信号時には子画面化信号のみが
出力される。
The input main screen and child screen are synchronized by the synchronous separation circuits 12 and 15.
Extract the synchronization signal by The extracted synchronization signal is input to the synchronization signal switching circuit 14. The synchronization switching circuit 14 uses the main screen no-signal detection circuit 13 to switch to the sub-screen synchronization signal only when there is no signal on the main screen. The signal converted into a small screen by the small screen conversion circuit 16 is normally combined with the main screen in the screen synthesis circuit 11, but when the main screen has no signal, only the small screen signal is output.

次に第2図により本発明の一実施例を第2図により説明
する。
Next, an embodiment of the present invention will be explained with reference to FIG. 2.

まず、同期信号検出器21は親画面から同期信号を検出
する。この信号はコンデンサにだ(わえられトランジス
タ22のベース電位を上げ、トランジスタをオンにする
。当然無信号時には、トランジスタはオフとなる。この
トランジスタのオフにより、垂直同期信号(以下Vf)
と記載丁2)は、同期信号切換スイッチ23において親
vDから子VDに切り換わる。
First, the synchronization signal detector 21 detects a synchronization signal from the main screen. This signal is applied to the capacitor, raising the base potential of the transistor 22 and turning the transistor on. Naturally, when there is no signal, the transistor is off. By turning off this transistor, a vertical synchronizing signal (hereinafter referred to as Vf) is generated.
2), the synchronization signal changeover switch 23 switches from the parent VD to the child VD.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、非常に簡単な回路の追加により、親画
面が無信号時でも外部雑音に強(、同期信号の周期が通
常のテレビ信号の周期と一致した映像信号を出力できる
効果がある。
According to the present invention, by adding a very simple circuit, it is possible to output a video signal that is resistant to external noise even when there is no signal on the main screen (and whose synchronization signal period matches the period of a normal TV signal). .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の概略図、 第2図は本発明の一実施例を示す図である。 11・−・画面合成回路、12・・・同期分離回路、1
5・・・R画面無信号検出回路、 14・・・同期信号切換回路、15・−同期分離回路、
16・・・子画面変換回路、 21・・・同期信号検出器、 23・・・同期信号切換スイッチ。 第1図 高 2 図
FIG. 1 is a schematic diagram of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention. 11... Screen composition circuit, 12... Synchronization separation circuit, 1
5...R screen no signal detection circuit, 14...Synchronization signal switching circuit, 15.-Synchronization separation circuit,
16...Small screen conversion circuit, 21...Sync signal detector, 23...Sync signal changeover switch. Figure 1 High Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1、通常の映像信号に所要の大きさに縮少した映像信号
を合成する装置において、2信号の周期分離回路と通常
映像信号の無信号時を検出する無信号検出回路と、無信
号時に合成回路の制御を通常映像信号の同期信号から縮
少映像信号の同期信号へ切換する同期信号切換回路を有
することを特徴とする映像出力装置。
1. In a device that synthesizes a video signal reduced to the required size with a normal video signal, a period separation circuit for two signals, a no-signal detection circuit that detects when there is no signal of the normal video signal, and a signal that combines the signal when there is no signal. A video output device comprising a synchronization signal switching circuit that switches control of the circuit from a synchronization signal of a normal video signal to a synchronization signal of a reduced video signal.
JP11681587A 1987-05-15 1987-05-15 Video output device Pending JPS63283281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11681587A JPS63283281A (en) 1987-05-15 1987-05-15 Video output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11681587A JPS63283281A (en) 1987-05-15 1987-05-15 Video output device

Publications (1)

Publication Number Publication Date
JPS63283281A true JPS63283281A (en) 1988-11-21

Family

ID=14696327

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11681587A Pending JPS63283281A (en) 1987-05-15 1987-05-15 Video output device

Country Status (1)

Country Link
JP (1) JPS63283281A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0600353A2 (en) * 1992-11-30 1994-06-08 Thomson Consumer Electronics, Inc. Automatic synchronization switch for multiple picture display

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61113475A (en) * 1984-11-08 1986-05-31 住友ゴム工業株式会社 Two-piece solid golf ball and its pruduction

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61113475A (en) * 1984-11-08 1986-05-31 住友ゴム工業株式会社 Two-piece solid golf ball and its pruduction

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0600353A2 (en) * 1992-11-30 1994-06-08 Thomson Consumer Electronics, Inc. Automatic synchronization switch for multiple picture display
EP0600353A3 (en) * 1992-11-30 1994-06-22 Thomson Consumer Electronics Automatic synchronization switch for multiple picture display.
JPH0774980A (en) * 1992-11-30 1995-03-17 Thomson Consumer Electron Inc Display device
US5576769A (en) * 1992-11-30 1996-11-19 Thomson Consumer Electronics, Inc. Automatic synchronization switch for side-by-side displays

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