JPS59186348A - Hybrid integrated circuit mounting structure - Google Patents

Abstract

PURPOSE:To economically mount the titled circuit with high reliability by covering and sealing active elements mounted to the circuit on the insulating substrate with a covering box without bottom. CONSTITUTION:Active elements 22 are mounted on an insulating substrate 11 forming circuit patterns with conductive bonding material and these are wired 23. Thereafter, a hollow covering box is placed thereon and the lower circumference is sealed by melted low-melting point glass in order to fix it. Thereafter, capacitors and other parts are mounted, external terminals are mounted, soldering is carried out, washing is performed and the surface is coated with the protection coating. According to this structure, the chip of active elements is perfectly protected from the outside, disconnection trouble by resin does not occur during manufacturing processes and a highly reliable mounting can be realized by utilizing an economical covering box.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a hybrid integrated circuit V in which all active elements are mounted on a substrate as is.

Since it has been used in various fields of electronic equipment and sedentary work, the r! ii) The demand has increased. Conventionally, mixed accumulation 1
As for the 94-way consonant, individual parts sealed in a container V were discharged, but recently, the demand for miniaturization has become stricter, and the active cord is mounted on the board with all chips intact. As shown in FIG. 1, two chips are mounted on a substrate 1 on which a circuit pattern is formed, and wires 3 are bonded to the electrodes to connect them to the circuit pattern.

Thereafter, the entire chip 2I and wires 3 are covered with an epoxy resin 4 and cured by heat to provide moisture resistance and strength against external mechanical pressure V, and to protect the active elements from failure even if they are exposed.

However, during this mounting process, the wires may be cut due to the expansion and contraction of the V1 resin when the resin is cured or the swelling caused by the VC organic bath agent when cleaning the board, and the cured resin is not strong enough to withstand external pressure. It has the disadvantage that it has no strength and is not reliable enough.

In addition to the above methods, to suppress VC active consonant retention, confusion,
There is a method of enclosing the whole ligament in a package. This mounting does not require covering and protecting with chip ke resin and does not have any of the above-mentioned drawbacks. However, the entire VC package is required for each hybrid integrated circuit, and the size of the package becomes larger, which further increases the price of the S-layer integrated circuit.

The purpose of the invention is to eliminate the above-mentioned drawbacks and provide a mounting structure in which all active elements are mounted on a 4-layer board, and a mounting structure in which the depth of the circuit is 1 o'clock and 1 + IIi #'6 does not deteriorate. There is VC to do.

The mounting structure by the uninvented VC is a lid fan ij that is open downward.
A chip system in which a wire is mounted and wire bonded to a circuit pattern on an insulating substrate, and a local portion VC on the surface of the substrate
All features are sealed and constant.

The invention will be described below with reference to all the drawings.

Figure 2 is a diagram for explaining one embodiment of the present invention. For mounting a mounting structure using an uninvented VC (VC r), first, a circuit pattern consisting of a VC resistor, a conductor, and an electrode for mounting a chip is formed on an insulating substrate.

11 is the completed 11Q board 11. Next, mount the 22 VC active device chips with conductive adhesive.

The electrodes of the chip 22 and the membrane substrate 11 are connected by a gold wire 23 by thermocompression bonding. A hollow cylindrical body 24 surrounds the wire-bonded chip r. : Place VC on the circuit pattern. This lid box body 24
The peripheral edge of the open lower surface PC low melting point glass 25 is A6
After mounting, the temperature is completely raised to the glass melting temperature, and the glass is sealed and fixed onto the substrate using VC. After that, we installed the capacitor and other parts, connected the external terminal sound, and then performed the soldering process using solder lag and solder reflow. The soldering process is then completed by cleaning and applying a surface protective coating.

As described above, in the mounting structure according to the invention, the active element chip is housed in the lid box sealed to the substrate and protected from the complete VC external blade 1. 1* Since all connection wires are not protected with resin, there will be no wire cutting accidents caused by resin during the manufacturing process. The structure of the lid box is simple, and it only needs to be large enough to surround the chig grapes, and since the size of the chips is limited, the lid box must be of a fixed shape and fit the same VC. Therefore, the lid box body is inexpensive.

[Brief explanation of drawings]

Figure 1 (σ shows the complete mounting of the conventional chip, Figure 2 i-j
：An example of an uninvented invention The first prisoner of the fc, which will be explained, is shown in Figure 43, and the figure showing the lid box body in Figures 4 and 2. IJ...-membrane circuit, 22...chip, 23...
Wire, 24... Lid box body, 25...Low melting point glass. ,'I

Claims (1)

[Claims] The circuit pattern on the insulating substrate VC active element chip 1" In the 1" path where the chip is directly viewed, the lid body with an open bottom surface is completely connected to the above-mentioned mount wire font. A mounting structure for a hybrid integrated circuit characterized in that a local portion of a VC on a line board surface is sealed and fixed.