JPS59182578A - Manufacture of photovoltaic device - Google Patents

Manufacture of photovoltaic device

Info

Publication number
JPS59182578A
JPS59182578A JP58057601A JP5760183A JPS59182578A JP S59182578 A JPS59182578 A JP S59182578A JP 58057601 A JP58057601 A JP 58057601A JP 5760183 A JP5760183 A JP 5760183A JP S59182578 A JPS59182578 A JP S59182578A
Authority
JP
Japan
Prior art keywords
substrate
chamber
layer
electrode layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58057601A
Other languages
Japanese (ja)
Inventor
Masaru Yamano
山野 大
Isao Nagaoka
長岡 勲
Yukinori Kuwano
桑野 幸徳
Hiroshi Kawada
河田 宏
Soichi Sakai
総一 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP58057601A priority Critical patent/JPS59182578A/en
Publication of JPS59182578A publication Critical patent/JPS59182578A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/0445PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Engineering & Computer Science (AREA)
  • Sustainable Energy (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To improve an optical utilization rate, and to automate a manufacturing process by removing the unnecessary sections of each layer in the adjacent space sections of a conversion region by the irradiation of energy beams. CONSTITUTION:A substrate 1 is arranged into a first electrode forming chamber, on the surface thereof a first electrode layer 2 is formed. The substrate 1 is moved into a gas reaction chamber forming a semiconductor layer to the substrate 1 by a gas reaction through a first preparatory chamber to which an evacuating means is related. A second electrode layer 4 is laminated and applied on the semiconductor layer while the unnecessary sections 3', 3' of each layer in the adjacent space sections 6ab, 6bc of a photoelectric conversion region are removed by the irradiation of energy beams. Accordingly, an optical utilization rate is improved while the automation of a manufacturing process is promoted.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は光エネルギを直接電気エネルギに変換する光起
電力装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a method for manufacturing a photovoltaic device that directly converts light energy into electrical energy.

(ロ)従来技術 此の種光起電力装置に於いて、光活性層にアモルファス
シリコンの様なガス反応により形成されるアモルファス
半導体層を用いたものは既着こ知られている。
(b) Prior Art Among photovoltaic devices of this kind, those using an amorphous semiconductor layer formed by a gas reaction, such as amorphous silicon, as a photoactive layer are already known.

第1図は上記アモルファス半導体層を用いた基本的な光
起電力装置を示し、(1)は透光性且つ絶縁性を有する
基板、(2a)(2b)(20)は基板(1)上に一定
間隔で被着された酸化スズ、酸化インジウム・スズ等の
透光性導電体から成る第1電極層、(3a)(31))
(3C)は各第1電極i(’2a)(2b)(2C)上
にシリコン化合物ガス中でのグロー放電により重畳被着
されたアモルファス半導体層、(4a)(4b)(4c
)は各アモルファス半導体層(aa)(3b)(3c)
上に重畳波Mされ、且ツ右隣りの第1電極層(2b)(
20)にその全幅方向に結合されたアルミニウム等の金
属から成る第2電極層である。
Figure 1 shows a basic photovoltaic device using the above amorphous semiconductor layer, in which (1) is a transparent and insulating substrate, (2a), (2b), and (20) are on the substrate (1). A first electrode layer consisting of a transparent conductor such as tin oxide, indium tin oxide, etc. deposited at regular intervals on
(3C) is an amorphous semiconductor layer superimposed on each first electrode i ('2a) (2b) (2C) by glow discharge in a silicon compound gas, (4a) (4b) (4c).
) are each amorphous semiconductor layer (aa) (3b) (3c)
The superimposed wave M is applied to the first electrode layer (2b) on the right side (
20) is a second electrode layer made of a metal such as aluminum and bonded in its entire width direction.

各アモルファス半導体層(3a)(31))(30)は
、その内部に例えばガス巾着こP坐着しくはN型決定不
純物を含む不純物ガスを添加すること番こより膜面に平
行なP、 工N接合を備え、従って基板(1)を介して
上記第1電極層(,2a)(2’b)(2C)、アモル
ファス半導体層(3a) (3’b)(30)及び第2
電極層(4aH4b)(4c)の各積層体から成る光電
変換領域(5a)(5b)(5(り に光照射カアルト
、各光電変換領域(5a)(51))(5(1りは光起
電力を発生し、その光起電力は第1電極層(2’b) 
(20)と第2電極層(4a)(4b)との結合により
直列的に相加される。
Each of the amorphous semiconductor layers (3a), (31), and (30) is formed by adding, for example, a gas pouch or an impurity gas containing an N-type determining impurity to the inside of the amorphous semiconductor layer (3a), (31), and (30). The first electrode layer (, 2a) (2'b) (2C), the amorphous semiconductor layer (3a) (3'b) (30) and the second
Photoelectric conversion regions (5a) (5b) (5 (1) are light irradiated, each photoelectric conversion region (5a) (51)) (5 (1 is light irradiated), each photoelectric conversion region (5a) (51)) (5 (1 Generates an electromotive force, and the photovoltaic force is transferred to the first electrode layer (2'b)
(20) and the second electrode layer (4a) (4b) are added in series.

此の種ガス反応により形成される半導体層を備えた光起
電力装置は、通常引上げにより作成された単結晶をウェ
ハ状lこスライスした単結晶基板から成るものに較べ生
産性が優れていることは周知の通りである。
A photovoltaic device equipped with a semiconductor layer formed by such a seed gas reaction has superior productivity compared to a device made of a single crystal substrate obtained by slicing a single crystal produced by normal pulling into wafer shapes. As is well known.

特開昭55−125681号公報に開示された先行技術
は、第1電極層、アモルファス半導体層及び第2電極層
を一体的に結合配置された第1電極形成室、ガス反応室
及び第2電極形成室内に基板を1室づつ順送りすること
により、上記基板上に複数の光電変換領域を連続形成す
るものであり、上述の如き此の稲光起電力装置の生産性
が優れていることを有効に利用したものである。
The prior art disclosed in JP-A-55-125681 discloses a first electrode forming chamber, a gas reaction chamber, and a second electrode in which a first electrode layer, an amorphous semiconductor layer, and a second electrode layer are integrally arranged. By sequentially feeding the substrates into the formation chamber one by one, a plurality of photoelectric conversion regions are continuously formed on the substrate, and the excellent productivity of this lightning photovoltaic device as described above is effectively utilized. It was used.

光起電力装置に於いて、光利用効率を左右する一つの要
因は、装置全体の受光面積に対し、実際に光電変換lこ
有効に寄与する光電変換領域(5a)(5b)(5C)
の総面積の占める割合いである。然るに、各光電変換領
域(5a)(5bl(5C)の隣接間隔部(6ab)(
6bc)  に必然的に存在する光電変換1こ寄与しな
い無効領域は上記面積割合いを低下させる。
In a photovoltaic device, one factor that influences the light utilization efficiency is the photoelectric conversion area (5a) (5b) (5C) that actually contributes effectively to photoelectric conversion with respect to the light receiving area of the entire device.
This is the percentage of the total area of However, the adjacent interval portions (6ab) (of each photoelectric conversion region (5a) (5bl (5C))
6bc) The ineffective region that does not contribute to photoelectric conversion, which inevitably exists in the area, reduces the above-mentioned area ratio.

従って、光利用効率を向上するには、先ず第1電極層(
,2a)(2b)(20)の隣接間隔を小さくし、そし
て同じくアモルファス半導体m(3a>(3t+)(3
C)と第2電極層(4a)(4b)(40)の各隣接間
隔を小さくしなければならない。
Therefore, in order to improve the light utilization efficiency, first the first electrode layer (
, 2a) (2b) (20), and similarly the amorphous semiconductor m(3a>(3t+)(3t+)
C) and the adjacent spacing between the second electrode layers (4a), (4b), and (40) must be reduced.

然し乍ら、上記先行技術は生産性が優れてい′るにも拘
らず、上記隣接間隔部(6,ab)(abc)を各層被
着時メタルマスクで被覆することによって、各層が被着
されない隣接間隔部(6ab)(6bc)を直接形成す
るものであり、周知の如くマスク技1術を用いるが故に
隣接間隔部(6abH6b’c)の間隔縮小には不適当
である。特に、ガス反応により被着される半導体層は反
応時、基板(1)が高温に保持。
However, although the above-described prior art has excellent productivity, by covering the adjacent spacing portions (6, ab) (abc) with a metal mask when each layer is deposited, the adjacent spacing where each layer is not deposited is reduced. Since the portions (6ab) (6bc) are directly formed and a well-known mask technique is used, it is not suitable for reducing the distance between the adjacent spaced portions (6abH6b'c). In particular, when a semiconductor layer is deposited by a gas reaction, the substrate (1) is kept at a high temperature during the reaction.

されるためにメタルマスクとの線膨張率の差等を原因と
して両者の密着性が損なわれ、その結果反応ガスの回り
込みが発生し上記間隔縮小に悪影響を及ぼす。斯る先行
技術にガス反応lζより被着される半導体層が隣接間隔
部(6abt(abc)に於いて分割されず、複数の光
電変換領域(5a)(5−o)(5C)に共通に跨った
一枚物となっているのも、上述の如き理由が一因をなし
ているものと思われる。
As a result, the adhesion between the metal mask and the metal mask is impaired due to a difference in coefficient of linear expansion, etc., and as a result, reaction gas flows around, which has an adverse effect on the above-mentioned reduction in the distance. In such prior art, a semiconductor layer deposited by a gas reaction lζ is not divided at an adjacent interval (6abt (abc)) but is commonly applied to a plurality of photoelectric conversion regions (5a) (5-o) (5C). The reason why it is a single piece that spans over each other is probably due to the reasons mentioned above.

(ハ)発明の目的 本発明は斯る点に鑑みて為されたものであって、その目
的は、光利用効率を上昇せしめると共lこ、製造工程の
自動化を推進し生産性をより一層向上せしめた光起電力
装置の製造方法を提供することにある。。
(c) Purpose of the Invention The present invention has been made in view of the above points, and its purpose is to increase the efficiency of light utilization, as well as promote automation of the manufacturing process and further increase productivity. An object of the present invention is to provide an improved method of manufacturing a photovoltaic device. .

に)発明の構成 本発明光起電力装置の製造方法は、絶縁表面を有する基
板を、その表面に第1電極層を形成する第1電極形成室
に配置し、第1電極層形成後排気手段が関連付けられた
第1予備室を経て半導体層をガス反応により形成するガ
ス反応室に移動せしめ、上記第1電極層上に半導体層を
積層し、次いで排気手段が関連付けられた第2予備室を
経て第2電極層を形成する第2電極形成室lこ移動せし
め、上記半導体層上に第2電極層を積層被着せしめると
共に、上記光電変換領域の隣接間隔部に於ける各層の不
要部をエネルギビームの照射により除去する、構成にあ
る。
B) Structure of the Invention In the method for manufacturing a photovoltaic device of the present invention, a substrate having an insulating surface is placed in a first electrode forming chamber in which a first electrode layer is formed on the surface thereof, and after the first electrode layer is formed, an exhaust means is provided. The semiconductor layer is transferred to a gas reaction chamber formed by a gas reaction through a first preliminary chamber associated with a semiconductor layer, the semiconductor layer is laminated on the first electrode layer, and then a second preliminary chamber is associated with an exhaust means. Then, the second electrode formation chamber for forming the second electrode layer is moved, and the second electrode layer is laminated and deposited on the semiconductor layer, and unnecessary parts of each layer are removed in the adjacent spacing between the photoelectric conversion regions. The structure is such that it is removed by irradiation with an energy beam.

(ホ)実施例 第2図は本発明方法を実施するための製造装置を、第3
図はその要部を、更に第4図乃至第9図は各工程に於け
る状態を示し、上記第4図乃至第9図(ζ於いて第1図
と同じものについては同蕃号が付しである。先ずは第2
図に示された製造装置を、第4図乃至第9図を参照して
説明することにする。皿は基板(1)の−表面全面に第
1電極層(2)を形成する第1電極形成室、111は複
数の光電変換領域(5a)(5t))(5Cりの隣接間
隔部(6a’b)(abC)+こ於ける上記第1電極層
(2)の不要部(21’[21’をエネルギビーム、例
えばレーザビーム(LB)の照射により除去する第2レ
ーザ室pは後述する排気手段が関連付けられた第1予備
室、しは半導体層、例えばアモルファス半導体層(3)
を不要部(21(2’;が除去され分割された複数の第
1電極層(2a)(2b)(2C)全面を覆う如くガス
反応により被着するガス反応室、Iは後述する排気手段
が関連付けられた第2予備室、05)は上記アモルファ
ス半導体層(3)の不要部+3+’f3どをレーザビー
ム(LB)の照射により除去する第2レーザ室、(16
)は不要部+31’+31’が除去され分割された複数
のアモルファス半導体層(3a)(31))(30)全
面に第2電極層(4)を形成する第2電極形成室、(1
7+は上記第2電極層(4)の不要部+41’+41’
をレーザビーム(LB)の照射により除去する第6レー
ザ室で、上記第1電極形成室0I乃至第6レーザ室α7
1旦基板(1)を搬送する搬送手段囮を介して一体的に
結合されている。(19a)(19b)は上記第1電極
形成室00)乃至第3レーザ室α′71の入口及び出口
に設けられた開閉自在な入口及び出口扉、(20a)〜
(20g)は各室001〜(171の隔壁(21a)〜
(21g)ニ設けられた第1〜第7分離扉である。
(E) Embodiment Figure 2 shows a manufacturing apparatus for carrying out the method of the present invention.
The figure shows the main parts, and Figures 4 to 9 show the states in each process. First of all, the second
The manufacturing apparatus shown in the figure will be explained with reference to FIGS. 4 to 9. The dish is a first electrode formation chamber in which a first electrode layer (2) is formed on the entire surface of the substrate (1), and 111 is a plurality of photoelectric conversion regions (5a) (5t)) (adjacent spaced parts (6a) of 5C). 'b)(abC)+The second laser chamber p in which the unnecessary part (21') of the first electrode layer (2) at this point is removed by irradiation with an energy beam, for example, a laser beam (LB) will be described later. a first preliminary chamber with associated exhaust means and a semiconductor layer, for example an amorphous semiconductor layer (3);
A gas reaction chamber in which unnecessary portions (21 (2') are removed and divided into plural first electrode layers (2a), (2b, and (2C)) are deposited by gas reaction so as to cover the entire surface, and I is an exhaust means to be described later. A second preliminary chamber, 05) associated with the amorphous semiconductor layer (3) is a second laser chamber, (16
) is a plurality of divided amorphous semiconductor layers (3a) (31)) (30) in which unnecessary portions +31'+31' have been removed and a second electrode formation chamber (1) in which a second electrode layer (4) is formed on the entire surface;
7+ is the unnecessary part of the second electrode layer (4) +41'+41'
In the sixth laser chamber, the first electrode forming chamber 0I to the sixth laser chamber α7 are removed by irradiation with a laser beam (LB).
Once the substrate (1) is transported, they are integrally connected via a transport means decoy. (19a) and (19b) are freely openable and closable entrance and exit doors provided at the entrances and exits of the first electrode forming chamber 00) to the third laser chamber α'71;
(20g) is for each chamber 001~(171 partition wall (21a)~
(21g) These are the first to seventh separation doors provided.

第6図は基板(1)の搬送メカニズムを示し、基板(1
)は、枠状のトレイ@に各層が形成される側の面(即ち
本実施例では底面)を露出せしめた状態でセットされ、
dトレイ(支)は平行配置された一対のチェーンベルト
(23a)(23b)・・・と該チェーンベル) (2
3a) (23b)−を駆動する駆動輪(24a)(2
41))・・・とから成る搬送手段081・・・に載置
され開放状態にアル入口扉(19a)、第1〜第7分離
扉(20a)〜(20g)及び出口扉(19a)を通過
して各室(1o)〜口り及び外部に移動する。例えば、
第3図に示す如く、トレイ@にセットされた基板(1)
は、該トレイにかチェーンベルl−(23a) (23
b)の対向部に設けられた段部(25a)(25t))
に載置せしめられ、駆動輪(24a)(24b)の回転
により開放状態にある入口扉(19a)を通、過して、
トレイ(22ごと第1電極形成室(101内に設けられ
たチェーンベルト(23a)(23b)により該室(1
σ内に取り込まれる。
Figure 6 shows the conveyance mechanism of the substrate (1).
) is set in a frame-shaped tray @ with the surface on which each layer is formed (i.e., the bottom surface in this example) exposed,
The d tray (support) consists of a pair of chain belts (23a) (23b)... and the chain belt (23a) (23b) arranged in parallel.
3a) (23b) - driving wheels (24a) (2
41))... The aluminum entrance door (19a), the first to seventh separation doors (20a) to (20g), and the exit door (19a) are placed in an open state on a conveying means 081 consisting of... It passes through and moves from each chamber (1o) to the mouth and outside. for example,
As shown in Figure 3, the board (1) set on the tray @
is the chain bell l-(23a) (23
Stepped portions (25a) (25t) provided on the opposing portions of b)
Passing through the entrance door (19a), which is placed on the
The tray (22) is connected to the first electrode forming chamber (101) by chain belts (23a) (23b) provided in the first electrode forming chamber (101).
It is incorporated into σ.

第1電極形成室(1o)内に取り込まれた基板(1)は
透光性導電体材料をターゲット■とする電子ビーム蒸着
により厚さ2000人〜5000人の第1電極層(2)
が第4図に示す如く全面に形成される。この様lこ全面
(こ第1電極層(2)が形成された基板(1)は、チェ
ーンベルト(23a)(23b)により第1電極形成室
0αと第ル−ザ室(111とを隔てている隔壁(21i
)近傍まで搬送されると、先に説明した入口扉(19a
)を通過して第1電極形成室4101内への取り込みと
同様、開放状態にある第1分離扉(2oa)を通過して
第ル−ザ室(111内に取り込まれる。即ち、上記チェ
ーンベルl−(23a’) (23b)・・・は各室(
1o)〜αη毎に分割されているものの、基板(1)を
トレイ■を介して連続的に移動せしめることができる。
The substrate (1) taken into the first electrode forming chamber (1o) is formed into a first electrode layer (2) with a thickness of 2,000 to 5,000 layers by electron beam evaporation using a transparent conductive material as a target.
is formed on the entire surface as shown in FIG. In this manner, the entire surface of the substrate (1) on which the first electrode layer (2) is formed is separated from the first electrode forming chamber 0α and the first looser chamber (111) by chain belts (23a) (23b). bulkhead (21i
), the entrance door (19a
) and into the first electrode forming chamber 4101, the chain bell is taken into the first looser chamber (111) through the first separation door (2OA) in the open state. l-(23a') (23b)... is each room (
Although the substrate (1) is divided into 1o) to αη, it is possible to continuously move the substrate (1) through the tray (2).

第2レーザ室111)では搬送されて来る基板(1)を
ビデオカメラ(ハ)により撮像し、所定位置に到達する
とチェーンベルト帥a’)(23b)分咽働S壬顯ま毛
航絆の駆動輪(24a)、(24b)・・・を停止せし
め、上記基板(1)をトレイ(22)ごとX軸及びY軸
方向に移動するXYステージ(至)に固定する。より詳
しくは、XYステージ(支)は基板(1)が所定位置に
到達したことを検出する検出回路を含む制御回路(5)
)の制御信号CT L、  によりXYステージ(支)
を駆動せしめる駆動機構(30)によって、第ル−ザ室
(11)と同一構成にある第2レーザ室a5の如くXY
ステージ轍を下降せしめ、係止片(28a)(28b)
・・・で以ってトレイ22)を挾持し、然る後XYステ
ージ□□□を照射位置【こまで上昇せしめる。この様に
照射位置のXYステージ圀)に基板(1)が固定される
と、制御回路にはビデオカメラ勃の撮像ζこより得られ
る位置情報に基づき制御信号CT L2 を出力し、レ
ーザ装置0υの発振動作を制御する。斯るレー、ザ装置
のυとしては波長的1.06μmのQスイッチ付YAG
レーザが使用され、パルス繰返し周波数3KHzで光学
レンズOaIこより平均出力約1Wを得るべくビーム径
が調整される。レーザビーム(LB)が照射され゛る基
板(1)は制御回路C(2)に予め格納された移動パタ
ーンに基づきXYステージ□□□により約50 zz 
/ Secの走査速度で2次元的に走査され、上記レー
ザビーム(LB)が照射された隣接間隔Q (6ab)
 (6be )に於ける不要部+21’(2どが第5図
に示す如く除去される。この時除去される第1電極層の
不要部(2+’f21’の幅、即ち第1電極層(2a)
(2b)(2C)(7)間隔幅り、  は約100μm
に設定される。
In the second laser chamber 111), the transported substrate (1) is imaged by a video camera (c), and when it reaches a predetermined position, the chain belt handle a') (23b) The drive wheels (24a), (24b), etc. are stopped, and the substrate (1), together with the tray (22), is fixed to an XY stage that moves in the X-axis and Y-axis directions. More specifically, the XY stage (support) has a control circuit (5) including a detection circuit that detects that the substrate (1) has reached a predetermined position.
) control signal CT L, XY stage (support)
The drive mechanism (30) that drives the
Lower the stage tracks and use the locking pieces (28a) (28b)
. . . Then, the tray 22) is held, and then the XY stage □□□ is raised to the irradiation position. When the substrate (1) is fixed to the XY stage area at the irradiation position in this way, the control signal CT L2 is output to the control circuit based on the position information obtained from the imaging of the video camera, and the laser device 0υ is Controls oscillation operation. The υ of such a laser device is a YAG with a Q switch with a wavelength of 1.06 μm.
A laser is used and the beam diameter is adjusted to obtain an average power of about 1 W through an optical lens OaI with a pulse repetition frequency of 3 KHz. The substrate (1) to which the laser beam (LB) is irradiated is moved approximately 50 zz by the XY stage □□□ based on the movement pattern stored in advance in the control circuit C (2).
Adjacent interval Q (6ab) scanned two-dimensionally at a scanning speed of /Sec and irradiated with the laser beam (LB)
The unnecessary part +21' (2) in (6be) is removed as shown in FIG. 2a)
(2b) (2C) (7) Spacing width is approximately 100μm
is set to

斯るレーザビーム(LBHとよる不要部+2)’+2+
’の除去自体は特開昭57−1256E3号公報に開示
された如く周知であり、極めて微細加工性に富み光利用
効率の上昇が図れる。
Such a laser beam (unnecessary part +2 due to LBH)'+2+
' Removal itself is well known as disclosed in Japanese Patent Application Laid-Open No. 57-1256E3, and is extremely fine-fabricable and can improve light utilization efficiency.

レーザビーム(LB)の照射が終了すると、XYステー
ジ努)は下降し、基板(1)を搬送手段(181である
一対のチェーンベルト(23a)(23b)にトレイ(
22)ごと載置して、該基板(1)を再び移動可能にす
る。この時点に於いて、次の基板(1)ホ後方の室であ
る第1電極形成室(10)内で、所定の処理、即ち第1
電極層(2)の形成が終了している。従って、各室00
)〜aη内では所定の処理がモ行して行なわれており、
以下の説明に於いては先頭の基板(1)への処理につぃ
てのみ述べることにする。
When the laser beam (LB) irradiation is completed, the XY stage Tsutomu) is lowered and the substrate (1) is transferred to the tray (
22) to make the substrate (1) movable again. At this point, a predetermined process is carried out in the first electrode forming chamber (10) which is the chamber behind the next substrate (1).
Formation of the electrode layer (2) has been completed. Therefore, each room has 00
)~aη, a predetermined process is carried out in a continuous manner,
In the following explanation, only the processing for the first substrate (1) will be described.

次いで基板(1)は第2レーザ室[11から第1予備室
(12+に移る。この予備室a′lJは次室のガス反応
室(laに基板(1)を搬送せ、しめる際、空気がガス
反応室(13)に侵入するのを、或いは反応ガスが大気
中に漏出するのを防止するもので、該予備室0″21に
はこの室内を排気するための排、気路(ハ)、排気バル
ブ■及び真空ポンプ(2)から成る排気手段(至)が関
連付けられている。即ち、第1予備室+12+に取り込
まれた基板(1)は、ガス反応室uJに搬送せしめられ
る前に、該予備室azで排気手段(3ωの動作により減
圧状態lこ保持され、第2分前扉(211))を閉じた
状態で第6分離層(21C)を開放すること番こより、
減圧状態或いは反応ガスを含む減圧状態のガス反応室(
131内に搬送せしめられる。
Next, the substrate (1) is transferred from the second laser chamber [11] to the first preliminary chamber (12+).This preliminary chamber a'lJ is used to transfer the substrate (1) to the next chamber, the gas reaction chamber (la), and when closing it, it is filled with air. This is to prevent reaction gas from entering the gas reaction chamber (13) or from leaking into the atmosphere. ), an exhaust valve ■, and a vacuum pump (2) are associated with each other.That is, before the substrate (1) taken into the first preliminary chamber +12+ is transferred to the gas reaction chamber uJ, Then, in the preliminary chamber az, the sixth separation layer (21C) is opened while the exhaust means (the second minute door (211), which is maintained in a reduced pressure state by the operation of 3ω) is closed;
A gas reaction chamber in a reduced pressure state or a reduced pressure state containing a reaction gas (
131.

ガス反応室+13に基板(1)が搬送せしめられると、
要部+21’f21’が除去され分割された第1電極層
(2i)(2b)(2Q)上全面に、周知のグロー放電
によりアモルファスシリコンから成るアモルファス半導
体層(3)を第6図の如く被着する。斯るガス反応室(
13)には基板(1)側から膜面に平行なP工N接合を
形成する場合、ガス切替バルブ(40a ) (40’
b ) (400)を制御して先ずシラン(S’LH4
)  ガスボンベ0])とP5決定不純物を含むジボラ
ン(B2H6)ガスボンベ@りからS i、H4及びB
2H6を導入し、膜厚200人〜300人程度のP型層
を形成した後、一旦ガス反応室03)を排気バルブ■を
開き排気し、次いでS 1−H4のみで膜厚4000人
〜6000人程度の工型層を、そして最後にN型決定不
純物を含むフォスフイン(PH3)ガスボンベ(財)か
らPH3をS j−H4中lこ添加し膜厚200人〜5
00人程度のN型層を積層する。
When the substrate (1) is transferred to the gas reaction chamber +13,
An amorphous semiconductor layer (3) made of amorphous silicon is formed by well-known glow discharge on the entire surface of the first electrode layer (2i) (2b) (2Q) from which the main part +21'f21' has been removed and divided, as shown in Fig. 6. to adhere to. Such a gas reaction chamber (
13), when forming a P-N junction parallel to the film surface from the substrate (1) side, gas switching valves (40a) (40'
b) First, silane (S'LH4) was added by controlling (400).
) gas cylinder 0]) and diborane (B2H6) gas cylinder containing P5-determined impurities @rikara Si, H4 and B
After introducing 2H6 and forming a P-type layer with a thickness of about 200 to 300 layers, the gas reaction chamber 03) was evacuated by opening the exhaust valve (2), and then a film thickness of 4000 to 6000 layers was formed using only S1-H4. PH3 is added to Sj-H4 from a phosphine (PH3) gas cylinder containing N-type impurities to form a film with a thickness of 200~5.
Stack N-type layers of about 00 people.

この様に導電型の異なる半導体層を積層する場合、特開
昭56−114387号公報に開示された如く各導電型
毎にガス反応室(13)を分離することが好ましい。こ
の場合工型層を形成するためのガス反応時間は他のP型
N型層のそれに較べその膜厚に比例した分だけ長くなる
ために、1型ガス反応室の室内は広くなっており、複数
枚の基板(1)が同時に処理され、各室aω〜(17+
を含め全ての処理が滞らないように構成されている。
When stacking semiconductor layers of different conductivity types in this manner, it is preferable to separate gas reaction chambers (13) for each conductivity type as disclosed in Japanese Patent Laid-Open No. 114387/1983. In this case, the gas reaction time for forming the mold layer is longer than that for other P-type and N-type layers in proportion to the film thickness, so the type 1 gas reaction chamber is wider. A plurality of substrates (1) are processed simultaneously, and each chamber aω~(17+
It is structured so that all processing, including .

アモルファス半導体層(3)を被着後、基板(1)は第
5分離心(21e)が閉じられ排気バルブ(ロ)の開放
により減圧状態にある第2予備室0IJに取り込まれ、
第4分前扉(21d)を閉塞し該室圓に漏出した反応ガ
スを回収する。
After depositing the amorphous semiconductor layer (3), the substrate (1) is taken into the second preliminary chamber 0IJ, which is in a reduced pressure state by closing the fifth separation core (21e) and opening the exhaust valve (b).
Before the fourth minute, the door (21d) is closed and the reaction gas leaked into the chamber is collected.

次に基板(1)は第2レーザ室(t51に搬送され上記
アモルファス半導体層(3)の隣接部(6a、’b) 
(ebc)に於ける不要部+31’+31’がレーザビ
ーム(LB)の照射により除去され、第7図の如く分割
されたアモルファス半導体層(3a)(3b)(30)
が形成される。
Next, the substrate (1) is transported to the second laser chamber (t51) and the adjacent portions (6a, 'b) of the amorphous semiconductor layer (3) are transferred to the second laser chamber (t51).
The unnecessary parts +31'+31' in (ebc) are removed by laser beam (LB) irradiation, and the amorphous semiconductor layer (3a) (3b) (30) is divided as shown in FIG.
is formed.

この各層の間隔幅L2  は約300μmに設定される
。斯るレーザ加工に於いて留意しなければならないこと
は、除去すべき半導体層(3)の下に第1電極層(2a
)(2b)(2(りが存在し、そ(7) Q ic損傷
を与えないことである。従って、上記レーザ加工に於い
モは特開昭57−12568号公報に開示された如くし
Tザ出力や繰り返し周波数、若しくはレーザの波長が適
宜選択される。
The interval width L2 between each layer is set to about 300 μm. What must be kept in mind during such laser processing is that the first electrode layer (2a) is placed under the semiconductor layer (3) to be removed.
) (2 b) (2 The laser output, repetition frequency, or laser wavelength is selected as appropriate.

レーザ加工が終了すると第2電極形成室06)に基板(
1)は搬送される。この第2電極形成室06)では、真
空中に於いて、例えばアルミニウム基体(財)をヒータ
■で加熱すること番こよりアルミニウムから成る第2電
極層(4)が第8図に示す如く全面に真空蒸着される。
When the laser processing is completed, the substrate (
1) is transported. In this second electrode forming chamber 06), for example, by heating an aluminum substrate (goods) with a heater 2 in a vacuum, a second electrode layer 4 made of aluminum is formed over the entire surface as shown in FIG. Vacuum deposited.

第2電極層(4)形成後、第6レーザ室u71に基板(
1)は搬送され、第9図のように隣接間隔部(6a’1
))(6bc)に於いて第2電極層(4)の不要部+4
1’+41’を除去すべくレーザビーム(LB)が照射
され、第2電極層(4a)(4b)Nc)が分割される
と同時に、第1電極Jjl(2a)(2b)(2Q) 
、7%ルア77、半導体層(3a)(3b)(3Q)、
第2電極層(4a)(4b)(4(りの各積層体から成
る光電変換領域(5a)(5b)(5c)は電気的に直
列接続される。斯る第5レーザ室(17+で分割された
第2電極層(4a)(4b)(4C)の隣接間隔幅L3
 は約20μmに設定される。
After forming the second electrode layer (4), the substrate (
1) is transported, and as shown in FIG.
)) In (6bc), the unnecessary part of the second electrode layer (4) +4
A laser beam (LB) is irradiated to remove 1'+41', and at the same time the second electrode layer (4a) (4b) Nc) is divided, the first electrode Jjl (2a) (2b) (2Q)
, 7% Lua 77, semiconductor layer (3a) (3b) (3Q),
The photoelectric conversion regions (5a), (5b), and (5c) consisting of the second electrode layers (4a, 4b, and 4) are electrically connected in series. Adjacent interval width L3 of divided second electrode layers (4a) (4b) (4C)
is set to about 20 μm.

この様にして第3レーザ室αηで複数の光電変換領域(
5a)(5b)(5c)が電気的に直列接続された基板
(1)は出口扉(19’D)から搬出せしめられる際、
既に光起電力を発、生し得る光起電力装置としての形態
が形成され、ている。
In this way, a plurality of photoelectric conversion regions (
When the board (1) in which 5a, 5b, and 5c are electrically connected in series is carried out from the exit door (19'D),
A photovoltaic device capable of generating photovoltaic force has already been formed.

尚、上記実施例で挙げた各種の数値及び材料等は例示的
なものであって、適宜変更できることは言うに及ばない
It should be noted that the various numerical values, materials, etc. mentioned in the above embodiments are merely exemplary, and it goes without saying that they can be changed as appropriate.

(へ)発明の効果 本発明は以上の説明から明らかな如く、ガス反応室の前
後に排気手段が関連付けられた第1・第2予備室を配置
すると共に複数の光電変換領域の隣接間隔部に於ける各
層の不要部をエネルギビームの照射により除去せしめた
ので、各室を連続的に結合することができ、光利用効率
を上昇せしめるのみならず、製造工程の自動化を推進し
生産性をより一層向上せしめることができる。
(F) Effects of the Invention As is clear from the above description, the present invention provides first and second auxiliary chambers that are associated with exhaust means before and after a gas reaction chamber, and also provides space between adjacent photoelectric conversion regions. Since unnecessary parts of each layer were removed by irradiation with energy beams, each chamber can be connected continuously, which not only increases light utilization efficiency but also promotes automation of the manufacturing process and increases productivity. This can be further improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は基本的な光起電力装置の要部を示す斜視図、第
2図は本発明方法を実施するための製造装置の概略図、
第3図はその要部を示し、同図[AIは側面図、同図(
Blは上面図、同図(C1は同図(Blに於けるC−0
7線断面図、同図(DJは同図(Blに於けるD−D’
線断面図、第4図乃至第9図は本発明方法により製造さ
れる光起電力装置の工程別側面図、を夫々示している。 (1)・・・基板、[21(2a)(1)(2c)−・
・第1@極層、f31(3a)(3b)(3C) ・−
Mルア アス半導体層、f41 (4a ) (4b 
) (4c )−・・第2電極層、(5a)(5b)(
5C)・・・光電変換領域、(101・・・第1電極形
成室、01)(151071・・・第1・第2・第3レ
ーザ室、口2041・・・第1・第2予備室、03)・
・・ガス反応室。 出願人 三洋電機株式会社 代理人  弁理士 佐 野 静 夫 ! 第6[゛ズ1 づ
FIG. 1 is a perspective view showing the main parts of a basic photovoltaic device, FIG. 2 is a schematic diagram of a manufacturing apparatus for carrying out the method of the present invention,
Figure 3 shows the main parts, and the same figure [AI is a side view, the same figure (
Bl is a top view, the same figure (C1 is the same figure (C-0 in Bl)
7-line sectional view, the same figure (DJ is the same figure (DD' in Bl)
A line sectional view and FIGS. 4 to 9 each show a step-by-step side view of a photovoltaic device manufactured by the method of the present invention. (1)...Substrate, [21(2a)(1)(2c)--
・1st @ polar layer, f31 (3a) (3b) (3C) ・-
M Lua As semiconductor layer, f41 (4a) (4b
) (4c)--second electrode layer, (5a)(5b)(
5C)...Photoelectric conversion area, (101...First electrode formation chamber, 01) (151071...First, second, and third laser chambers, Port 2041...First and second preliminary chambers ,03)・
...Gas reaction chamber. Applicant Sanyo Electric Co., Ltd. Agent Patent Attorney Shizuo Sano! Part 6

Claims (1)

【特許請求の範囲】[Claims] (1)基板の絶縁表面上に、第1電極層、半導体層及び
第2電極層の積層体から成る複数の光電変換領域を形成
し、該光電変換領域を電気的に直列接続せしめた光起電
力装置の製造方法であって、上記基板を、その表面に第
1電極層を形成する第1電極形成室に配置し、第1電極
層形成後排気手段が関連付けられた第1予備室を経て半
導体層をガス反応により形成するガス反応室に移動せし
め、上記第1電極層上に半導体層を積層し、次いで排気
手段が関連付けられた第2予備室を経て第2電極層を形
成する第2電極形成室に移動せしめ、上記□半導体層上
に第2電極層を積層被着せしめると共に、上記光電変換
領域の隣接間隔部に於ける各層の不要部をエネルギビー
ムの照射により除去したことを特徴とする光起電力装置
の製造方法。
(1) A photovoltaic system in which a plurality of photoelectric conversion regions each consisting of a laminate of a first electrode layer, a semiconductor layer, and a second electrode layer are formed on an insulating surface of a substrate, and the photoelectric conversion regions are electrically connected in series. A method for manufacturing a power device, wherein the substrate is placed in a first electrode forming chamber in which a first electrode layer is formed on the surface of the substrate, and after forming the first electrode layer, the substrate is passed through a first preliminary chamber associated with an exhaust means. A second step in which the semiconductor layer is moved to a gas reaction chamber formed by a gas reaction, the semiconductor layer is laminated on the first electrode layer, and then passes through a second preliminary chamber associated with an exhaust means to form a second electrode layer. The method is moved to an electrode forming chamber, and a second electrode layer is laminated and deposited on the □ semiconductor layer, and unnecessary portions of each layer in the adjacent spacing of the photoelectric conversion region are removed by irradiation with an energy beam. A method for manufacturing a photovoltaic device.
JP58057601A 1983-03-31 1983-03-31 Manufacture of photovoltaic device Pending JPS59182578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58057601A JPS59182578A (en) 1983-03-31 1983-03-31 Manufacture of photovoltaic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58057601A JPS59182578A (en) 1983-03-31 1983-03-31 Manufacture of photovoltaic device

Publications (1)

Publication Number Publication Date
JPS59182578A true JPS59182578A (en) 1984-10-17

Family

ID=13060370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58057601A Pending JPS59182578A (en) 1983-03-31 1983-03-31 Manufacture of photovoltaic device

Country Status (1)

Country Link
JP (1) JPS59182578A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4122845A1 (en) * 1990-10-17 1992-04-23 Mitsubishi Electric Corp SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55125681A (en) * 1979-03-22 1980-09-27 Sanyo Electric Co Ltd Manufacture of photovoltaic device
JPS5712568A (en) * 1980-06-02 1982-01-22 Rca Corp Method of producing solar battery
JPS5753986A (en) * 1980-07-25 1982-03-31 Eastman Kodak Co
JPS5850733A (en) * 1981-09-21 1983-03-25 Fuji Electric Corp Res & Dev Ltd Mass-production apparatus of thin film for solar cell

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55125681A (en) * 1979-03-22 1980-09-27 Sanyo Electric Co Ltd Manufacture of photovoltaic device
JPS5712568A (en) * 1980-06-02 1982-01-22 Rca Corp Method of producing solar battery
JPS5753986A (en) * 1980-07-25 1982-03-31 Eastman Kodak Co
JPS5850733A (en) * 1981-09-21 1983-03-25 Fuji Electric Corp Res & Dev Ltd Mass-production apparatus of thin film for solar cell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4122845A1 (en) * 1990-10-17 1992-04-23 Mitsubishi Electric Corp SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
US5147468A (en) * 1990-10-17 1992-09-15 Mitsubishi Denki Kabushiki Kaisha Photovoltaic semiconductor device and method for manufacturing the same

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