JPS59181549A - Life time measurement of semiconductor wafer - Google Patents

Life time measurement of semiconductor wafer

Info

Publication number
JPS59181549A
JPS59181549A JP5391883A JP5391883A JPS59181549A JP S59181549 A JPS59181549 A JP S59181549A JP 5391883 A JP5391883 A JP 5391883A JP 5391883 A JP5391883 A JP 5391883A JP S59181549 A JPS59181549 A JP S59181549A
Authority
JP
Japan
Prior art keywords
light
semiconductor wafer
wafer
semiconductor
measuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5391883A
Other languages
Japanese (ja)
Other versions
JPS6248377B2 (en
Inventor
Koji Murai
村井 耕治
Akira Usami
宇佐美 晶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPON SILICON KK
Mitsubishi Metal Corp
Original Assignee
NIPPON SILICON KK
Mitsubishi Metal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPON SILICON KK, Mitsubishi Metal Corp filed Critical NIPPON SILICON KK
Priority to JP5391883A priority Critical patent/JPS59181549A/en
Publication of JPS59181549A publication Critical patent/JPS59181549A/en
Publication of JPS6248377B2 publication Critical patent/JPS6248377B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Abstract

PURPOSE:To reduce the surface recombination speed S without providing a charged film or an electrode to the surface of a wafer and facilitate noncontact measurement of the effective life time taueff by applying a light which produces pairs of electrons and positive holes in the neighborhood of the surface of the semiconductor. CONSTITUTION:While a bias light 4, which has energy higher than forbidden band width, is applied to one surface of a semiconductor wafer 1 by a light source B, a pulse light (measuring light) 5, which has energy higher than forbidden band width, is applied by a light source A. A microwave 3a is applied to another surface of the wafer 1 through a waveguide 2 and the effective life time taueff is measured from a recombination attenuation curve, obtained by a reflected signal 3b, of minority carriers excited in the semiconductor wafer 1. If the wavelength of the bias light is selected properly, the condition suitable for reducing the surface recombination speed S can be maintained.

Description

【発明の詳細な説明】 本発明は半導体ウェーハのライフタイムを測定する方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for measuring the lifetime of semiconductor wafers.

周知のヌnく、半導体に光等の′市、磁波やα線等の粒
子流を照射して外部エネルギーを注入すると亀子と正孔
の対が発生し2例えば半導体がN型である場合には正孔
が過剰少数キャリヤとなシ、そしてこの過剰少数キャリ
ヤが電子と再結合して次々と消滅してゆき、過剰少数キ
トリヤの濃度は指数関数的に減少する。過剰少数キャリ
ヤの濃度が1 / eに減少するまでの時間を半導体の
ライフタイムという。このライフタイムは半導体結晶中
の不純物原子、転位、格子欠陥等に著しく影響を受ける
ので、ライフタイムの値を測定することは半導体結晶の
品質評価の手法のひとつとして重要視されている。
It is a well-known fact that when external energy is injected into a semiconductor by irradiating it with light, etc. or a particle stream such as magnetic waves or alpha rays, pairs of electrons and holes are generated.2For example, if the semiconductor is N-type, The holes become excess minority carriers, and these excess minority carriers recombine with electrons and disappear one after another, and the concentration of excess minority carriers decreases exponentially. The time it takes for the concentration of excess minority carriers to decrease to 1/e is called the lifetime of a semiconductor. Since this lifetime is significantly affected by impurity atoms, dislocations, lattice defects, etc. in the semiconductor crystal, measuring the lifetime value is considered important as one of the methods for evaluating the quality of semiconductor crystals.

一般に半導体ウェーハのライフタイムを測定する場合、
実測される実効ラインタイムτeff は半導体結晶の
純度や結晶欠陥等で決まるバルク(結晶母体)のライフ
タイムτbだけでなく半導体装置−ハの汚れや表向加工
層等によって決まるライフタイム価成分τ5が関与する
もので。
Generally, when measuring the lifetime of semiconductor wafers,
The actually measured effective line time τeff is determined not only by the lifetime τb of the bulk (crystal matrix) determined by the purity of the semiconductor crystal and crystal defects, but also by the lifetime value component τ5 determined by the contamination of the semiconductor device, the surface processed layer, etc. In what is involved.

なる関係があり、τ5は半導体ウエーノ・の表面近傍で
起る表面再結合の速度Sに関係する。ウェー・・状の半
導体結晶のτeff を測定する場合、外部エイ、ルギ
ーを注入して励起させた過剰少数キャリヤの濃度が再結
合によって時間と共に減少してゆく状況を示す光導′眠
減衰曲線はτbとSの関数として現われ、Sの値が太き
いと励起させた過剰少数キャリヤが拡散して表面で再結
合する割合が多くなり、τeff  の値が小さくなる
ため極端な場合には測定不能と々る。
τ5 is related to the speed S of surface recombination occurring near the surface of the semiconductor wafer. When measuring τeff of a wave-shaped semiconductor crystal, the light guide decay curve, which shows the situation in which the concentration of excess minority carriers excited by injecting external rays and energy decreases over time due to recombination, is τb. appears as a function of S, and if the value of S is large, the ratio of excited excess minority carriers diffusing and recombining on the surface increases, and the value of τeff becomes small, making measurement impossible in extreme cases. Ru.

そこで、半導体ウェーハのτeff を測定するにあた
って9表面ρ+結合の速度Sを低減する必要がある。そ
のために、従来2半導体ウェーハの表面近傍で起る。′
電子と正孔の再結合を緩オlする手段として2例えば、
N型の半導体ウェーハに対してその表面に正の電荷膜を
つける処理を施し、P型の半導体ウェーハに対してその
表面に負の′電荷膜をつける処理を流し、半導体ウエー
ノ・の表面近傍にポテンシャル・バリヤーを形成するこ
とによって半導体ウェーハの表面再結合速度を減少させ
る方法がとられていた(宇佐美、神立、工藤、応用吻理
49(1980)1192−1197)。また、他の方
法として半導体ウェーハに電俊をつけて、電解液中で′
賊圧を印加することによって半導体ウェーハの表面近傍
にポテンシャル・バリヤーを形成する方法が提案されて
いる。しかし、電荷膜をつける方法では、半導体ウェー
ハの表面が汚染されるのでライフタイム測定後に洗浄す
る必吸があり、電極をつける方法では測定□試料ウェー
ハを再利用することができないという欠点があった。
Therefore, when measuring τeff of a semiconductor wafer, it is necessary to reduce the speed S of nine surface ρ+ bonds. For this reason, conventionally 2 occurrences occur near the surface of the semiconductor wafer. ′
As a means of slowing down the recombination of electrons and holes, for example,
N-type semiconductor wafers are treated with a positively charged film on their surfaces, and P-type semiconductor wafers are treated with a negatively charged film on their surfaces near the surface of the semiconductor wafer. A method has been used to reduce the surface recombination rate of semiconductor wafers by forming a potential barrier (Usami, Kandatsu, Kudo, Applied Chemistry 49 (1980) 1192-1197). Another method is to attach an electric bolt to a semiconductor wafer and immerse it in an electrolytic solution.
A method has been proposed in which a potential barrier is formed near the surface of a semiconductor wafer by applying pressure. However, with the method of attaching a charge film, the surface of the semiconductor wafer becomes contaminated and must be cleaned after lifetime measurement, and with the method of attaching an electrode, the measurement sample wafer cannot be reused. .

そこで本発明は、上記従来の方法の欠点に鑑み。Therefore, the present invention has been made in view of the drawbacks of the above-mentioned conventional methods.

シリコン等の半導体ウェーハのτeff を測定するに
あたって、ウェーハ表面に・電荷膜をつけたり。
When measuring τeff of semiconductor wafers such as silicon, a charge film is applied to the wafer surface.

電極をつけたりする直接的な加工を一切行わないでSを
低減する。非接触の半導体ウェーハのライフタイム1l
ii]定方法を提供することを目的とする。
S is reduced without any direct processing such as attaching electrodes. Non-contact semiconductor wafer lifetime 1l
ii] The purpose is to provide a fixed method.

+:発明(/cより提供される半導体ウェーハのライン
タイム測定方法は、半導体ウェーハに院止帝暢以上のエ
ネルギーをもつ光を照射し、励起した少数キャリヤの再
結合減衰曲線を検出して半導体ウェーハの実効う・rフ
タイムτeff  を測定する方法に於て、半導体ウェ
ーハの同−表面に、ふたつの光#、AおよびBからそれ
ぞれ光を照射し、光源Bから照射する爪によって半導体
ウェーハ・の表面近傍に電子と正孔の対を生成させなが
ら、光源Aから照射するパルス光によって励起した少数
キャリヤの再結合減衰曲線を検出してτeff  を測
定することからなる方法である。
+: Invention (/c) The semiconductor wafer line time measuring method provided by /c irradiates the semiconductor wafer with light having an energy higher than that of the semiconductor wafer, detects the recombination decay curve of the excited minority carriers, and measures the semiconductor wafer. In the method of measuring the effective time τeff of a wafer, the same surface of the semiconductor wafer is irradiated with light from two lights #, A and B, respectively, and the semiconductor wafer is This method consists of measuring τeff by detecting the recombination decay curve of minority carriers excited by pulsed light irradiated from light source A while generating pairs of electrons and holes near the surface.

本発明は、半導体の表面近傍に電子と正孔の対を生成き
せる光をL(C射することによってSを低減させること
ができるということに着目したものである。すなわち、
半導体の表面再結合速度は次の式で示される(A、 S
、 Grove著2丁ohn Wiley andS6
.n’s、 Inc、発行、  rPhysics a
nd Technologyof Sem1condu
ctor Devices J、  p、 139 )
The present invention focuses on the fact that S can be reduced by irradiating L(C) light that generates pairs of electrons and holes near the surface of a semiconductor. That is,
The surface recombination rate of a semiconductor is expressed by the following formula (A, S
, by Grove 2-chohn Wiley andS6
.. Published by n's, Inc., rPhysics a
nd Technology of Sem1condu
ctor Devices J, p. 139)
.

S=S  □ On5 +p5 + 2nl S:表面再結合速度 So二表面空間電荷領域のない場合の表1*1再結合速
度 ND:ドナー濃度 n 5 s表面電子濃度 p5:表面正孔濃度 niaイントリンシックキャリヤー濃度したがって、半
導体表面での電子濃度n、と正孔濃度p5を増加するこ
とが出来れば、Sの値は少さくなる。不発明の方法は、
光源Bから禁止帯幅よシ大きいエネルギーをもつiM当
なf皮長のバイアス光を測定中に半導体ウェーハ表面に
照射し続けることにより、該表面近傍におけるn、とp
、を増加させるのである。
S=S □ On5 +p5 + 2nl S: Surface recombination rate So2 Table 1 without surface space charge region *1 Recombination rate ND: Donor concentration n 5 s Surface electron concentration p5: Surface hole concentration nia intrinsic Carrier concentration Therefore, if the electron concentration n and hole concentration p5 at the semiconductor surface can be increased, the value of S will be reduced. The uninvented method is
By continuing to irradiate the semiconductor wafer surface with bias light having an energy larger than the forbidden band width and a skin length of f corresponding to iM from light source B, n and p in the vicinity of the surface are
, increases.

次に、実施例に即してさらに具体的に本発明を説明する
が2本発明の範囲をこれに限定するものではない。
Next, the present invention will be explained in more detail with reference to Examples, but the scope of the present invention is not limited thereto.

第1図は1本発明の方法を夾施するのに適し、たライフ
タイム測定装置の一例を示す模式1ン1である。
FIG. 1 is a schematic diagram showing an example of a lifetime measuring device suitable for applying the method of the present invention.

図の半導体ウェーハ1の一方の表面に光源Bから禁止帯
幅以上のエネルギーをもつバイアス光4を量体1しなが
ら、光1117人から禁止帯幅以上のエネルギーをもつ
パルス光(測定光)5を照射して、ウェーハ1の他の表
面に導波管2を:j!i、 してマイクロ波6aを送り
、その反射信号3bによって現出する半導体ウェー/・
1に励起した少数キャリヤの書結合減衰曲線からτef
f  を測定する。
While bias light 4 with energy greater than the forbidden band width is applied to one surface of the semiconductor wafer 1 shown in the figure from light source B, pulsed light (measuring light) 5 with energy greater than the forbidden band width is emitted from light 1117. irradiate waveguide 2 onto the other surface of wafer 1 by irradiating :j! i, the microwave 6a is sent, and the semiconductor wafer is exposed by the reflected signal 3b.
From the write coupling decay curve of minority carriers excited to 1, τef
Measure f.

バイアス元40波長が短い種半導体ウェーハ1に生成す
る1子と正孔濃度のウェーハ深さ方向の分布の最大位置
はウェーハの受光表面に近づく。
The maximum position of the distribution in the wafer depth direction of the single electron and hole concentration generated in the seed semiconductor wafer 1 with a short bias source 40 wavelength approaches the light-receiving surface of the wafer.

したがってバイアス光の波長をス]預当に選択すればn
5とp5の値を、Sを低減させるのに適当な状態に保つ
ことができる。
Therefore, if the wavelength of the bias light is selected as n
5 and p5 can be kept appropriate to reduce S.

第1(ン1に示す装置によって、比抵抗10Ω・工。A specific resistance of 10 Ω/min was obtained using the apparatus shown in 1.

厚さ5001tON型シリコンウエーハを試料として次
の(イ)および(ロ)のそれぞれの条件でτeff  
を測定した。
Using a 5001 tON type silicon wafer as a sample, τeff was calculated under each of the following conditions (a) and (b).
was measured.

(イ)バイアス光波長660nm(ウェーハの片面全面
に連続照射)3、 測定光波長940 nm 、パルス11m100μse
c (ウェーハの同一面にスポット照射)。
(a) Bias light wavelength 660 nm (continuous irradiation on the entire surface of one side of the wafer) 3, measurement light wavelength 940 nm, pulse 11 m 100 μse
c (spot irradiation on the same side of the wafer).

(ロ)バイアス光間を射せずに+ !:’J記四鰻の測
定光を照射。
(b) Don't let the bias light shine between the +! :' Irradiate the measuring light of the four eels in J.

その結果(イ)の場合に於てτeff−20μsec、
(ml)の場合に於てτeH=10μSeCの値を得た
。棟だ上記と同一シリコンウェーハの表面に正菟荷膜を
付ける処理を施して従来法によりτeff の値を測定
した結果τeff−22μsecの値を沓た。この値は
(イ)の場合の測定結果と良く一致し1本発明の信頼性
が裏づけられた。バイアス光を照射した結果τeff 
の値が大きくなったことはSが低減されていることを意
味している。
In the case of result (a), τeff-20μsec,
(ml), a value of τeH=10 μSeC was obtained. The same silicon wafer as above was subjected to a process of attaching a positive film to the surface and the value of τeff was measured by the conventional method, and the result was a value of τeff - 22 μsec. This value agreed well with the measurement results in case (a), and the reliability of the present invention was confirmed. Result of bias light irradiation τeff
An increase in the value of S means that S is reduced.

前記と同一シリコンウェーハについて、光導電減衰曲線
の指数関数的な変化からのずれをもとにSを算出する方
法(宇佐美、神立、工藤、応用物理49 (1980)
 1 ’192〜1197)によって、Sの値を求めた
結果、(イ)の場合に於てS=974 cnt/ se
c 、 i口)の場合に於てS = 22 D 7Cm
15ecを得た。バイアス光照射によりSの値が約1/
2に低減されている。
A method for calculating S based on the deviation from the exponential change in the photoconductivity decay curve for the same silicon wafer as above (Usami, Kandatsu, Kudo, Applied Physics 49 (1980)
As a result of calculating the value of S using
c, i), S = 22 D 7Cm
Obtained 15ec. Bias light irradiation reduces the value of S by about 1/
It has been reduced to 2.

本発明は以上のような方法であるから、半導体ウェーハ
の表面に′=y、1i;丁月つyをつけたり、箪イ蛎を
つける直接力0工なしに、非接触で8の値を低減するこ
とができるので便利であり、半導体ウェーノ・製造工程
のみならず、集積回路等の牛勇体デバイス製造工程に於
ける。非接触、インライン評1曲方法として効果のある
半導体ウエーノ・のライフタイム測定方法である。
Since the present invention uses the method described above, it is possible to reduce the value of 8 in a non-contact manner without applying direct force to the surface of the semiconductor wafer. It is convenient because it can be used not only in semiconductor wafer manufacturing processes, but also in semiconductor device manufacturing processes such as integrated circuits. This is a method for measuring the lifetime of semiconductor wafers that is effective as a non-contact, in-line evaluation method.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は2本発明の方法を実軸するのに適したライフタ
イム測、定装rfの一例を示す模式図である。
FIG. 1 is a schematic diagram showing an example of lifetime measurement and fixed RF suitable for implementing the method of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 半導体ウェーハに禁止帯幅以上のエネルギーをもつ光を
照射し、励起した少数キャリヤの再結合減衰曲線を検出
して半導体ウェーハの実効ライフタイムτeff を測
定する方法に於て、半導体ウェーハの同−表面に、ふた
つの光源AおよびBがらそれぞれ光を照射し、光源Bか
ら照射する九Vζよって半導体ウェーハの表面近傍に−
m子と正孔の対を生成させながら、光源Aから照射する
パルス光によって励起した少数キャリヤの再結合減衰曲
線を検出してτeff を測定することからなる半導体
ウェーハのライフタイム測定方法。
In the method of measuring the effective lifetime τeff of a semiconductor wafer by irradiating the semiconductor wafer with light having energy exceeding the forbidden band width and detecting the recombination decay curve of the excited minority carriers, Then, two light sources A and B each emit light, and the 9Vζ emitted from light source B causes - to near the surface of the semiconductor wafer.
A method for measuring the lifetime of a semiconductor wafer, which comprises measuring τeff by detecting a recombination decay curve of minority carriers excited by pulsed light irradiated from a light source A while generating pairs of m-sons and holes.
JP5391883A 1983-03-31 1983-03-31 Life time measurement of semiconductor wafer Granted JPS59181549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5391883A JPS59181549A (en) 1983-03-31 1983-03-31 Life time measurement of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5391883A JPS59181549A (en) 1983-03-31 1983-03-31 Life time measurement of semiconductor wafer

Publications (2)

Publication Number Publication Date
JPS59181549A true JPS59181549A (en) 1984-10-16
JPS6248377B2 JPS6248377B2 (en) 1987-10-13

Family

ID=12956087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5391883A Granted JPS59181549A (en) 1983-03-31 1983-03-31 Life time measurement of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS59181549A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418234A (en) * 1987-07-14 1989-01-23 Agency Ind Science Techn Semiconductor evaluation device
JPS6437843A (en) * 1987-08-03 1989-02-08 Kyushu Electron Metal Method and device for measuring lifetime of semiconductor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418234A (en) * 1987-07-14 1989-01-23 Agency Ind Science Techn Semiconductor evaluation device
JPS6437843A (en) * 1987-08-03 1989-02-08 Kyushu Electron Metal Method and device for measuring lifetime of semiconductor
JPH0573344B2 (en) * 1987-08-03 1993-10-14 Kyushu Denshi Kinzoku Kk

Also Published As

Publication number Publication date
JPS6248377B2 (en) 1987-10-13

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