JPS59180637A - Computer for control - Google Patents
Computer for controlInfo
- Publication number
- JPS59180637A JPS59180637A JP58055453A JP5545383A JPS59180637A JP S59180637 A JPS59180637 A JP S59180637A JP 58055453 A JP58055453 A JP 58055453A JP 5545383 A JP5545383 A JP 5545383A JP S59180637 A JPS59180637 A JP S59180637A
- Authority
- JP
- Japan
- Prior art keywords
- diagnosis
- self
- circuit
- processing
- idle time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
Abstract
Description
【発明の詳細な説明】
本発明は、自己診断回路を付加した制御用コンピュータ
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control computer equipped with a self-diagnosis circuit.
従来、この柚の制御用コンピュータは、診断のために、
その都度、診断用プログラムを入力して診断を行うもの
5手動によるボタン操作にょシ診障1プログラムを起動
し診断を行うもの及び電源ON時に診断プログラムを起
動し診断を行うものが一般的でめった。Conventionally, this Yuzu control computer was used for diagnosis.
Diagnosis is performed by inputting a diagnostic program each time 5. Diagnosis is performed by manual button operation Diagnosis 1. Diagnosis is performed by starting a program and diagnosis is performed by starting a diagnostic program when the power is turned on. .
この様な方法では、診断を行うのに、診断用プログラム
の入力操作、手動によるボタン操作、電源のオン・オフ
操作吟が心太となるため、診断を実行するたびにシステ
ムの動作を一時停止しなければならないという欠点があ
った。With this type of method, diagnosing requires entering the diagnostic program, manually operating buttons, and turning the power on and off, so system operation must be paused each time a diagnosis is executed. There was a drawback that it had to be done.
本発明は、上記の欠点を除去し、処理時間の空き時間を
利用し、自己診断を行うことによシ、システムの動作を
停止させることなく自己診断が可能な制御用コンピュー
タを提供するものである。The present invention eliminates the above-mentioned drawbacks and provides a control computer that is capable of self-diagnosis without stopping system operation by performing self-diagnosis using idle time during processing. be.
本発明は、リアルタイム制御を行う、制御用コンピュー
タにおいて自己診断回路を付加し、処理時間の空き時間
を利用し、コンピュータの自己診断を行うことによシ、
システムの動作を停止させることなく自己診断が可能な
制御用コンピュータである。The present invention adds a self-diagnosis circuit to a control computer that performs real-time control, and uses free processing time to perform self-diagnosis of the computer.
This is a control computer that can perform self-diagnosis without stopping system operation.
次に本発明の一実施例を図面を#畷して説明する。Next, one embodiment of the present invention will be described with reference to the drawings.
第1図は、本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
本ブロック図において、lは、プログラム及びデータを
記憶する記憶部、2は、あらゆる演算の制御を行なう中
央処理部、3は、外部機器5とデータの入出力を行う入
出力制御部、4は、記憶部1、中央処理部2及び入出力
制御部3の自己診断を行う自己診断回路、6は、自己診
断開始信号、7は、診断信号、8は、自己診断の結果が
異常となった場合に発生する異常信号、9は入出カデー
タ、10はメモリバス、11[I10バスである。また
、第2図は、一般的な制御用コンビーータの処理周期を
示す図である。In this block diagram, l is a storage unit that stores programs and data, 2 is a central processing unit that controls all calculations, 3 is an input/output control unit that inputs and outputs data to and from an external device 5, and 4 is a storage unit that stores programs and data. , a self-diagnosis circuit that performs self-diagnosis of the storage unit 1, the central processing unit 2, and the input/output control unit 3, 6 is a self-diagnosis start signal, 7 is a diagnostic signal, and 8 is a self-diagnosis result that is abnormal. 9 is the input/output data, 10 is the memory bus, and 11 is the I10 bus. Further, FIG. 2 is a diagram showing a processing cycle of a general control conbeater.
リアルタイム制御を行う制御用コンピュータは、一般に
、数十ミリ七カ/ドから数百ミリセカンドの処理周期−
(第2図1゛)を持ち、その中で入力処理、演算処理、
出力処理、割込処理等を行うが、その中に空き時間が存
在するのが普通である。Control computers that perform real-time control generally have a processing cycle of several tens of milliseconds to several hundred milliseconds.
(Fig. 2 1゛), in which input processing, arithmetic processing,
Output processing, interrupt processing, etc. are performed, but there is usually some idle time during these processes.
(第2図参照)この空き時間を利用し、中央処理部2が
自己診断開始信号6を自己診断回路4に出力し、自己診
断回路4が動作して、診断信号7によシ、記憶部11中
央処理部2、及び入出力制御部3の診断を行ない、もし
異常が発生したならば異常信号8を発生する仕組みであ
る。なお、この異常信号により、管外を発したシ、もし
多重系のシステムであれば、他系へ自動的に切り替える
ことも可能である。(See Figure 2) Utilizing this free time, the central processing unit 2 outputs the self-diagnosis start signal 6 to the self-diagnosis circuit 4, the self-diagnosis circuit 4 operates, and the memory unit 11, the central processing section 2 and the input/output control section 3 are diagnosed, and if an abnormality occurs, an abnormality signal 8 is generated. In addition, if the system is a multi-system, it is possible to automatically switch to another system by this abnormal signal.
以上本発明によれは1.制御用コンピュータに、自己診
断回路を付加し、処理周期の空き時間を利用して自己診
断を行うことにより、システムの動作を停止させること
なく自己診断ができるという効果がある。また数十から
数百ミリセカンドという非常に短い周期で、自己診断か
く)返し行なわれるため、異常の早期発見がでさるとい
う効果がある。According to the present invention, 1. By adding a self-diagnosis circuit to the control computer and performing self-diagnosis using idle time in the processing cycle, there is an effect that self-diagnosis can be performed without stopping the operation of the system. Furthermore, since self-diagnosis is repeated at very short intervals of several tens to hundreds of milliseconds, it is effective in detecting abnormalities early.
第1図は、本発明の一笑施例金示すブロック図、第2図
は、一般的な、制御用コンピー−iの処理周期を示す図
である。
1・・・・・・記憶部、2・・・・・・中央処理部、3
・・・・・・入出力制御部、4・・・・・・自己診断回
路、5・・・・・・外部機器、6・・・・・・自己診断
開始信号、7・・・・・・診断信号、8・・・・・・異
常信号、9・・・・・・入出力データ、10・・・・・
・メモリバス、11・・・・・・l/υバス。FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the processing cycle of a general control computer-i. 1...Storage unit, 2...Central processing unit, 3
...Input/output control unit, 4...Self-diagnosis circuit, 5...External equipment, 6...Self-diagnosis start signal, 7...・Diagnostic signal, 8... Abnormal signal, 9... Input/output data, 10...
・Memory bus, 11...l/υ bus.
Claims (1)
断回路を付加し、処理時間の空き時間を利用して、コン
ピュータの自己診断を行うことを特徴とする制御用コン
ピュータ。A control computer that performs real-time control, has a self-diagnosis circuit added to the control computer, and performs self-diagnosis of the computer using idle time during processing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58055453A JPS59180637A (en) | 1983-03-31 | 1983-03-31 | Computer for control |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58055453A JPS59180637A (en) | 1983-03-31 | 1983-03-31 | Computer for control |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59180637A true JPS59180637A (en) | 1984-10-13 |
Family
ID=12999020
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58055453A Pending JPS59180637A (en) | 1983-03-31 | 1983-03-31 | Computer for control |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59180637A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63156251A (en) * | 1986-12-19 | 1988-06-29 | Fujitsu Ltd | Diagnosing method for check circuit |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49122243A (en) * | 1973-03-22 | 1974-11-22 | ||
JPS50159634A (en) * | 1974-06-13 | 1975-12-24 | ||
JPS51134541A (en) * | 1975-05-19 | 1976-11-22 | Hitachi Ltd | Self-diagnostic system of data processing equipment |
JPS5329043A (en) * | 1976-08-31 | 1978-03-17 | Hitachi Ltd | Trouble detector of computer |
-
1983
- 1983-03-31 JP JP58055453A patent/JPS59180637A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49122243A (en) * | 1973-03-22 | 1974-11-22 | ||
JPS50159634A (en) * | 1974-06-13 | 1975-12-24 | ||
JPS51134541A (en) * | 1975-05-19 | 1976-11-22 | Hitachi Ltd | Self-diagnostic system of data processing equipment |
JPS5329043A (en) * | 1976-08-31 | 1978-03-17 | Hitachi Ltd | Trouble detector of computer |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63156251A (en) * | 1986-12-19 | 1988-06-29 | Fujitsu Ltd | Diagnosing method for check circuit |
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