JPS61813A - Deciding system for faulty area of sequence controller - Google Patents

Deciding system for faulty area of sequence controller

Info

Publication number
JPS61813A
JPS61813A JP59121588A JP12158884A JPS61813A JP S61813 A JPS61813 A JP S61813A JP 59121588 A JP59121588 A JP 59121588A JP 12158884 A JP12158884 A JP 12158884A JP S61813 A JPS61813 A JP S61813A
Authority
JP
Japan
Prior art keywords
detector
signal
correspondence
controlled object
fault
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59121588A
Other languages
Japanese (ja)
Inventor
Ryoichi Hamada
浜田 良一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP59121588A priority Critical patent/JPS61813A/en
Publication of JPS61813A publication Critical patent/JPS61813A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/058Safety, monitoring

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To attain a highly general-purpose system for decision of a faulty area with low cost by collating the correspondence between an action signal and a state detecting signal with the stored data for each controlled system when a fault is produced for decision of the fault. CONSTITUTION:The correspondence of variation between the action signal of a controlled system 2 and the state detecting signal of a detector 3 is first stored in a memory 6 in a normal action mode. Then the generation of a fault is first monitored when an automatic continuous operation is started. This operation is discontinued in case a cycle time-over state is produced owing to some fault. Then the correspondence between the action signal and the state detecting signal is checked for each controlled system 2 and then collated with the stored data. When a correspondence having no coincidence with the stored data is detected, it is decided that a fault occurs to the combination between the controlled system 2 and the detector 3. This decision is displayed at a display device 4.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は産業用機器に用いるシーケンス制御装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a sequence control device used in industrial equipment.

(ロ)従来技術 シーケンス制御を行う機器において、異常発生時に問題
個所を自動判定きせる試みは従来から行なわれており、
その例を特開昭53−60466号公報あるいは特開昭
54−140072号公報に見ることができる。特開昭
53−60466号公報に記載された方式はいわゆるウ
ォッチドッグタイマーの利用例であって、シーケンスの
ステップ毎の所要時間をタイマーで引視し、設定時間を
オーバーした場合にはそのシーケンスステップに問題が
生じたものと判定する。しかしながらこれにより特定で
きるのは基本的にはシーケンスステップのみであり、問
題個所を探るためには更に、そのステップに関与してい
る制御対象が何でおるかを対照しなければならない。従
って対照表の作成及びこれとの対比という作業が付加さ
れる。対照表を電子メモリーに記憶させておき、問題の
シーケンスステップ及び関連の制御対象を自動的に表示
さゼることも可能であるが、これとてメモリーへのイン
プットの手間を省くことはできない。特開昭54−14
0072号公報に記載された方式はこれとは異なり、各
シーケンスステップの遂行前に、その遂行を可能ならし
める条件が整っているかどうかをチェックする。
(b) Conventional technology In equipment that performs sequence control, attempts have been made to automatically determine the problem location when an abnormality occurs.
Examples thereof can be found in Japanese Patent Application Laid-open No. 53-60466 or Japanese Patent Application Laid-Open No. 54-140072. The method described in Japanese Unexamined Patent Publication No. 53-60466 is an example of the use of a so-called watchdog timer, in which the time required for each step of a sequence is monitored by a timer, and if the set time is exceeded, that sequence step is It is determined that a problem has occurred. However, basically only sequence steps can be identified by this method, and in order to find the problem location, it is necessary to further compare the control objects involved in that step. Therefore, the work of creating a comparison table and comparing it with this table is added. Although it is possible to store a comparison table in electronic memory and automatically display the sequence steps in question and the associated control objects, this does not eliminate the effort of inputting them into memory. Japanese Unexamined Patent Publication 1973-14
The method described in the No. 0072 publication is different from this, in that before each sequence step is executed, it is checked whether the conditions that make the execution possible are in place.

従って異常があれば直ちに、しかも高い精度をもって検
出できるが、シーケンスステップに見合うだけの故障検
出用プログラムの作成と、それを記憶させるメモリーの
装備に多大のコストを要するという難点がある。
Therefore, if there is an abnormality, it can be detected immediately and with high accuracy, but there is a drawback that it requires a great deal of cost to create a failure detection program that is commensurate with the number of sequence steps and to equip a memory to store it.

(ハ) 発明の目的 本発明は比較的低コストで準備でき、しかも汎用性の高
い故障個所判定方式を提供することを目的とする。
(c) Purpose of the Invention It is an object of the present invention to provide a failure location determination method that can be prepared at a relatively low cost and is highly versatile.

(ニ)発明の構成 制御対象の状態が変化すると、その動作を監視している
検知器が発する状態検知信号も変化する。本発明では単
一の制御対象に動作信号を与えた場合(又はOFFにし
た場合〉それに伴なって状態検知信号の変化した検知器
があれば、その制御対象と検知器は関連づけられている
ものとみなし、動作信号と状態検知信号との変化の対応
関係を記憶装置に書き込む。そして異常発生時には各制
御対象につき動作信号と状態検知信号との対応関係を記
憶データと対照し、データと合致しないことが発見され
たものにつき、制御対象又は検知器に故障ありと判定す
る。
(d) Configuration of the Invention When the state of the controlled object changes, the state detection signal issued by the detector monitoring its operation also changes. In the present invention, when an operation signal is given to a single controlled object (or when it is turned OFF), if there is a detector whose status detection signal changes accordingly, that controlled object and the detector are associated. The correspondence between the changes in the operating signal and the state detection signal is written into the storage device.Then, when an abnormality occurs, the correspondence between the operating signal and the state detection signal for each controlled object is compared with the stored data, and if it does not match the data. If this is discovered, it is determined that there is a failure in the controlled object or the detector.

(ホ) 実施例 第1図において、(1)はシーケンス遂行指令を発する
操作指令手段であり、スイッチやキーボードにより構成
きれる。(2)はモータ、ソレノイド、エアシリンダ等
の制御対象である。(3)は制御対象(2)の動作を監
視する検知器、(4)は各種指令や動作状態を表示する
表示装置である。(5〉は操作指令手段(1)からのシ
ーケンス遂行指令及び検知器(3)からの状態検知信号
を演算処理して制御対象(2〉に動作信号を出力する演
算処理装置である。演算処理装置く5)には記憶装置(
6)が付属する。(7)(8)は操作指令手段(1)及
び検知器(3)と演算処理装置(5)とのインターフェ
ースとなる入力装置、(9)(10)は制御対象(2)
及び表示装置(4)と演算処理装置(5)とのインター
フェースとなる出力装置である。
(E) Embodiment In FIG. 1, (1) is an operation command means for issuing a sequence execution command, which can be constituted by a switch or a keyboard. (2) is a controlled object such as a motor, solenoid, or air cylinder. (3) is a detector that monitors the operation of the controlled object (2), and (4) is a display device that displays various commands and operating states. (5> is an arithmetic processing device that arithmetic processes the sequence execution command from the operation command means (1) and the state detection signal from the detector (3) and outputs an operation signal to the controlled object (2>).Arithmetic processing Device 5) includes a storage device (
6) is included. (7) and (8) are input devices that serve as an interface between the operation command means (1), the detector (3), and the arithmetic processing unit (5), and (9) and (10) are the controlled objects (2).
and an output device that serves as an interface between the display device (4) and the arithmetic processing device (5).

次に本装置による故障個所判定方式の仕組につき説明す
る。まず制御対象(2)の個々のものにつき、その制御
対象のみを動作許せるような信号を与える。このような
信号は操作指令手段(1〉から型動指令を与えることに
より発生する。これにより制御対象(2)が動作すると
、関連する検知器(3)の状態検知信号が変化する。第
2図の例においては、1個の制御対象(2)に対しリミ
ットスイッチAとリミットスイッチBが配置されており
、制御対象(2)への動作信号がONになると、少しの
時間遅れをもってリミットスイッチAの状態検知信号が
OFF、リミットスイッチBの状態検知信号がONにな
る。動作信号がOFFになると状態検知信号の0N−O
F量関係逆転する。このようにして正常動作時における
動作信号と状態検知信号との変化の対応関係を記憶装置
(6)に記憶きせる。すべての制御対象(2)につきこ
の作業を行う。さて、連続自動運転を開始した時には、
まず故障の発生を監視する体制をとる。これは例えばウ
ォッチドッグタイマーを設けること位より達成できるが
、この場合側々のシーケンスステップをチェックする必
要はなく、シーケンス全体のサイクルタイムを監視する
たりで良い。何らかの異常発生によりサイクルタイムオ
ーバーになった場合には運転を中止し、個々の制御対象
(2)について動作信号と状態検知信号との対応関係を
チェックし、記憶させてあったデ〜りと対照して行く。
Next, the mechanism of the fault location determination method using this device will be explained. First, for each of the controlled objects (2), a signal is given that allows only that controlled object to operate. Such a signal is generated by giving a mold movement command from the operation command means (1). When the controlled object (2) operates thereby, the state detection signal of the related detector (3) changes. In the example shown in the figure, limit switch A and limit switch B are arranged for one controlled object (2), and when the operation signal to controlled object (2) is turned ON, the limit switch is switched on after a short time delay. The state detection signal of A is OFF, and the state detection signal of limit switch B is ON.When the operation signal is OFF, the state detection signal is 0N-O.
The F amount relationship is reversed. In this way, the correspondence relationship between changes in the operating signal and the state detection signal during normal operation is stored in the storage device (6). Perform this work for all controlled objects (2). Now, when continuous automatic operation starts,
First, establish a system to monitor the occurrence of failures. This can be achieved, for example, by providing a watchdog timer, which does not need to check side sequence steps, but rather monitors the cycle time of the entire sequence. If the cycle time is over due to some kind of abnormality, stop the operation, check the correspondence between the operation signal and the state detection signal for each controlled object (2), and compare it with the stored data. Go.

その結果、記憶データと合致しない対応関係が発見きれ
た時にはその制御対象(2)と検知器(3)の組合わゼ
に故障が発生したものと判定し、その旨を表示装置t(
4>に表示する。
As a result, when a correspondence relationship that does not match the stored data is found, it is determined that a failure has occurred in the combination of the controlled object (2) and the detector (3), and a display device t(
4>.

(へ〉 発明の効果 本発明は、個々の制御対象につき動作信号と状態検知信
号の変化の対応関係をデータとして記憶さけることをも
って故障個所判定方式のための準備とする。従ってシー
ケンスがいかに長かろうと、制御対象の数だけの記憶装
置を済ませればそれで準備OKということになり、手間
も記憶装置の容量も節約できる。また機器の種類別に故
障個所判定プログラムを作成する必要もない。このよう
に本発明によれば、故障個所を直ちに特定できる判定方
式を比較的低コストで提供できる。
(F) Effects of the Invention The present invention prepares for a failure location determination method by storing the correspondence between changes in operating signals and state detection signals for each controlled object as data. No matter how many devices you use, you can prepare as many storage devices as you want to control, which saves time and storage space.Also, there is no need to create failure location determination programs for each type of device. According to the present invention, a determination method that can immediately identify a failure location can be provided at a relatively low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す構成図、第2図は動作
信号と状態検知信号の関遼の一例を示す説明図である。 <2)  制御対象、〈3)・検知器 (1)  操作
指令手段、(5)・・・演算処理装置、(6)・・記憶
装置。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing an example of the relationship between an operation signal and a state detection signal. <2) Controlled object, <3) Detector (1) Operation command means, (5) Arithmetic processing unit, (6) Storage device.

Claims (1)

【特許請求の範囲】 1)制御対象と、前記制御対象の動作状態を検知する検
知器と、シーケンス遂行指令を発する操作指令手段と、
前記シーケンス遂行指令及び前記検知器からの状態検知
信号を演算処理して前記制御対象に動作信号を出力する
演算処理装置とを備えたものにおいて、 前記制御対象の正常動作時における、この制御対象への
動作信号と検知器からの状態検知信号との対応データを
記憶装置に記憶させ、異常時にはその時発されている動
作信号と検知器からの状態検知信号との対応関係を前記
記憶させたデータと対照し、その合致・非合致をもって
故障個所を判定することを特徴とするシーケンス制御装
置の故障個所判定方式。
[Scope of Claims] 1) A controlled object, a detector that detects the operating state of the controlled object, and an operation command means that issues a sequence execution command;
and an arithmetic processing device that arithmetic processes the sequence execution command and the state detection signal from the detector and outputs an operation signal to the controlled object, when the controlled object is in normal operation. Correspondence data between the operation signal and the state detection signal from the detector is stored in a storage device, and when an abnormality occurs, the correspondence relationship between the operation signal issued at that time and the state detection signal from the detector is stored in the stored data. A failure location determination method for a sequence control device, characterized in that a failure location is determined based on whether the comparison matches or does not match.
JP59121588A 1984-06-13 1984-06-13 Deciding system for faulty area of sequence controller Pending JPS61813A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59121588A JPS61813A (en) 1984-06-13 1984-06-13 Deciding system for faulty area of sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59121588A JPS61813A (en) 1984-06-13 1984-06-13 Deciding system for faulty area of sequence controller

Publications (1)

Publication Number Publication Date
JPS61813A true JPS61813A (en) 1986-01-06

Family

ID=14814957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59121588A Pending JPS61813A (en) 1984-06-13 1984-06-13 Deciding system for faulty area of sequence controller

Country Status (1)

Country Link
JP (1) JPS61813A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63223808A (en) * 1987-03-12 1988-09-19 Hitachi Ltd Trouble diagnosing device
US4863251A (en) * 1987-03-13 1989-09-05 Xerox Corporation Double gauss lens for a raster input scanner
JPH01248206A (en) * 1988-03-30 1989-10-03 Toshiba Corp Programmable controller
JPH02273805A (en) * 1989-04-14 1990-11-08 Sharp Corp Fault diagnostic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63223808A (en) * 1987-03-12 1988-09-19 Hitachi Ltd Trouble diagnosing device
US4863251A (en) * 1987-03-13 1989-09-05 Xerox Corporation Double gauss lens for a raster input scanner
JPH01248206A (en) * 1988-03-30 1989-10-03 Toshiba Corp Programmable controller
JPH02273805A (en) * 1989-04-14 1990-11-08 Sharp Corp Fault diagnostic device

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