JP3374399B2 - Skip input device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a step-type sequence program capable of performing a skip operation. 2. Description of the Related Art Generally, a step-type sequence program is composed of a program divided into a plurality of steps. Each step sends an operation command signal to the operation terminal assigned to each step. The operation terminal operates according to the signal of the operation command. The detector detects the operation amount or process of the operation end, and sends a completion condition signal to the step when the operation end considers that the operation to be performed is completed. The step that receives the completion condition signal completes the step and proceeds to the next step. If the signal of the completion condition is not sent from the detector even after a certain time has passed since the step sent the signal of the operation command, it is considered that some trouble has occurred, the signal of the operation command is stopped, and the CRT is stopped. The fact that a problem has occurred and the step are displayed on an output device such as a screen to notify the operator. The operator investigates where the failure occurred, the cause,
Restart operation. The operator has to restart the operation
Operate the operation terminal manually to set the completion condition signal to be sent. However, depending on the malfunction, there is a possibility that the signal of the completion condition is not sent regardless of the operation. In such a case, it is necessary to forcibly skip the step and execute the next step according to the judgment of the operator. In order to perform the skip, it is necessary to find a necessary wiring from among the wirings to which the signal of the completion condition is sent and input the signal of the completion condition to this. In this structure, in order to complete a step, it is necessary to correct a defect or to input a signal of a completion condition for forcibly skipping the step. However, forcibly inputting the signal of the completion condition to skip the step has the following problems. 1. Generally, the input device for controlling the sequence program and the place where the signal of the completion condition are forcibly input are located at distant positions, and the operation does not proceed smoothly. [0004] 2. It is necessary to find a necessary wiring from a plurality of wirings, and an operation error easily occurs. [0005] 3. You have to consider when to remove the forced input signal. [0008] The cause of the necessity of skipping the steps is as follows. [0007] 1. The operation end itself is operating properly according to the signal of the operation command of the step, but due to the failure of the detector, etc.,
When the completion condition signal does not enter the step. [0008] 2. When the operation end itself does not operate properly, but does not cause a serious obstacle to the overall operation. 3. To execute the target step early in a simulation test or the like. [0010] It is an object of the present invention to surely complete a target step by a simple operation even if a step is not completed in normal operation, and to proceed to the next step. A feature of the present invention resides in that a skip input device for skipping only steps during execution of a step-type sequence program is provided. In the skip input device, when there is an input, the CPU
It is characterized in that it is output only during one operation cycle of. With this output, only the step being executed can be skipped. The steps can be reliably advanced by a simple operation, and the operation can be performed smoothly. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 best illustrates the features of the present invention. 9 shows an operation according to a sequence program when a skip input device is provided. Control program 2
Executed by CPU. The operating end 3 assigned according to the signal from the control program 2 operates, the operation amount or the process 4 is detected by the detector 5, and when the state satisfies the completion condition of the control program 2, A signal is sent to the control program 2, and the control program 2 is completed. Even when no signal is sent from the detector 5 to the control program 2, if a signal is sent from the skip input device 1, the control program 2 is completed. FIG. 3 is a detailed view of the skip input device.
When the operator closes the switch 7, the signal generator 8
, An electric signal is sent, and a signal is sent by the signal output 9 for one operation time only during one operation period of the CPU.
The control unit 12 checks which step is being executed in which step 10 and sends a signal to the control unit 11 to skip to that step to complete the step and execute the next step. FIG. 4 shows a portion surrounded by a third dotted line by logic. X13 is a signal from the signal generator 8, Y16 is a signal from the controller 12 indicating whether each step is being executed, Z18 is a signal of 11 to be skipped, and Y16 and Z18 are signals from the same step to the skip input device. By inputting / outputting the step, the step being executed can be skipped. 14 is a special operator that outputs the digital input signal as it is, 15 is a logical product operator with one of two inputs having logical negation, and 17 is a logical product operator. The signal output 9 for only one operation time in FIG.
4 and 15 correspond to step 10 in FIG. 3 and 11 to be skipped correspond to 17 in FIG. 14, 15, 1
7 is in the order of 15, 14, and 17. The time chart of FIG. 4 is shown in FIG. 5, and the flowchart is shown in FIG. X13 is 0
When the state changes from 1 to 1, the output of 15 becomes 1 and the output of 14 becomes 1, but in the next operation, the output of 15 becomes 0 and 14
Is 1. When X13 changes from the state of 1 to 0, the output of 15 becomes 0, the output of 14 becomes 0, and remains as it is. That is, when X13 changes from 0 to 1, 1
The output of 15 becomes 1 only during the operation cycle, but is 0 otherwise.
It becomes. 15 is 1, the signal of Y16 is 1, that is, the signal of Z18 is 1 when the step is being executed.
And a skip signal is sent to that step. Y16
Is 0, that is, when the step is not being executed, Z1
The signal of 8 is always 0. FIG. 7 shows the logic of the steps including the present invention. In order to add the skip command to the logic diagram of the conventional step, operators 14, 15, 17, and 28 are added. Hereinafter, the logic of FIG. 7 will be described. The previous step completion 19 becomes 1 when the previous step has already been completed, and becomes 0 when it is being executed or has not been executed.
In the first step, 0 is changed to 1 when the sequence program is executed. Previous step completion 19 signal is 1
At this time, any one signal of the step operation command 29, the step congestion 30, and the step completion 31 on the output side becomes 1. The step operation command 29 is a command for operating the operation terminal 3 assigned to each step. The step completion condition 20 is detected by the operation amount of the operation end 3 receiving the signal of the skip operation command 29 or by the process detector 5, and the input signal becomes 1 when the state satisfies the step completion condition. When the signal of the step completion condition 20 becomes 1, the signal of the step operation command 29 and the signal of the step congestion 30 become 0, and the signal of the step completion 31 becomes 1.
The signal of the step completion 31 is the same as the signal of the completion of the step before the next step, and the next step is started simultaneously with the completion of the step. The signal of the step congestion 30 is such that the signal of the step completion condition 20 becomes 1 within a predetermined time after the signal of the step operation command 29 becomes 1.
When it does not become 1, it becomes 1. At this time, the signal of the step operation command 29 becomes 1. The step congestion 30 is provided to temporarily suspend the execution of the program on the assumption that some trouble has occurred since the processing is not completed within a predetermined time. When the signal of the skip command 21 is 1, that is, when the operator closes the skip switch 7 and the signal of the signal generator 8 is 1, the OR operation 28 causes the step operation command 29 or the signal of the step congestion 30 to be 1 In the same way that the signal of the step completion condition 20 becomes 1 for the step of, the signal of the step completion 31 of that step becomes 1. Since the skip command signal 21 becomes 1 only during one operation cycle of the CPU by the operators 14 and 15, the skip input switch 7
Even if is kept closed, it is possible to complete only the step being executed and execute the next step. If the operation end 3 operated by the sequence program, the operation amount thereof, and the detector 5 for detecting the process have some trouble and the step is not completed in the normal operation, or it is desired to proceed to the target step in a simulation test or the like. In this case, the signal generated by the signal generator 8 by closing the switch 7 of the skip input device is taken in as the signal of the skip command 21 in all the steps 32. Signal is 1 or the signal of step congestion 30 acts on only one step, and that step can be completed and proceed to the next step. Therefore, only the step being executed can be completed with a very simple operation, and the process can proceed to the next step, so that a smooth operation can be performed. As described in detail above, according to the present invention,
The steps can be surely advanced by a simple operation, and smooth operation can be performed.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a system including the present invention. FIG. 2 is a block diagram of a conventional system. FIG. 3 is a logic diagram of a skip input device. FIG. 4 is a logic diagram for outputting only one operation cycle and skipping only the step being executed; FIG. 5 is a time chart of FIG. 4; FIG. 6 is a flowchart of FIG. 4; FIG. 7 is a logic diagram of the steps involving the present invention. FIG. 8 is a logic diagram of a conventional step. [Description of Signs] 7: Switch of skip input device, 13: Signal generator 8
, A special operator that outputs a digital signal as it is, a logical AND operator with one of two inputs having a logical negation, a signal indicating whether a step is being executed from the control device, AND operator, 18 ... 11 signals to be skipped, 22 ... OR operator, 26 ... On delay timer, 28 ... Set priority flip-flop.

Claims (1)

(1) In a skip input device for skipping a step being executed and executing the next step when a step-type sequence program is executed, a skip operation signal is generated. a signal generating means comprises an identification means for identifying the step in execution among multiple steps, the output means for outputting the skip signal only step in the execution, the signal generating means step
Operation of the control unit that performs arithmetic processing on the step-type sequence program
A skip input device for generating a signal for only one cycle of the cycle .