JPS59175744A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To remove leakage currents between an epitaxial layer and an oxide layer by forming the thick field oxide film, an internal end surface thereof is vertical, to the peripheral section of an conduction type semiconductor substrate containing a high concentration impurity, forming a layer containing the impurity in the same high concentration as the substrate to the vertical end surface and growing the layer of the same conduction type as the substrate in low concentration onto the substrate surrounded by said layer in an epitaxial manner while the impurity is diffused from the end surface to form a thin isolation region around the epitaxial layer. CONSTITUTION:A thick field oxide film 12 is formed on a P<+> type Si substrate 11, the film 12, an internal end surface thereof is vertical, is left through anisotropic etching, and an opening 13 generated is used as an epitaxial growth region. The whole surface containing the opening 13 is coated with a P<+> type polycrystalline Si layer 16, and the layer 16 is left only on the wall surface of the opening 13 through anisotropic etching in the same manner. A P type layer 15 is grown in the opening 13 in an epitaxial manner while a P type impurity is diffused to the periphery of the layer 15 from the layer 16, and a thin P<+> type layer 14 as a channel stopper is formed fast stuck to the layer 16.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to an isolation structure between elements in a semiconductor device and a method for forming the same.

(b) Technical background MIS (Metal In5ulator Sem)
In conventional selective oxidation (LOCO8) type semiconductor ICs, the conventional selective oxidation (LOCO8) structure suffers from isolation due to the oxidation film, which cannot be defined by the phosphorography technique called bird's peak, burrows into the bottom of the oxidation-resistant mask film. Since the width of the area becomes wide, it is not suitable for high-density and high-integration of the IC.

Therefore, the first method proposed as a method for forming an isolation region between elements, whose dimensions can be defined by ring-2-fi technology and is suitable for high-density and high-integration, is photolithography, which uses an anisotropic dry etching method on the semiconductor substrate surface. A groove having nearly vertical sides is formed using a technique, an insulating film is formed on the substrate to sufficiently fill the groove using a sputtering technique, and a mechanical method or a sputter etching method is used. This is a method in which the insulating film is removed to the surface of the semiconductor substrate using a surface polishing technique, and an insulating film for separating the elements is left in the grooves in the semiconductor substrate surface.

However, in this method, when forming grooves on the semiconductor substrate surface using anisotropic dry etching means, a damaged layer is formed on the substrate surface that will become the device formation region, so the performance of the semiconductor device formed in the region is affected. There is a problem in that the manufacturing yield of ICs is significantly reduced.

In order to solve this problem, an insulator was proposed in which a semiconductor epitaxial layer, which would become an element formation region, was selectively formed in an opening formed in an insulating film on a semiconductor substrate using a selective epitaxial growth technique. It has a membrane separation structure.

(c) Conventional technology and problems Conventionally, the insulating film isolation structure formed using the selective epitaxial growth technique is as shown in FIG.
An opening 3 whose side surface is almost perpendicular is formed in a field oxide film 2 formed by a thermal oxidation method on a + type silicon (St) substrate 1.
Then, using a well-known selective epitaxial growth technique, as shown in FIG. The p-type S1 epitaxial layer 4, which will become the device region, is grown to a thickness that is substantially flat with the upper surface.

Therefore, in the conventional structure, impurities that tend to be incorporated into the interface between the epitaxial layer 4 and the field oxide film 2 when formed by the above method, or defects formed on the surface of the epitaxial layer 4 in contact with the field oxide film 2, etc. For example, as shown in the top surface [F] shown in FIG.
When a transistor (OS) is formed, there is a problem in that current leaks between the source S and drain D through the interface (1) between the epitaxial layer 4 and the field oxide film 2, which impairs the performance of the MO8) transistor. Ta. (In the figure, OXo is a gate oxide film, and G is a gate electrode.) Also, in an isobrener type bipolar transistor in which the paste and emitter are formed in self-alignment in the field oxide film, leakage occurs between the emitter and the paste. There was a problem that performance was impaired.

(d) Purpose of the Invention The present invention is directed to the current flow at the interface between a semiconductor epitaxial layer and an insulating film in an element isolation structure in which a semiconductor epitaxial layer serving as an element formation region is selectively grown in an opening in an insulating film. The present invention provides a structure that prevents leakage and a method for forming the same, and its purpose is to improve the manufacturing yield of high-density and highly integrated semiconductor ICs.

(e) Structure of the invention, that is, the present invention comprises an insulating film formed on a - conductivity type semiconductor substrate and having an opening, and a semiconductor epitaxial layer for an element region of one conductivity type formed in the opening. , a semiconductor device comprising a semiconductor layer of one conductivity type located between the semiconductor epitaxial layer and the insulating film and having a higher impurity concentration than the semiconductor epitaxial layer, and a semiconductor substrate having a -conductivity type. forming an opening exposing the surface of the semiconductor substrate in an insulating film formed thereon, forming an impurity diffusion source layer of one conductivity type on the substrate covering at least the opening;
The impurity diffusion source layer is selectively removed leaving only on the side surfaces of the opening, and an element of one conductivity type and having a low impurity level compared to the semiconductor substrate is formed on the surface of the semiconductor substrate exposed in the opening. A method for manufacturing a semiconductor device as described above, comprising growing a semiconductor epitaxial layer of one conductivity type for a region and diffusing impurities into the semiconductor epitaxial layer from an impurity diffusion source layer on the side surface of the opening. It is related to.

(f) Embodiment of the Invention The present invention will be described below with reference to a plan view (a) of the main part of an embodiment of the structure of the present invention shown in FIG.
This will be explained in detail using process cross-sectional views of one embodiment of the method of the present invention shown in (b) and (a) to (a) of FIG. 4.

The MO8 type semiconductor device using the insulating film separation method of the present invention has a third
For example, the specific resistance is 0.1 as shown in Figures (a) and (b).
Expose the surface of the substrate 11 disposed on the field oxide film 12 with a thickness of, for example, about 0.6 to 0.8 [μm] formed on a p-type silicon (Sl) substrate 11 of about [Ω-Kushi]. p at a surface concentration of 10'6 to 10'7 [:atm/d:].
+ type area 14, for example 10'' (atm/c
J) p-type Si Evita Kinyal layer 1 with impurities of degree 1
It has an element formation region consisting of 5 elements. 71XfflJ
14fl'4J'$ XlyrM? On the upper surface of the element formation region, a MO8I-transistor consisting of an n-type source region S, an nW drain region, a gate oxide film OX o + a polycrystalline Si gate electrode G is formed as usual. Note that 16 in the figure is the side surface Kp of the epitaxial layer 15.
The p-type impurity diffusion source layer is a polycrystalline Si layer containing acceptor impurities at a high concentration or a silicate glass layer which functions to form the mold region 4.

In the above structure, since the p+ type region 14 provided on the side surface of the p-Si epitaxial layer 15 in which the MOS transistor is disposed functions as a channel stopper, the side surface of the epitaxial layer below the gate electrode G is Current leakage between the source S and drain D via the capacitor is prevented.

Next, a method for forming the insulating film isolation structure shown in the above embodiment will be explained with reference to FIGS.

That is, first, a field oxide film 1 having a thickness of, for example, about 0.6·-〇, 8 [μm] is formed on the surface of the p++ S1 substrate 11 having a specific resistance of, for example, about 0.1 [Ω-] by a normal thermal oxidation method.
2 and using anisotropic etching means such as reactive ion etching (RIE) using trifluoromethane (CHFs) as an etching means.
Sl is applied to the first field oxide film using phosphorography technology.
An opening 13 having a predetermined shape and substantially vertical side surfaces is formed to expose the substrate surface.

(See FIG. 4(a)) Next, using a normal CVD method, a p++ polycrystalline S1 layer 16, which will serve as an impurity diffusion source, with an impurity concentration of about 101s to 10" [atm/cn], for example, is formed on the substrate surface K to a thickness of 101s to 20".
o.

Form it to a thickness of about [^]. At the time of ε, a polycrystalline Si layer 16 having approximately the same thickness as that described above is formed also inside the opening 13 and covering the inner surface thereof. (See Figure 4(B)) Next, reactive etching using an anisotropic etching means such as carbon tetrachloride (CC44) having a directionality perpendicular to the substrate surface.
The polycrystalline Si layer 16 is etched using an ion etching method until the upper surface of the field oxide film 12 is completely exposed. When this etching was completed, p was applied only to the side surfaces of the openings 13, which were thick in the direction perpendicular to the substrate surface.
The + type polycrystalline St layer 16 remains. (See FIG. 4(c)) Next, using a commonly used selective epitaxial growth technique of St using a reduced pressure system, a field insulating film 2 is selectively formed on the surface of the p++S1 substrate 11 exposed in the opening 13. For example, 10" (a t
A p-type St epitaxial layer 15 having a non-Mllcf of about rrLAri) is grown. In the selective epitaxial growth, for example, dichlorosilane (81HC4t), hydrochloric acid (HCt):hydrogen (Hz) is used as the growth gas.
) = 3: 10: Using a mixture of several tens of gases with diborane (BzHa,)e added at a predetermined ratio, 0.1 to 10:
900~ in the growth gas of about 1 (Torr)
Growth takes place at a temperature of the order of 1000 (10) degrees centigrade. Therefore, in the growth process, from the p+ type polycrystalline St layer 16 formed on the side surface of the opening 13 as an impurity diffusion source to the p+ type polycrystalline St layer 16 in contact with this
A p-type impurity is diffused on the surface of the st epitaxial layer 15, and a shallow p+ layer is formed on the side surface of the p-type Si epitaxial layer 15.
A mold region 14 is formed. In addition, the surface impurity concentration of the p+ type region 4 is set to 1016 to 1016 to 10/7 in order to sufficiently exhibit the effect of the channel stopper.
], and if this concentration is not reached in the epitaxial growth process, it is adjusted by a subsequent heat treatment process performed during element formation, etc. (See FIG. 4)) (g) As described in detail, according to the present invention, a semiconductor element is formed in a semiconductor device with an insulating film separation structure formed using selective epitaxial growth technology. Since a channel region 411 is formed on the side surface of the epitaxial layer separated into islands, in the semiconductor element formed on the epitaxial layer, the area between the functional regions generated via the side surface of the epitaxial layer is Current leakage is prevented.

Therefore, according to the present invention, it is possible to improve the manufacturing yield and reliability of a semiconductor IC having an insulating film separation structure.

Note that the present invention is effective not only for MISICs but also for bipolar ICs such as isobrainer type ICs, and can also be applied to reverse conductivity type ICs.

Furthermore, silicate glass such as BSG or PSG may be used as an impurity diffusion source.

Furthermore, when the impurity concentration of the substrate is low, it is more effective to introduce impurities of the same conductivity type at a high concentration into the substrate surface on which the epitaxial layer is provided by ion implantation or the like.

[Brief explanation of drawings]

Figures 1 (a) to (b) are process cross-sectional views of a conventional insulating film isolation structure substrate manufacturing method formed using selective epitaxial technology, and Figures 2 (a) and (b) are explanations of problems in the conventional structure. Figures 3 and 3 are a plan view (a) of essential parts and a sectional view taken along the line A-A' (b) of an embodiment of the structure of the present invention, and Figure 4 (
A) to A) are process cross-sectional views of an embodiment of the method of the present invention. In the figure, 11 is a p++ silicon substrate, 12 is a field oxide film, 13 is an opening, and 14 is a p+ type region 15.
16 is a p-type polycrystalline silicon layer, and ■ is a side surface of the epitaxial layer. Single 1 mouth falcon 2 mouth: 3 4 3rd mouth (Iji ('O)

Claims (1)

[Claims] 1. - An insulating film formed on a semiconductor substrate of a conductivity type and having an opening, a semiconductor epitaxial layer for an element region of one conductivity type formed in the opening; A semiconductor device comprising a semiconductor layer of one conductivity type which is located between a semiconductor epitaxial layer and the insulating film and has a higher impurity concentration than the semiconductor epitaxial layer. 2. - Forming an opening exposing the surface of the semiconductor substrate in an insulating film formed on a semiconductor substrate of a conductivity type, and forming an impurity diffusion source layer of one conductivity type covering at least the opening on the substrate. Then, the impurity diffusion source layer is selectively removed leaving only on the side surfaces of the opening, and an element of one conductivity type and having an impurity concentration lower than that of the semiconductor substrate is formed on the surface of the semiconductor substrate exposed in the opening. A method for manufacturing a semiconductor device, comprising the steps of growing a semiconductor epitaxial layer of one conductivity type for a region, and diffusing impurities into the semiconductor epitaxial layer from an impurity diffusion source layer on the side surface of the opening.