JPS59175122A - Before-coating processing device for semiconductor wafer - Google Patents
Before-coating processing device for semiconductor waferInfo
- Publication number
- JPS59175122A JPS59175122A JP4821783A JP4821783A JPS59175122A JP S59175122 A JPS59175122 A JP S59175122A JP 4821783 A JP4821783 A JP 4821783A JP 4821783 A JP4821783 A JP 4821783A JP S59175122 A JPS59175122 A JP S59175122A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- carrier
- processing
- semiconductor substrate
- closed chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Coating Apparatus (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体基板塗布前処理装置にかかり、特に半導
体素子製造工程におけるフォトリソグラフィ工程の半導
体基板塗布前処理装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor substrate coating pretreatment apparatus, and more particularly to a semiconductor substrate coating pretreatment apparatus for a photolithography process in a semiconductor element manufacturing process.
半導体基板塗布前処理とは、その後処理工程である目合
せ雑光工程、現像処理工程及びエツチング処理工程等に
おいて半導体素子の微細なパターンを形成する上で重要
な要因となる感光材(以下フォトレジストと呼ぶ)と半
導体基板(以下ウェハと呼ぶ)の密着性を向上させる為
のものである。Semiconductor substrate coating pre-treatment refers to the use of photosensitive material (hereinafter referred to as photoresist), which is an important factor in forming fine patterns of semiconductor elements in subsequent processing steps such as alignment, miscellaneous light processing, development processing, and etching processing. This is to improve the adhesion between a semiconductor substrate (hereinafter referred to as a wafer) and a semiconductor substrate (hereinafter referred to as a wafer).
ウェハとフォトレジストの密着性が低いとフォトレジス
トの剥れの発生及びエツチング量の不安定等の半導体素
子の微細なパターンを形成する上で大きな支障を来たす
為、良好な半導体基板塗布前処理を行う必要がある。If the adhesion between the wafer and the photoresist is poor, it will cause major problems in forming fine patterns for semiconductor devices, such as peeling of the photoresist and unstable etching amount, so a good pre-treatment for semiconductor substrate coating is required. There is a need to do.
半導体基板塗布前処理の方法として大別し、ウェハ表面
に処理薬液を適下し、該ウェハを回転し塗布するスピン
コード法、及び処理薬液又は処理薬液によるペーパーガ
スをウェハ表面にスプレーしウェハ表面に付着させるス
プレーコート法、及び処理薬液によるペーパーガスの雰
囲気中にウェハを設置し処理薬液を付着させるペーパー
ガス処理法等がある。There are two main types of pre-treatment methods for semiconductor substrate coating: the spin code method, in which a processing chemical is dropped onto the wafer surface, and the wafer is rotated to coat the wafer; There are a spray coating method in which the wafer is deposited on the wafer, and a paper gas treatment method in which the wafer is placed in a paper gas atmosphere containing a processing chemical and the processing chemical is deposited on the wafer.
前記、各処理方法においてスピンコード法は処理薬液の
使用量が多く、又、塗布膜厚のゝむら“ゝゝばらつぎ”
等が発生しやすく、良好な処理状態も望めない。Among the above-mentioned processing methods, the spin code method uses a large amount of processing chemicals, and also causes uneven coating film thickness.
etc. are likely to occur, and good processing conditions cannot be expected.
スプレーコート法においても前記同様の問題が有り、ペ
ーパーガス処理法が用いられる場合が多い。The spray coating method also has the same problem as described above, and a paper gas treatment method is often used.
ペーパーガス処理法は処理楽液の使用葉も比較的少なく
処理状態も良好なものが得られる。In the paper gas treatment method, relatively few leaves are used for processing liquid, and leaves in good condition can be obtained.
しかし、ペーパーガス処理法では処理薬品雰囲気中にウ
ェハを設置する処理時間が比較的長くかかる為、複数枚
のウェハを同時に処理するバッチ処理法が通常用いられ
る。However, since the paper gas processing method requires a relatively long processing time in which the wafers are placed in a processing chemical atmosphere, a batch processing method is usually used in which a plurality of wafers are processed simultaneously.
尚、通常バッチ処理では規定数のキャリア単位で行われ
、処理用キャリアヘウエハを入れ換え、そのキャリアご
と処理薬品雰囲気中に設置し処理を実行し、再びそのキ
ャリアごと処理薬品雰囲気中より取り出し処理用キャリ
アより入れ換えが行われる。Normally, batch processing is carried out in units of a predetermined number of carriers; the wafers are exchanged to the carrier for processing, the whole carrier is placed in a processing chemical atmosphere, processing is executed, and the carrier is again taken out from the processing chemical atmosphere and placed for processing. The carrier will replace it.
前記の様にウェハ入れ換え作業が多く、又、処理薬品雰
囲気中へ直接キャリアを出し入れする為、塵埃の発生及
び処理雰囲気中への混入、又、キャリアを出し入れでき
る程度に処理薬品の密閉雰囲気を開放する為、処理薬品
雰囲気の状態を乱す等の支障がある。さらに、現在、各
処理行程で進行している自動化、省力化、キャリアto
キャリアによる連続処理及び他のフォトリング2フイ工
程の処理装置との接続(In−Line化)が困難であ
り、作業の発展性に支障を来たすものである。As mentioned above, there is a lot of wafer exchange work, and since carriers are directly taken in and out of the processing chemical atmosphere, dust is generated and mixed into the processing atmosphere, and the sealed atmosphere of processing chemicals is opened to the extent that carriers can be taken out and put in. Therefore, there are problems such as disturbing the state of the processing chemical atmosphere. Furthermore, automation, labor saving, carrier to
Continuous processing using a carrier and connection (in-line) with processing equipment for other photo ring 2-fi processes are difficult, which impedes the development of the work.
本発明はペーパーガス処理方法による良好な処理状態を
保ち、前記した種々の問題を解消し作業の発展性に豊ん
だ半導体基板塗布前処理装置を提供するものヤある。The present invention provides a semiconductor substrate coating pretreatment apparatus which maintains a good treatment state by a paper gas treatment method, solves the various problems described above, and has a rich work expandability.
本発明は半導体基板を密閉室内に収納された昇降機能を
有する専用キャリアへ順次自動搬送する手段と、該密閉
室内に塗布前処理薬品雰囲気を発生する手段と、該半導
体基板を該専用キャリアより自動送出する手段とを備え
たことを特徴とする半導体基板塗布前処理装置である。The present invention provides means for automatically sequentially transporting semiconductor substrates to a dedicated carrier having an elevating function housed in a sealed chamber, means for generating a pre-coating chemical atmosphere in the sealed chamber, and automatically transporting the semiconductor substrates from the dedicated carrier. 1 is a semiconductor substrate coating pretreatment apparatus characterized by comprising a sending means.
尚、塗布前処理薬品雰囲気を発生する手段を密閉室内に
設ける場合、又は密閉室外に設は発生したペーパーガス
を配管により密閉室内に導く場合、又、密閉室内の専用
キャリアへのウェハの搬送及び送出を一つの手段で兼ね
た場合のものも、本発明の範囲に含着れるものである。In addition, when a means for generating a pre-coating treatment chemical atmosphere is provided in a sealed chamber, or when a means is installed outside the sealed chamber and generated paper gas is guided into the sealed chamber via piping, or when the wafer is transported to a dedicated carrier in the sealed chamber and The scope of the present invention also includes a case where one means serves as the sending method.
第1図は本発明の一実施例を示す概略側面図であり、供
給エレベータ1にセットされたウェハを収納したキャリ
ア2よりウェハ搬送機構3により搬送されたウェハは密
閉室4の内部に収納された昇降機能を有する専用キャリ
ア5へ開閉機能を有する密閉室入口シャッター6を通過
し収納される。FIG. 1 is a schematic side view showing one embodiment of the present invention, in which wafers are transported by a wafer transport mechanism 3 from a carrier 2 containing wafers set in a supply elevator 1, and are stored inside a sealed chamber 4. It passes through a sealed room entrance shutter 6 that has an opening/closing function and is stored in a dedicated carrier 5 that has an elevating function.
専用キャリア5へ収納されたウェハ7はバブリング配管
等のペーパーガス発生促進機能を有する塗布前処理液槽
8より発生したペーパーガスの雰囲気に一定時間設置さ
れる。The wafer 7 housed in the dedicated carrier 5 is placed in an atmosphere of paper gas generated from a coating pretreatment liquid tank 8 having a function of promoting paper gas generation, such as bubbling piping, for a certain period of time.
その後、専用キャリア5よりウェハ送出機構9により処
理されたウェハ7を開閉機能を有する密閉室出口シャッ
ター10を通過し収納エレベータ11にセットされたウ
ェハを収納するキャリア12へ送出するものである。Thereafter, the processed wafer 7 is sent from the dedicated carrier 5 by a wafer delivery mechanism 9 to a carrier 12 that stores the wafer set in a storage elevator 11 through a closed chamber exit shutter 10 having an opening/closing function.
以上、述べた様に本発明はウェハに対する処理はペーパ
ーガス処理方法であり良好な処理状態を保ち、尚かつ、
ウェハ毎の搬送、送出手段を用い5−
る為、ウェハの入れ換え等により発生する問題を解消し
、他のフォ) IJソゲラフイエ程の処理装置との接続
が容易である事は言うまでもない。As described above, the present invention uses a paper gas treatment method to process wafers, maintains good processing conditions, and
It goes without saying that since a means for transporting and sending out each wafer is used, problems caused by changing wafers, etc. are eliminated, and it is easy to connect with other processing equipment such as the IJ Sogelahuie.
以上、本発明により良好な処理状態を保ち、作業の発展
性に豊んだ半導体基板塗布前処理装置が提供される事は
明らかである。As described above, it is clear that the present invention provides a semiconductor substrate coating pretreatment apparatus that maintains a good processing state and has a wide range of operability.
第1図は本発明の一実施例を示す概略側面図である。
尚、図において、
l・・・・・・供給エレベータ、2・・・・・・供給キ
ャリア、3・・・・・・ウェハ搬送機構、4・・・・・
・密閉室、5・・・・・・専用キャリア、6・・・・・
・入口シャッター、7・・・・・・ウェハ、8・・・・
・・塗布前処理液槽、9・・・・・・ウェハ送出機構、
10・・・・・・出口シャッター、11・・・・・・収
納エレベータ、12・・・・・・収納キャリアである。
6−FIG. 1 is a schematic side view showing one embodiment of the present invention. In the figure, l... supply elevator, 2... supply carrier, 3... wafer transport mechanism, 4...
・Closed room, 5... Dedicated carrier, 6...
・Entrance shutter, 7...Wafer, 8...
...Coating pre-treatment liquid tank, 9...Wafer delivery mechanism,
10...Exit shutter, 11...Storage elevator, 12...Storage carrier. 6-
Claims (1)
用キャリアへj−次自動搬送する手段と、該密閉室内に
塗布前処理薬品雰囲気を発生する手段と、該半導体基板
を該専用キャリアより自動送出する手段とを備えたこと
を特徴とする半導体基板塗布前処理装置。Means for automatically transporting a semiconductor substrate to a dedicated carrier having an elevating function housed in a sealed chamber, means for generating a pre-coating treatment chemical atmosphere in the sealed chamber, and automatic feeding of the semiconductor substrate from the dedicated carrier. 1. A semiconductor substrate coating pretreatment apparatus, characterized in that it is equipped with means for:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4821783A JPS59175122A (en) | 1983-03-23 | 1983-03-23 | Before-coating processing device for semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4821783A JPS59175122A (en) | 1983-03-23 | 1983-03-23 | Before-coating processing device for semiconductor wafer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59175122A true JPS59175122A (en) | 1984-10-03 |
JPS6355860B2 JPS6355860B2 (en) | 1988-11-04 |
Family
ID=12797241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4821783A Granted JPS59175122A (en) | 1983-03-23 | 1983-03-23 | Before-coating processing device for semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59175122A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6364031U (en) * | 1986-10-16 | 1988-04-27 | ||
JPS63199423A (en) * | 1987-02-16 | 1988-08-17 | Toshiba Corp | Surface treating method for semiconductor substrate |
JP2012199318A (en) * | 2011-03-18 | 2012-10-18 | Tokyo Electron Ltd | Coating and developing apparatus, coating and developing method, and storage medium |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52142972A (en) * | 1976-05-25 | 1977-11-29 | Toshiba Corp | Semiconductor production device |
JPS5731151A (en) * | 1980-08-04 | 1982-02-19 | Toshiba Corp | Automatic continuous treating device for semiconductor substrate |
JPS5753933A (en) * | 1980-09-18 | 1982-03-31 | Toshiba Corp | Manufacture of semiconductor element |
-
1983
- 1983-03-23 JP JP4821783A patent/JPS59175122A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52142972A (en) * | 1976-05-25 | 1977-11-29 | Toshiba Corp | Semiconductor production device |
JPS5731151A (en) * | 1980-08-04 | 1982-02-19 | Toshiba Corp | Automatic continuous treating device for semiconductor substrate |
JPS5753933A (en) * | 1980-09-18 | 1982-03-31 | Toshiba Corp | Manufacture of semiconductor element |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6364031U (en) * | 1986-10-16 | 1988-04-27 | ||
JPS63199423A (en) * | 1987-02-16 | 1988-08-17 | Toshiba Corp | Surface treating method for semiconductor substrate |
JPH0426780B2 (en) * | 1987-02-16 | 1992-05-08 | Tokyo Shibaura Electric Co | |
JP2012199318A (en) * | 2011-03-18 | 2012-10-18 | Tokyo Electron Ltd | Coating and developing apparatus, coating and developing method, and storage medium |
Also Published As
Publication number | Publication date |
---|---|
JPS6355860B2 (en) | 1988-11-04 |
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