JPH03116819A - Manufacture of semiconductor device and device therefor - Google Patents

Manufacture of semiconductor device and device therefor

Info

Publication number
JPH03116819A
JPH03116819A JP1251897A JP25189789A JPH03116819A JP H03116819 A JPH03116819 A JP H03116819A JP 1251897 A JP1251897 A JP 1251897A JP 25189789 A JP25189789 A JP 25189789A JP H03116819 A JPH03116819 A JP H03116819A
Authority
JP
Japan
Prior art keywords
photosensitive
substrate
processed
semiconductor device
processing section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1251897A
Other languages
Japanese (ja)
Inventor
Mitsugi Oshima
大島 貢
Masashi Yamamoto
山本 正志
Hiroshi Maejima
前島 央
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1251897A priority Critical patent/JPH03116819A/en
Publication of JPH03116819A publication Critical patent/JPH03116819A/en
Pending legal-status Critical Current

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To control the dimensional variation of a resist pattern, and to contrive improvement in dimensional accuracy of the resist pattern by a method wherein, after a photosensitive treatment has been conducted on the photoresist coated on the substrate to be treated, the substrate is brought into an inert gas atmosphere. CONSTITUTION:In a sensitizing-developing treatment device 1a, the unloader of a sensitizing treatment section 2 has an additional function as the loader of a developing treatment section 6, end a carrier jig 3b arranged thereon is housed in a purge box 7. On the purge box 7, a through hole 8 is perforated, and when a developing treatment is conducted, inert gas such as nitrogen gas and the like is fed into the purge box 7 through the above-mentioned through hole 8. In order to conduct sensitizing and developing treatments, the prescribed quantity of nitrogen gas, for example, is fed into the purge box 7, sensitized wafers 4 are left in a nitrogen gas atmosphere until a developing treatment is conducted. As a result, the widening of the width of a resist pattern due to the obstruction of oxide reaction and the like of the sensitized part of the resist can be prevented. Consequently, dimensional accuracy of the pattern can sharply be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造技術に関し、特に、半導体
装置の製造工程におけるフォトリングラフィ技術に適用
して有効な技術に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technology for manufacturing semiconductor devices, and in particular to a technology that is effective when applied to photolithography technology in the manufacturing process of semiconductor devices.

〔従来の技術〕[Conventional technology]

半導体装置の製造工程にふけるフォトリソグフィ技術に
ついては、例えば株式会社オーム社、昭和59年11月
30日発行、rLSIハンドブックJP253〜P25
8に記載があり、フォトレジスト(以下、レジストとい
う)の感光、現像処理について説明されている。
Regarding the photolithography technology involved in the manufacturing process of semiconductor devices, for example, Ohmsha Co., Ltd., published November 30, 1980, rLSI Handbook JP253-P25
8, which describes the exposure and development of a photoresist (hereinafter referred to as resist).

従来の感光、現像処理工程を第5図により説明する。感
光処理部500ローダに配置されたキャリヤ治具51a
には、主面に感光前のレジストが塗布された半導体ウェ
ハ(以下、ウェハという)52aが、例えば25枚程度
収容されている。感光処理に際して、ウェハ52aは、
キャリヤ治具51aの下方から順に感光処理i50に搬
送され、所定のパターンが転写される。感光処理の施さ
れたウェハ52bは、アンローダに配置されたキャリヤ
治具51bに収容されるが、この場合、ウェハ52bは
、キャリヤ治具51bの上方から順に収容される。現像
処理の施されたウェハ52bは、現像処理部53のアン
ローダに搬送され、そこに配置されたキャリヤ治具51
cに収容されるようになっている。
The conventional exposure and development process will be explained with reference to FIG. Carrier jig 51a placed in the photosensitive processing unit 500 loader
For example, about 25 semiconductor wafers (hereinafter referred to as wafers) 52a each having a main surface coated with a resist before exposure are housed in the . During the photosensitive treatment, the wafer 52a is
The carrier jig 51a is sequentially transported from the bottom to the photosensitive treatment i50, where a predetermined pattern is transferred. The wafer 52b subjected to the photosensitive treatment is accommodated in a carrier jig 51b disposed in the unloader, and in this case, the wafers 52b are accommodated in order from above the carrier jig 51b. The developed wafer 52b is transported to the unloader of the development processing section 53, and is transferred to the carrier jig 51 disposed there.
It is designed to be housed in c.

次に、感光処理が終了すると、キャリヤ治具51bは、
現像処理部53のローダに搬送される。
Next, when the photosensitive process is completed, the carrier jig 51b is
It is transported to the loader of the development processing section 53.

ところで、従来、ウェハ52bは、ウェハ52aが感光
処理されてから現像処理されるまでの間、大気中に放置
されていた。そして、現像処理に際して、キャリヤ治具
51bのウェハ52bは、最後に感光処理の施されたウ
ェハ52bから、すなわちキャリヤ治具51bの下方か
ら順に現像処理部53に搬送され、レジストに転写され
たパターンが現像されていた。
By the way, conventionally, the wafer 52b has been left in the atmosphere after the wafer 52a is exposed to light and until it is developed. Then, during the development process, the wafers 52b of the carrier jig 51b are transported to the development process section 53 in order from the wafer 52b that was last exposed to light, that is, from the bottom of the carrier jig 51b, and the pattern transferred to the resist is transferred to the development process section 53. had been developed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところが、上記従来の技術においては、現像処理後のウ
ェハを収容する同一キャリヤ治具内のウェハであっても
、感光処理が施されてから現像処理が施されるまで大気
中に放置されていた時間の違いによって、レジストパタ
ーン寸法が変動してしまう問題があることを本発明者は
見出した。そして、この問題は、レジストが大気中の酸
素と反応して酸化してしまうことに起因すると想定され
る。例えばポジレジストの場合には、放置時間に比例し
てレジストパターンが幅広となるが、これは感光処理後
、レジストの感光部分の酸化が進行し、その酸化部分が
現像処理の際に現像液に溶解せずに残存してしまうこと
に起因すると想定される。
However, in the above-mentioned conventional technology, even if the wafers are in the same carrier jig that accommodates the wafers after the development process, they are left in the atmosphere after being exposed to light until they are subjected to the development process. The inventors have discovered that there is a problem in which resist pattern dimensions vary due to differences in time. It is assumed that this problem is caused by the resist reacting with oxygen in the atmosphere and becoming oxidized. For example, in the case of a positive resist, the resist pattern becomes wider in proportion to the standing time, but this is because the oxidation of the photosensitive parts of the resist progresses after exposure processing, and the oxidized parts are exposed to the developer during the development process. It is assumed that this is due to the fact that it remains undissolved.

本発明は上記課題に着目してなされたものであり、その
目的は、レジストパターンの寸法変動を抑制し、レジス
トパターンの寸法精度を向上させることのできる技術を
提供することにある。
The present invention has been made with attention to the above-mentioned problems, and an object thereof is to provide a technique that can suppress dimensional fluctuations of a resist pattern and improve the dimensional accuracy of the resist pattern.

本発明の前記ならびにその他の目的と新規な特徴は、明
細書の記述および添付図面から明らかになるであろう。
The above and other objects and novel features of the present invention will become apparent from the description of the specification and the accompanying drawings.

〔課題を解決するための手段〕[Means to solve the problem]

本願において開示される発明のうち、代表的なものの概
要を簡単に説明すれば、以下のとおりである。
A brief overview of typical inventions disclosed in this application is as follows.

すなわち、請求項1記載の発明は、被処理基板に塗布さ
れたフォトレジストに感光処理を施した後、前記感光処
理後の被処理基板を不活性ガス雲囲気中に収容すること
を特徴とする半導体装置の製造方法。
That is, the invention according to claim 1 is characterized in that, after subjecting the photoresist applied to the substrate to be processed to a photosensitive treatment, the substrate to be processed after the photosensitive treatment is housed in an inert gas cloud. A method for manufacturing a semiconductor device.

請求項2記載の発明は、被処理基板に塗布されたフォト
レジストに所定のパターンを転写する感光処理部と、前
記パターンを現像する現像処理部とを同一の処理室内に
備える半導体装置の製造装置であって、前記処理室内に
感光処理後の被処理基板を不活性ガス雪囲気中に収容す
る框体を設けた半導体装置の製造装置構造とするもので
ある。
The invention according to claim 2 provides a semiconductor device manufacturing apparatus comprising a photosensitive processing section that transfers a predetermined pattern onto a photoresist coated on a substrate to be processed and a development processing section that develops the pattern in the same processing chamber. The semiconductor device manufacturing apparatus has a structure in which a frame body is provided in the processing chamber to house the substrate to be processed after photosensitive processing in an inert gas atmosphere.

請求項3記載の発明は、被処理基板に塗布されたフォト
レジストに所定のパターンを転写する感光処理部と、前
記パターンを現像する現像処理部とを同一の処理室内に
備える半導体装置の製造装置であって、前記処理室内を
不活性ガス−囲気とした半導体装置の製造装置構造とす
るものである。
The invention according to claim 3 provides a semiconductor device manufacturing apparatus comprising, in the same processing chamber, a photosensitive processing section that transfers a predetermined pattern onto a photoresist coated on a substrate to be processed, and a development processing section that develops the pattern. This is a semiconductor device manufacturing apparatus structure in which the inside of the processing chamber is surrounded by an inert gas atmosphere.

請求項4記載の発明は、被処理基板に塗布されたフォト
レジストに所定のパターンを転写する感光処理部を処理
室内に備える半導体装置の製造装置であって、前記処理
室内に、少なくとも感光処理後の被処理基板を不活性ガ
ス雰囲気中に収容する框体を設けた半導体装置の製造装
置構造とするものである。
The invention according to claim 4 is a semiconductor device manufacturing apparatus comprising a photosensitive processing section in a processing chamber that transfers a predetermined pattern to a photoresist coated on a substrate to be processed, wherein at least a photosensitive processing section is provided in the processing chamber after photosensitive processing. The structure of the apparatus for manufacturing a semiconductor device includes a frame for accommodating a substrate to be processed in an inert gas atmosphere.

請求項5記載の発明は、感光処理を施した後の被処理基
板のフォトレジストに転写された所定のパターンを現像
する現像処理部を処理室内に備える半導体装置の製造装
置であって、前記処理室内に、少なくとも現像処理前の
被処理基板を不活性雰囲気中に収容する框体を設けた半
導体装置の製造装置構造とするものである。
The invention according to claim 5 is a semiconductor device manufacturing apparatus comprising, in a processing chamber, a development processing section that develops a predetermined pattern transferred to a photoresist of a substrate to be processed after photosensitive processing, wherein the processing This apparatus has a structure for manufacturing a semiconductor device, in which a frame body is provided in a room to house at least a substrate to be processed in an inert atmosphere before being developed.

請求項6記載の発明は、被処理基板に塗布されたレジス
トに感光処理を施した後、その被処理基板を液中に浸漬
させた状態で次の処理部へ搬送する半導体装置の製造方
法である。
The invention according to claim 6 provides a method for manufacturing a semiconductor device, in which a resist coated on a substrate to be processed is subjected to photosensitive treatment, and then the substrate to be processed is transported to the next processing section while immersed in a liquid. be.

請求項7記載の発明は、被処理基板に塗布されたレジス
トに所定のパターンを転写する感光処理部と、前記パタ
ーンを現像する現像処理部とを備える半導体装置の製造
装置であって、前記感光処理部から現像処理部への被処
理基板の搬送路に、感光処理後の被処理基板を液中に浸
漬させた状態で搬送する搬送手段を設けた半導体装置の
製造装置構造とするものである。
The invention according to claim 7 provides a semiconductor device manufacturing apparatus comprising: a photosensitive processing section that transfers a predetermined pattern to a resist applied to a substrate to be processed; and a development processing section that develops the pattern; The semiconductor device manufacturing apparatus has a structure in which a transport means for transporting the processed substrate after photosensitive treatment while being immersed in a liquid is provided on the transport path of the processed substrate from the processing section to the development processing section. .

〔作用〕[Effect]

上記した手段によれば、感光処理後の被処理基板に塗布
されたレジストの酸化反応が妨げられるため、レジスト
の酸化反応に起因すると想定されるレジストハターンの
寸法の変動が抑制され、その寸法精度を大幅に向上させ
ることが可能となる。
According to the above-mentioned means, the oxidation reaction of the resist applied to the substrate to be processed after the photosensitive treatment is prevented, so the fluctuation in the dimensions of the resist pattern that is assumed to be caused by the oxidation reaction of the resist is suppressed, and the dimensional accuracy is can be significantly improved.

〔実施例1〕 第1図は本発明の一実施例である半導体装置の製造装置
の概略断面図、第2図は感光処理後のウェハを大気中に
放置した場合と不活性ガス雰囲気中に放置した場合とに
おけるレジストパターン寸法の状態を比較したグラフ図
である。
[Example 1] Fig. 1 is a schematic cross-sectional view of a semiconductor device manufacturing apparatus which is an embodiment of the present invention, and Fig. 2 shows a case in which a wafer after exposure treatment is left in the atmosphere and in an inert gas atmosphere. FIG. 2 is a graph diagram comparing the state of resist pattern dimensions in the case where the resist pattern is left as it is;

第1図に示す本実施例1の半導体装置の製造装置は、感
光処理および現像処理が一貫して行われる感光・現像処
理装置1aである。
The semiconductor device manufacturing apparatus of Example 1 shown in FIG. 1 is a photosensitive/developing processing apparatus 1a in which photosensitive processing and development processing are performed consistently.

感光・現像処理装置1aの処理室内に設けられた感光処
理部20ローダに配置されたキャリヤ治具3aには、例
えば主面にポジ形のレジスト(図示せず)が塗布された
ウェハ(被処理基板)4が、キャリヤ治具3bの高さ方
向に並列した状態で複数枚収容されている。感光処理部
2は、ウェハ4に塗布されたレジストに所定のパターン
を転写する処理部であり、感光処理の施されたウェハ4
は、搬送ベル)5aの動作によって感光処理R2のアン
ローダに搬送され、そこに配置されたキャリヤ治具3b
に収容されるようになっている。
For example, a wafer (to be processed) whose main surface is coated with a positive resist (not shown) is placed on the carrier jig 3a disposed in the photosensitive processing section 20 loader provided in the processing chamber of the photosensitive/developing processing apparatus 1a. A plurality of substrates) 4 are housed in parallel in the height direction of the carrier jig 3b. The photosensitive processing unit 2 is a processing unit that transfers a predetermined pattern onto the resist applied to the wafer 4, and the photosensitive processing unit 2 transfers a predetermined pattern to the resist applied to the wafer 4.
The carrier jig 3b is transported to the unloader for photosensitive processing R2 by the operation of the transport bell) 5a, and is placed there.
It is designed to be accommodated in

搬送ベル)5aは、回転部5bの回動によって左右両方
向に動作するようになっており、感光処理に際しては、
感光処理後のウェハ4を感光処理部2からキャリヤ治具
3bに搬送し、現像処理に際しては、キャリヤ治具3b
l:e容されたウェハ4を現像処理部6に搬送するよう
になっている。
The conveyor bell) 5a is designed to move in both left and right directions by the rotation of the rotating part 5b, and during photosensitive processing,
The wafer 4 after photosensitive processing is transported from the photosensitive processing section 2 to the carrier jig 3b, and during the development process, the wafer 4 is transferred to the carrier jig 3b.
The wafer 4 stored in the 1:e storage is transported to the development processing section 6.

また、キャリヤ治具3bは、図示しない駆動系と機械的
に接続されており、図の上下方向に移動可能になってい
る。そして、キャリヤ治具3bの上下動によって、感光
処理後のウェハ4のキャリヤ治具3bへの収容位置の設
定やキャリヤ治具3bに収容された所定のウェハ4の選
択を行えるようになっている。例えばキャリヤ治具3b
の移動によって、ウェハ4を感光処理の施された順に、
現像処理部6へ搬送することも可能である。
Further, the carrier jig 3b is mechanically connected to a drive system (not shown), and is movable in the vertical direction in the figure. By moving the carrier jig 3b up and down, it is possible to set the accommodation position of the wafer 4 after exposure processing in the carrier jig 3b and to select a predetermined wafer 4 accommodated in the carrier jig 3b. . For example, carrier jig 3b
By moving the wafers 4, the wafers 4 are placed in the order in which they were exposed to light.
It is also possible to transport it to the development processing section 6.

本実施例1の感光・現像処理装置1aにおいては、感光
処理部2のアンローダが、現像処理部60ローダを兼用
しているとともに、そこに配置されたキャリヤ治具3b
が、パージボックス7内に収容されている。パージボッ
クス7には、貫通孔8が開口されており、感光、現像処
理に際して、その貫通孔8を通じてパージボックス7内
に窒素ガス等の不活性ガスが供給されるようになってい
る。すなわち、本実施例1の感光・現像処理装置1aに
おいては、感光、現像処理に際して、感光処理後から現
像処理前のウェハ4が放置される雰囲気を常に不活性ガ
ス雪囲気に保つことが可能な構造となっている。図示し
ないが、例えばポスト・エクスポジャ・ベイク(FEB
)部を有する場合は、FEB部も窒素ガス雰囲気とする
In the photosensitive/development processing apparatus 1a of the first embodiment, the unloader of the photosensitive processing section 2 also serves as the loader of the development processing section 60, and the carrier jig 3b disposed there.
is housed in the purge box 7. A through hole 8 is opened in the purge box 7, and an inert gas such as nitrogen gas is supplied into the purge box 7 through the through hole 8 during exposure and development processing. That is, in the photosensitive/developing processing apparatus 1a of the first embodiment, during the photosensitive and developing processes, it is possible to always maintain the atmosphere in which the wafer 4 is left after the photosensitive process and before the developing process to be surrounded by an inert gas atmosphere. It has a structure. Although not shown, for example, post exposure bake (FEB
), the FEB section is also in a nitrogen gas atmosphere.

現像処理部6は、感光処理によってレジストに転写され
たパターンを現像する処理部であり、現像処理の施され
たウェハ4は、現像処理部6のアンローダに搬送され、
そこに配置されたキャリヤ治具3Cに収容されるように
なっている。
The development processing section 6 is a processing section that develops the pattern transferred to the resist by photosensitive processing, and the wafer 4 that has been subjected to the development processing is transported to the unloader of the development processing section 6.
It is accommodated in a carrier jig 3C placed there.

以上、このような感光・現像装置1aにおいて、感光、
現像処理を行うには、パージボックス7内に、例えば所
定量の窒素ガスを供給して、パージボックス7内の雰囲
気を不活性ガス雰囲気とする。
As described above, in such a photosensitive/developing device 1a, photosensitive,
To perform the development process, for example, a predetermined amount of nitrogen gas is supplied into the purge box 7 to make the atmosphere inside the purge box 7 an inert gas atmosphere.

すなわち、感光処理が施されたウェハ4を、現像処理が
施されるまでの間、窒素ガス雰囲気中に放置することに
よって、レジストの感光部分の酸化反応等を妨げてレジ
ストパターンが幅広となってしまうことを防止する。第
2図に感光処理後のウェハ4を大気中に放置した場合と
不活性ガス雰囲気中に放置した場合とのレジストパター
ンの寸法の状態を比較したグラフ図を示す。二点鎖線は
、ウェハ4を大気中に放置した場合を示す。図かられか
るように、ウェハ4を大気中に放置した場合は、放置時
間に比例してレジストパターンが幅広になってしまうの
に対して、ウェハ4を窒素雰囲気中に放置した場合は、
放置時間に関係なく一定値となっている。
That is, by leaving the wafer 4 that has been subjected to photosensitive treatment in a nitrogen gas atmosphere until it is subjected to development processing, the oxidation reaction of the photosensitive portion of the resist is hindered, and the resist pattern becomes wider. Prevent it from being put away. FIG. 2 is a graph comparing the dimensional state of the resist pattern when the wafer 4 after exposure treatment is left in the air and when it is left in an inert gas atmosphere. The two-dot chain line indicates the case where the wafer 4 is left in the atmosphere. As can be seen from the figure, when the wafer 4 is left in the atmosphere, the resist pattern becomes wider in proportion to the standing time, whereas when the wafer 4 is left in the nitrogen atmosphere,
It remains a constant value regardless of the length of time it is left unused.

このように本実施例1によれば、感光処理後のウェハ4
を現像処理が施されるまでの間、窒素ガス雰囲気中に放
置しておくことにより、感光処理後のウェハ4の主面に
塗布されたレジストの酸化反応等が妨げられるため、レ
ジストの酸化反応に起因すると想定されるレジストパタ
ーンの寸法の変動が抑制され、その寸法精度を大幅に向
上させ4ことが可能となる。そして、レジストパターン
が安定性が向上するため、感光、現像処理に際してアク
セス配分率等を安定化することが可能となる。
In this way, according to the first embodiment, the wafer 4 after the photosensitive treatment
By leaving it in a nitrogen gas atmosphere until it is subjected to development processing, the oxidation reaction of the resist applied to the main surface of the wafer 4 after exposure processing is hindered. Variations in the dimensions of the resist pattern that are assumed to be caused by this are suppressed, making it possible to significantly improve the dimensional accuracy. Furthermore, since the stability of the resist pattern is improved, it becomes possible to stabilize the access distribution rate and the like during exposure and development processing.

〔実施例2〕 第3図は本発明の他の実施例である半導体装置の製造装
置をウェハの搬送方向に切断した概略断面図、第4図は
第3図の直角方向に切断した断面図である。
[Embodiment 2] FIG. 3 is a schematic cross-sectional view of a semiconductor device manufacturing apparatus according to another embodiment of the present invention, taken in the wafer transport direction, and FIG. 4 is a cross-sectional view taken in a direction perpendicular to FIG. 3. It is.

以下、本実施例2の半導体装置の製造装置を第3図およ
び第4図により説明する。
The semiconductor device manufacturing apparatus of Example 2 will be described below with reference to FIGS. 3 and 4.

本実施例2においては、感光・現像処理装置lbの感光
処理部2と現像処理部6との間に、感光処理後のウェハ
4を液中に浸漬させた状態で搬送するための搬送手段9
が設けられている。そして、搬送手段9には、例えば枚
葉式の液中搬送方式が採用されている。
In the second embodiment, a transport means 9 is provided between the photosensitive processing section 2 and the development processing section 6 of the photosensitive/developing processing apparatus lb for transporting the wafer 4 immersed in a liquid after the photosensitive processing.
is provided. The conveyance means 9 employs, for example, a single-wafer submerged conveyance system.

搬送手段9を構成する液槽10の内部には、例えば純水
等の液体11が収容されている。そして、液体ll中に
は、感光処理後のウェハ4を現像処理部6へ搬送する板
体12が設けられている。
A liquid tank 10 constituting the transport means 9 contains a liquid 11 such as pure water. A plate 12 is provided in the liquid 1 for transporting the wafer 4 after photosensitive processing to the development processing section 6.

板体12の内部には、中空路13が形成されている。板
体12の下部には、中空路13と連通する開孔部14が
開孔されており、この開孔部14および管路15を通じ
て図示しない液体供給源からウェハ搬送用の液体11が
中空路13の内部に供給されるようになっている。また
、板体12の上部には、液体噴出孔16が、例えば2列
を成して板体12が延在する方向に沿って複数穿孔され
ている。液体噴出孔16は、ウェハ4の搬送方向に対し
て前進方向斜め上向きに穿孔されており、この孔から噴
出されるウェハ搬送用の液体11により、ウェハ4を板
体12の上面から浮上させた状態で現像処理部6側へ搬
送するようになっている。なお、ウェハ4は、搬送ガイ
ド17および搬送がイド17のフランジ部17Hに案内
されて搬送されるようになっている。
A hollow passage 13 is formed inside the plate body 12 . An opening 14 communicating with the hollow passage 13 is formed in the lower part of the plate 12, and the liquid 11 for wafer transfer is supplied from a liquid supply source (not shown) to the hollow passage through the opening 14 and the pipe 15. It is designed to be supplied to the inside of 13. Furthermore, a plurality of liquid ejection holes 16 are formed in the upper part of the plate 12 in two rows, for example, along the direction in which the plate 12 extends. The liquid ejection hole 16 is formed diagonally upward in the advancing direction with respect to the transport direction of the wafer 4, and the wafer 4 is floated from the upper surface of the plate 12 by the liquid 11 for wafer transport ejected from this hole. In this state, it is conveyed to the development processing section 6 side. The wafer 4 is guided by the transport guide 17 and the flange portion 17H of the id 17 to be transported.

以上、このような感光・現像装置lbにおいて、感光、
現像処理を行うには、次のようにする。
As described above, in such a photosensitive/developing device lb, photosensitive,
To perform development processing, proceed as follows.

まず、感光処理後のウェハ4を液槽10内の液中に沈め
る。そして、ウェハ搬送用の液体11を管路15、開孔
部14および中空路13を経て液体噴出孔16からウェ
ハ4の搬送方向に対して前進方向斜め上向きに噴出する
。すると、この噴出力によって、ウェハ4は、板体12
の上面から浮上した状態で現像処理部6側へ移動する。
First, the wafer 4 after being exposed to light is submerged in a liquid in a liquid tank 10 . Then, the liquid 11 for wafer transport is ejected obliquely upward in the forward direction with respect to the transport direction of the wafer 4 from the liquid jet hole 16 via the pipe line 15, the opening 14, and the hollow passage 13. Then, due to this ejection force, the wafer 4 is pushed onto the plate 12.
It moves to the development processing section 6 side while floating above the upper surface.

すなわち、感光処理が施されたウェハ4を、液中に浸漬
させた状態で現像処理部6へ搬送することによって、レ
ジストの感光部分の酸化反応等を妨げてレジストパター
ンが幅広となってしまうことを防止する。このようにし
てウェハ4を現像処理部6に搬送し、そのレジストに転
写されたパターンを現像した後、そのウェハ4をキャリ
ヤ治具3Cに収容する。
That is, by conveying the photosensitive wafer 4 immersed in a liquid to the development processing section 6, the oxidation reaction of the photosensitive portion of the resist, etc. is hindered, and the resist pattern becomes wide. prevent. After the wafer 4 is thus transported to the development processing section 6 and the pattern transferred to the resist is developed, the wafer 4 is housed in the carrier jig 3C.

以上、本実施例2によれば、感光処理後のウェハ4を液
中に浸漬させた状態で現像処理部6へ搬送することによ
り、前記実施例1と同様、感光処理後のウェハ4の主面
に塗布されたレジストの酸化反応等が妨げられるため、
レジストの酸化反応に起因すると想定されるレジストパ
ターンの寸法の変動が抑制され、その寸法精度を大幅に
向上させることが可能となる。
As described above, according to the second embodiment, by transporting the wafer 4 after the photosensitive treatment to the development processing section 6 while immersed in the liquid, the main body of the wafer 4 after the photosensitive treatment is This prevents the oxidation reaction of the resist applied to the surface.
Fluctuations in the dimensions of the resist pattern, which are assumed to be caused by the oxidation reaction of the resist, are suppressed, making it possible to significantly improve the dimensional accuracy.

しかも、ウェハ4を液中に浸漬させた状態で搬送するた
め、塵埃等の異物の付着も大幅に低減することが可能と
なる。
Furthermore, since the wafer 4 is transported while immersed in the liquid, it is possible to significantly reduce the adhesion of foreign matter such as dust.

以上、本発明者によってなされた発明を実施例に基づき
具体的に説明したが、本発明は前記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。
As above, the invention made by the present inventor has been specifically explained based on Examples, but it should be noted that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Not even.

例えば、前記実施例1においては、不活性ガスを窒素ガ
スとした場合について説明したが、これに限定されるも
のではなく種々変更可能であり、例えばアルゴンガスや
ヘリウムガスでも良い。
For example, in the first embodiment, a case has been described in which the inert gas is nitrogen gas, but the inert gas is not limited to this and various changes can be made. For example, argon gas or helium gas may be used.

また、前記実施例1においては、本発明を感光処理およ
び現像処理が一貫して行われる感光・現像処理装置に適
用した場合について説明したが、これに限定されるもの
ではなく、例えば感光装置、あるいは現像装置にも適用
可能である。この際、感光装置の場合には、少なくとも
アンローダ側を不活性ガス雰囲気とすれば良い。また、
現像装置の場合には、少なくともローダ側を不活性ガス
雰囲気とすれば良い。
Further, in the first embodiment, the case where the present invention is applied to a photosensitive/development processing apparatus in which photosensitive processing and development processing are performed consistently is explained, but the present invention is not limited to this, and for example, a photosensitive apparatus, Alternatively, it can also be applied to a developing device. At this time, in the case of a photosensitive device, at least the unloader side may be provided with an inert gas atmosphere. Also,
In the case of a developing device, at least the loader side may be provided with an inert gas atmosphere.

また、前記実施例1においては、感光処理が施されてか
ら現像処理が施されるまでの間の雰囲気を不活性ガス雲
囲気とした場合について説明したが、これに限定される
ものではなく、例えば感光・現像処理装置の処理室内全
体を不活性ガス雲囲気としても良い。
Furthermore, in the first embodiment, a case was explained in which the atmosphere between the photosensitive treatment and the development treatment was an inert gas cloud, but the present invention is not limited to this. For example, the entire processing chamber of a photosensitive/developing processing apparatus may be surrounded by an inert gas cloud.

また、前記実施例2においては、液体を純水とした場合
について説明したが、これに限定されるものではなく、
例えばウェハを汚染せず、ウェハに塗布されたレジスト
と反応しない溶液ならば良い。
Further, in the second embodiment, the case where the liquid was pure water was explained, but the invention is not limited to this.
For example, any solution that does not contaminate the wafer and does not react with the resist applied to the wafer may be used.

以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野であるウェハの主面に塗布
したレジストの感光、現像処理に適用した場合について
説明したが、これに限定されず種々適用可能であり、例
えば半導体装置を製造するためのマスクの主面等に塗布
されたレジストの感光、現像処理技術に適用することも
可能である。
In the above explanation, the invention made by the present inventor was mainly applied to the field of application, which is the field of application, which is the background of the invention, which is the exposure and development of a resist coated on the main surface of a wafer. For example, it is also possible to apply the present invention to photo-sensing and developing treatment techniques for resists coated on the main surface of masks for manufacturing semiconductor devices.

〔発明の効果〕〔Effect of the invention〕

本願において開示される発明のうち、代表的なものによ
って得られる効果を簡単に説明すれば、下記のとおりで
ある。
Among the inventions disclosed in this application, the effects obtained by typical inventions are briefly described below.

すなわち、本発明によれば、感光処理後の被処理基板に
塗布されたレジストの酸化反応が妨げられるため、レジ
ストの酸化反応に起因すると想定されるレジストパター
ンの寸法の変動が抑制され、その寸法精度を大幅に向上
させることが可能となる。
That is, according to the present invention, since the oxidation reaction of the resist applied to the substrate to be processed after photosensitive treatment is prevented, the variation in the dimensions of the resist pattern that is assumed to be caused by the oxidation reaction of the resist is suppressed, and the dimensions of the resist pattern are reduced. It becomes possible to significantly improve accuracy.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例である半導体装置の製造装置
の概略断面図、 第2図は感光処理後のウェハを大気中に放置した場合と
不活性ガス雰囲気中に放置した場合とにおけるレジスト
パターン寸法の状態を比較したグラフ図、 第3図は本発明の一他の実施例である半導体装置の製造
装置をウェハの搬送方向に切断した概略断面図、 第4図は第3図の直角方向に切断した断面図、第5図は
従来の感光、現像処理工程を説明する説明図である。 1.1’a、lb・・・感光・現像処理装置(半導体装
置の製造装置)、2・・・感光処理部、3a〜3C・・
・キャリヤ治具、4・・・ウニ/X(被処理基板)、5
a・・・搬送ベルト、5b・・・回転部、6・・・現像
処理部、7・・・パージボックス、8・・・貫通孔、9
・・・搬送手段、10・・・液槽、11・・・液体、1
2・・・板体、13・・・中空路、14・・・開孔部、
15・・・管路、16・・・液体噴出孔、17・・・搬
送ガイド、17a・・・フランジ部、50・・・感光処
理部、51a〜51G・・・キャリヤ治具、52a、5
2b・・・半導体ウェハ、53・・・現像処理部。 52a 第 図
FIG. 1 is a schematic cross-sectional view of a semiconductor device manufacturing apparatus which is an embodiment of the present invention, and FIG. 2 is a diagram showing a case where a wafer after photosensitive treatment is left in the atmosphere and a case where it is left in an inert gas atmosphere. A graph comparing the states of resist pattern dimensions, FIG. 3 is a schematic cross-sectional view of a semiconductor device manufacturing apparatus according to another embodiment of the present invention, cut in the wafer transport direction, and FIG. 4 is the same as that of FIG. FIG. 5, which is a sectional view taken in the right angle direction, is an explanatory diagram illustrating the conventional photosensitive and developing processing steps. 1.1'a, lb... Photosensitive/development processing equipment (semiconductor device manufacturing equipment), 2... Photosensitive processing section, 3a to 3C...
・Carrier jig, 4...Uni/X (substrate to be processed), 5
a... Conveyor belt, 5b... Rotating section, 6... Development processing section, 7... Purge box, 8... Through hole, 9
...Transporting means, 10...Liquid tank, 11...Liquid, 1
2... Plate body, 13... Hollow path, 14... Opening part,
DESCRIPTION OF SYMBOLS 15... Pipe line, 16... Liquid ejection hole, 17... Conveyance guide, 17a... Flange part, 50... Photosensitive processing part, 51a-51G... Carrier jig, 52a, 5
2b... Semiconductor wafer, 53... Development processing section. 52a Figure

Claims (1)

【特許請求の範囲】 1、被処理基板に塗布されたフォトレジストに感光処理
を施した後、前記感光処理後の被処理基板を不活性ガス
雰囲気中に収容することを特徴とする半導体装置の製造
方法。 2、被処理基板に塗布されたフォトレジストに所定のパ
ターンを転写する感光処理部と、前記パターンを現像す
る現像処理部とを同一の処理室内に備える半導体装置の
製造装置であって、前記処理室内に感光処理後の被処理
基板を不活性ガス雰囲気中に収容する框体を設けたこと
を特徴とする半導体装置の製造装置。 3、被処理基板に塗布されたフォトレジストに所定のパ
ターンを転写する感光処理部と、前記パターンを現像す
る現像処理部とを同一の処理室内に備える半導体装置の
製造装置であって、前記処理室内を不活性ガス雰囲気と
したことを特徴とする半導体装置の製造装置。 4、被処理基板に塗布されたフォトレジストに所定のパ
ターンを転写する感光処理部を処理室内に備える半導体
装置の製造装置であって、前記処理室内に、少なくとも
感光処理後の被処理基板を不活性ガス雰囲気中に収容す
る框体を設けたことを特徴とする半導体装置の製造装置
。 5、感光処理を施した後の被処理基板のフォトレジスト
に転写された所定のパターンを現像する現像処理部を処
理室内に備える半導体装置の製造装置であって、前記処
理室内に、少なくとも現像処理前の被処理基板を不活性
雰囲気中に収容する框体を設けたことを特徴とする半導
体装置の製造装置。 6、被処理基板に塗布されたフォトレジストに感光処理
を施した後、その被処理基板を液中に浸漬させた状態で
次の処理部へ搬送することを特徴とする半導体装置の製
造方法。 7、被処理基板に塗布されたフォトレジストに所定のパ
ターンを転写する感光処理部と、前記パターンを現像す
る現像処理部とを備える半導体装置の製造装置であって
、前記感光処理部から現像処理部への被処理基板の搬送
路に、感光処理後の被処理基板を液中に浸漬させた状態
で搬送する搬送手段を設けたことを特徴とする半導体装
置の製造装置。
[Claims] 1. A semiconductor device characterized in that, after photoresist applied to a substrate to be processed is exposed to light, the substrate to be processed after the exposure treatment is housed in an inert gas atmosphere. Production method. 2. A semiconductor device manufacturing apparatus comprising a photosensitive processing section that transfers a predetermined pattern onto a photoresist coated on a substrate to be processed and a development processing section that develops the pattern in the same processing chamber, wherein the processing 1. An apparatus for manufacturing a semiconductor device, characterized in that a frame is provided in a room to house a substrate to be processed after photosensitive processing in an inert gas atmosphere. 3. A semiconductor device manufacturing apparatus comprising a photosensitive processing section that transfers a predetermined pattern onto a photoresist applied to a substrate to be processed and a development processing section that develops the pattern in the same processing chamber, wherein the processing A semiconductor device manufacturing device characterized by having an inert gas atmosphere inside the room. 4. A semiconductor device manufacturing apparatus comprising a photosensitive processing section in a processing chamber for transferring a predetermined pattern onto a photoresist coated on a substrate to be processed, wherein at least the substrate to be processed after photosensitive processing is not placed in the processing chamber. An apparatus for manufacturing a semiconductor device, characterized in that it is provided with a frame housed in an active gas atmosphere. 5. A semiconductor device manufacturing apparatus comprising a development processing section in a processing chamber for developing a predetermined pattern transferred to a photoresist of a substrate to be processed after photosensitive processing, wherein at least a development processing section is provided in the processing chamber. 1. A semiconductor device manufacturing apparatus, comprising a frame for accommodating a previous substrate to be processed in an inert atmosphere. 6. A method for manufacturing a semiconductor device, which comprises subjecting a photoresist applied to a substrate to be processed to a photosensitive process, and then transporting the substrate to the next processing section while immersed in a liquid. 7. A semiconductor device manufacturing apparatus comprising a photosensitive processing section that transfers a predetermined pattern to a photoresist coated on a substrate to be processed, and a development processing section that develops the pattern, wherein the development processing is performed from the photosensitive processing section. 1. An apparatus for manufacturing a semiconductor device, characterized in that a transporting means for transporting a substrate to be processed after photosensitive treatment while being immersed in a liquid is provided on a transport path for the substrate to be processed to the substrate.
JP1251897A 1989-09-29 1989-09-29 Manufacture of semiconductor device and device therefor Pending JPH03116819A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1251897A JPH03116819A (en) 1989-09-29 1989-09-29 Manufacture of semiconductor device and device therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1251897A JPH03116819A (en) 1989-09-29 1989-09-29 Manufacture of semiconductor device and device therefor

Publications (1)

Publication Number Publication Date
JPH03116819A true JPH03116819A (en) 1991-05-17

Family

ID=17229580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1251897A Pending JPH03116819A (en) 1989-09-29 1989-09-29 Manufacture of semiconductor device and device therefor

Country Status (1)

Country Link
JP (1) JPH03116819A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03246930A (en) * 1990-02-26 1991-11-05 Nec Corp Aligner/developer for photosensitive organic coating film
JPH06140299A (en) * 1992-10-27 1994-05-20 Matsushita Electric Ind Co Ltd Pattern forming method
US9480518B2 (en) 2009-07-01 2016-11-01 Biedermann Technologies Gmbh & Co. Kg Instruments for use with a bone anchor with plug member

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03246930A (en) * 1990-02-26 1991-11-05 Nec Corp Aligner/developer for photosensitive organic coating film
JPH06140299A (en) * 1992-10-27 1994-05-20 Matsushita Electric Ind Co Ltd Pattern forming method
US9480518B2 (en) 2009-07-01 2016-11-01 Biedermann Technologies Gmbh & Co. Kg Instruments for use with a bone anchor with plug member

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