JPS5917016U - bias oscillation circuit - Google Patents
bias oscillation circuitInfo
- Publication number
- JPS5917016U JPS5917016U JP10969682U JP10969682U JPS5917016U JP S5917016 U JPS5917016 U JP S5917016U JP 10969682 U JP10969682 U JP 10969682U JP 10969682 U JP10969682 U JP 10969682U JP S5917016 U JPS5917016 U JP S5917016U
- Authority
- JP
- Japan
- Prior art keywords
- oscillation circuit
- bias
- circuit
- bias oscillation
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のバイアス発振回路の一構成例を示す回路
図、第２図は従来のバイアス発振回路の他の構成例を示
す回路図、第３図はこの考案の一実施例の構成を示す回
路図である。
６・・・発振回路（反結合形発振回路）、９・・・記録
ヘッド、１０・・・消去ヘッド、２３・・・逓倍回路、
３４・・・増幅回路。Figure 1 is a circuit diagram showing an example of the configuration of a conventional bias oscillation circuit, Figure 2 is a circuit diagram showing another example of the configuration of a conventional bias oscillation circuit, and Figure 3 is a circuit diagram showing an example of the configuration of an embodiment of this invention. FIG. 6... Oscillation circuit (anti-coupling type oscillation circuit), 9... Recording head, 10... Erasing head, 23... Multiplier circuit,
34...Amplification circuit.
Claims (1)
る逓倍回路とを各々設け、前記発振回路の出力信号を消
去信号として消去ヘッドへ供給し、前記逓倍回路の出力
信号をバイアス信号として記録ヘッドへ供給するように
構成したことを特徴とするバイアス発振回路。An oscillation circuit and a multiplier circuit for multiplying the frequency of the output signal of the oscillation circuit are respectively provided, the output signal of the oscillation circuit is supplied as an erase signal to the erase head, and the output signal of the multiplier circuit is supplied as a bias signal to the recording head. A bias oscillation circuit characterized in that it is configured to supply a voltage to a bias oscillation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10969682U JPS5917016U (en) | 1982-07-20 | 1982-07-20 | bias oscillation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10969682U JPS5917016U (en) | 1982-07-20 | 1982-07-20 | bias oscillation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5917016U true JPS5917016U (en) | 1984-02-01 |
Family
ID=30255428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10969682U Pending JPS5917016U (en) | 1982-07-20 | 1982-07-20 | bias oscillation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5917016U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59179430A (en) * | 1983-03-28 | 1984-10-12 | Kojima Press Co Ltd | Housing box for vehicle |
| JPS6194204A (en) * | 1984-10-16 | 1986-05-13 | Matsushita Electric Ind Co Ltd | Magnetic recording circuit |
-
1982
- 1982-07-20 JP JP10969682U patent/JPS5917016U/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59179430A (en) * | 1983-03-28 | 1984-10-12 | Kojima Press Co Ltd | Housing box for vehicle |
| JPH0459176B2 (en) * | 1983-03-28 | 1992-09-21 | Kojima Press Kogyo Kk | |
| JPS6194204A (en) * | 1984-10-16 | 1986-05-13 | Matsushita Electric Ind Co Ltd | Magnetic recording circuit |
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