JPS5843696U - Beat erasure circuit for magnetic recording/playback device with radio receiver - Google Patents

Beat erasure circuit for magnetic recording/playback device with radio receiver

Info

Publication number
JPS5843696U
JPS5843696U JP13861481U JP13861481U JPS5843696U JP S5843696 U JPS5843696 U JP S5843696U JP 13861481 U JP13861481 U JP 13861481U JP 13861481 U JP13861481 U JP 13861481U JP S5843696 U JPS5843696 U JP S5843696U
Authority
JP
Japan
Prior art keywords
beat
magnetic recording
radio receiver
playback device
control means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13861481U
Other languages
Japanese (ja)
Inventor
裕司 加藤
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP13861481U priority Critical patent/JPS5843696U/en
Publication of JPS5843696U publication Critical patent/JPS5843696U/en
Pending legal-status Critical Current

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  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の磁気記録再生装置におけるビート消去回
路の電気的結線図、第2図は本考案に係る磁気記録再生
装置におけるビート消去回路の一実施例を示す電気的結
線図である。 11:バイアス発振回路、12. 13:スイッチ、1
4:消去ヘッド、15:録音ヘッド、RA:抵抗、CA
:コンデンサ。
FIG. 1 is an electrical wiring diagram of a beat erasing circuit in a conventional magnetic recording/reproducing apparatus, and FIG. 2 is an electrical wiring diagram showing an embodiment of the beat erasing circuit in a magnetic recording/reproducing apparatus according to the present invention. 11: Bias oscillation circuit, 12. 13: Switch, 1
4: Erasing head, 15: Recording head, RA: Resistor, CA
: Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力側を電源に接続され出力側を録音ヘッド及び消去ヘ
ッドに接続されたバイアス発振回路、該バイアス発振回
路の入力側には入力電流を制御する電流制御手段を設け
る一方出力側にはバイアス発振周波数をシフトする周波
数制御手段を設け、かつ。、これら電流並に周波数制御
手段を連動する構成とした事を特徴とするラジオ受信機
付磁気録音再生装置のビート消去回路。
A bias oscillation circuit whose input side is connected to a power supply and whose output side is connected to a recording head and an erasing head.The input side of the bias oscillation circuit is provided with current control means for controlling the input current, while the output side is provided with a bias oscillation frequency. and frequency control means for shifting the frequency. A beat erasing circuit for a magnetic recording and reproducing device with a radio receiver is characterized in that the current and frequency control means are interlocked.
JP13861481U 1981-09-17 1981-09-17 Beat erasure circuit for magnetic recording/playback device with radio receiver Pending JPS5843696U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13861481U JPS5843696U (en) 1981-09-17 1981-09-17 Beat erasure circuit for magnetic recording/playback device with radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13861481U JPS5843696U (en) 1981-09-17 1981-09-17 Beat erasure circuit for magnetic recording/playback device with radio receiver

Publications (1)

Publication Number Publication Date
JPS5843696U true JPS5843696U (en) 1983-03-24

Family

ID=29931835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13861481U Pending JPS5843696U (en) 1981-09-17 1981-09-17 Beat erasure circuit for magnetic recording/playback device with radio receiver

Country Status (1)

Country Link
JP (1) JPS5843696U (en)

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