JPS5928810U - Oscillation circuit for erasing tape recorder - Google Patents
Oscillation circuit for erasing tape recorderInfo
- Publication number
- JPS5928810U JPS5928810U JP12281582U JP12281582U JPS5928810U JP S5928810 U JPS5928810 U JP S5928810U JP 12281582 U JP12281582 U JP 12281582U JP 12281582 U JP12281582 U JP 12281582U JP S5928810 U JPS5928810 U JP S5928810U
- Authority
- JP
- Japan
- Prior art keywords
- tape recorder
- oscillation circuit
- power switch
- erasing tape
- erasing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 title claims description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000005389 magnetism Effects 0.000 description 1
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図、第２図はテープと磁気ヘッドの関係を示した図
、第３図、第４図は従来のテープレコーダの消去用発振
回路の接続図、第５図は本考案の一実施例におけるテー
プレコーダの消去用発振回路の接続図、第６図は消去ヘ
ッドより発生する磁気の様子を示す特性図である。
４・・・・・・消去ヘッド、５・・・・・・消去用発振
回路、７・・・・・・小電流用の電源スィッチ、８・・
・・・・遅延回路。Figures 1 and 2 are diagrams showing the relationship between the tape and the magnetic head, Figures 3 and 4 are connection diagrams of the erasing oscillation circuit of a conventional tape recorder, and Figure 5 is an embodiment of the present invention. FIG. 6 is a connection diagram of an erasing oscillation circuit of a tape recorder, and FIG. 6 is a characteristic diagram showing the state of magnetism generated from an erasing head. 4... Erasing head, 5... Erasing oscillation circuit, 7... Power switch for small current, 8...
...Delay circuit.
Claims (1)
がオンした時のラッシュ電流を制限し、かつ上記電源ス
ィッチがオフした時の発振停止を遅延させる遅延回路を
接続したことを特徴とするテープレコーダの消去用発振
回路。A tape recorder, characterized in that a delay circuit is connected to the oscillator side of a small current power switch to limit the rush current when the power switch is turned on, and to delay the stop of oscillation when the power switch is turned off. oscillation circuit for erasure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12281582U JPS5928810U (en) | 1982-08-12 | 1982-08-12 | Oscillation circuit for erasing tape recorder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12281582U JPS5928810U (en) | 1982-08-12 | 1982-08-12 | Oscillation circuit for erasing tape recorder |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5928810U true JPS5928810U (en) | 1984-02-22 |
Family
ID=30280580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12281582U Pending JPS5928810U (en) | 1982-08-12 | 1982-08-12 | Oscillation circuit for erasing tape recorder |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5928810U (en) |
-
1982
- 1982-08-12 JP JP12281582U patent/JPS5928810U/en active Pending
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