JPS6093109U - recording circuit - Google Patents

recording circuit

Info

Publication number
JPS6093109U
JPS6093109U JP18549483U JP18549483U JPS6093109U JP S6093109 U JPS6093109 U JP S6093109U JP 18549483 U JP18549483 U JP 18549483U JP 18549483 U JP18549483 U JP 18549483U JP S6093109 U JPS6093109 U JP S6093109U
Authority
JP
Japan
Prior art keywords
circuit
recording
bias
recording circuit
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18549483U
Other languages
Japanese (ja)
Inventor
菊池 隆治
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP18549483U priority Critical patent/JPS6093109U/en
Publication of JPS6093109U publication Critical patent/JPS6093109U/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案め一実施例を示す回路構成図である。 1・・・・・・録音アンプ、2・・・・・・録音ヘッド
、3・・・・・・バイアス発振回路、4・・・・・・バ
イアス電流調整ボリウム、5・・・・・・バイアストラ
ップ回路、6・・・・・・消去ヘッド、7・・・・・・
整流回路、8・・・・・・定電圧回路。
The drawing is a circuit configuration diagram showing one embodiment of the present invention. 1... Recording amplifier, 2... Recording head, 3... Bias oscillation circuit, 4... Bias current adjustment volume, 5... Bias trap circuit, 6... Erase head, 7...
Rectifier circuit, 8... Constant voltage circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 録音アンプよりの出力にバイアス発振回路からのバイア
ス電流を加えて録音ヘッドに供給するものにおいて、上
記バイアス発振回路の発振電圧を整流回路に与えて直流
変換し、これを定電圧回路を介して上記録音アンプの電
源として供給するように構成したことを特徴とする録音
回路。
In a device that adds a bias current from a bias oscillation circuit to the output from a recording amplifier and supplies it to the recording head, the oscillation voltage of the bias oscillation circuit is applied to a rectifier circuit to convert it into DC, and then it is converted to DC via a constant voltage circuit. A recording circuit configured to supply power to a recording amplifier.
JP18549483U 1983-11-30 1983-11-30 recording circuit Pending JPS6093109U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18549483U JPS6093109U (en) 1983-11-30 1983-11-30 recording circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18549483U JPS6093109U (en) 1983-11-30 1983-11-30 recording circuit

Publications (1)

Publication Number Publication Date
JPS6093109U true JPS6093109U (en) 1985-06-25

Family

ID=30400911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18549483U Pending JPS6093109U (en) 1983-11-30 1983-11-30 recording circuit

Country Status (1)

Country Link
JP (1) JPS6093109U (en)

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