JPS59161082A - Semiconductor light-receptor - Google Patents

Semiconductor light-receptor

Info

Publication number
JPS59161082A
JPS59161082A JP58035159A JP3515983A JPS59161082A JP S59161082 A JPS59161082 A JP S59161082A JP 58035159 A JP58035159 A JP 58035159A JP 3515983 A JP3515983 A JP 3515983A JP S59161082 A JPS59161082 A JP S59161082A
Authority
JP
Japan
Prior art keywords
layer
multiplication
absorption layer
light absorption
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58035159A
Other languages
Japanese (ja)
Inventor
Tsugunori Takahashi
鷹箸 継典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58035159A priority Critical patent/JPS59161082A/en
Publication of JPS59161082A publication Critical patent/JPS59161082A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To eliminate a sudden change in a composition in the hetero-interface constituted by a buffer layer and an optical absorption layer, and to prevent the deterioration of light-receiving characteristics by interposing an intermediate layer between the optical absorption layer and a multiplication layer on interposing the intermediate layer on the side reverse to the side where the optical absorption layer and the multiplication layer are in contact or between the multiplication layer and a semiconductor substrate. CONSTITUTION:The semiconductor light-receptor differs from conventional devices in a point where an intermediate layer 9 is interposed between a buffer layer 2 and an optical absorption layer 3. The intermediate layer 9 has a composition intermediating between the buffer layer 2 and the optical absorption layer 3. A phenomenon in which a nuclear hetero-interface has photo sensitivity is not generated even when a depletion layer reaches to the hetero-interface because a sudden change in the hetero-interface by the buffer layer 2 and the optical absorption layer 3 is relaxed owing to the presence of the intermediate layer 9.

Description

【発明の詳細な説明】 発明の技術分野 本発明は、光を吸収してキャリヤを発生する光吸収部と
光励起されたキャリヤを増倍する増倍部とが分離された
半導体へテロ接合構造なだれ増倍受光素子(separ
ated  absorptton  multipl
ication−avalanche  photo 
 diode:SAM−APD)と呼ばれる半導体受光
装置の改良に関する。
Detailed Description of the Invention Technical Field of the Invention The present invention relates to a semiconductor heterojunction structure avalanche in which a light absorption section that absorbs light and generates carriers and a multiplication section that multiplies the optically excited carriers are separated. Multiplying photodetector (separ)
ated absorptton multipl
cation-avalanche photo
This invention relates to an improvement of a semiconductor light receiving device called diode (SAM-APD).

従来技術と問題点 第1図はSAM−APDの従来例を表わす要部切断側面
図である。
PRIOR ART AND PROBLEMS FIG. 1 is a cutaway side view of essential parts showing a conventional example of a SAM-APD.

図に於いて、1はn+型基板、2はn型バッファ層、3
はn型光吸収層、4はn型増倍層(ウィンドウ層)、5
はp塑成いはp+型不純物導入領域、6はp側電極、7
はn側電極をそれぞれ示している。尚、GaAs−Ga
AlAs系の場合、基板1としてはGaAs、バッファ
層2としてはGaAlAs、光吸収層3としてはQa 
、A s、増倍層4としてはGaAlAsをそれぞれ用
い、また、InP−1nGaAs  (P)系の場合、
基板1としてはInP、バッファ層2としてはInP、
光吸収層3としてはI nGaAs  (P) 、増倍
N4としてはInPをそれぞれ用いる。
In the figure, 1 is an n+ type substrate, 2 is an n-type buffer layer, and 3
is an n-type light absorption layer, 4 is an n-type multiplication layer (window layer), and 5 is an n-type light absorption layer.
is p-plastic or p+ type impurity introduced region, 6 is p-side electrode, 7 is
indicates the n-side electrode, respectively. In addition, GaAs-Ga
In the case of AlAs, the substrate 1 is GaAs, the buffer layer 2 is GaAlAs, and the light absorption layer 3 is Qa.
, As, and GaAlAs are used as the multiplication layer 4, and in the case of InP-1nGaAs (P) system,
InP as the substrate 1, InP as the buffer layer 2,
InGaAs (P) is used as the light absorption layer 3, and InP is used as the multiplication layer N4.

図示例に於いて、p+型不純物導入領域5はn型増倍N
4にp型不純物を拡散するか、或いは、p型不純物イオ
ンを打ち込む等して形成され、また、ヘテ凸接合を形成
する各層の組成は、エネルギ・バンド・ギャップが、 Eg (3)<Eg (4)、Eg (2)となるよう
に選択される。
In the illustrated example, the p + type impurity doped region 5 is an n type multiplication N
4 by diffusing p-type impurities or implanting p-type impurity ions, and the composition of each layer forming the heteroconvex junction has an energy band gap such that Eg (3)<Eg (4), Eg (2).

さて、この従来例に於いては、特定波長の光がn型光吸
収層3で吸収され、それに依りキャリヤが励起される。
Now, in this conventional example, light of a specific wavelength is absorbed by the n-type light absorption layer 3, thereby exciting carriers.

そのキャリヤは、電極6及び7に印加された逆バイアス
電圧でn型増倍層4及びp型不純物導入領域5のpn接
合から延び出た高電界空乏層内で加速され、衝突イオン
化現象でなだれ増倍されるものである。
The carriers are accelerated in the high electric field depletion layer extending from the pn junction of the n-type multiplication layer 4 and the p-type impurity-introduced region 5 by the reverse bias voltage applied to the electrodes 6 and 7, and avalanche due to the impact ionization phenomenon. It is something that is multiplied.

第2図は他の従来例を表わす要部切断側面図である。FIG. 2 is a cutaway side view of main parts showing another conventional example.

この従来例が、第1図について説明した従来例と相違す
る点は、光吸収層3と増倍層4との間にエネルギ・バン
ド・ギャップEgがEg (4)とEg (3)との中
間に在り、且つ、光吸収層3及び増倍層4とに充分に格
子整合した薄い中間層8を介在させたことである。中間
層8の材料としては、InP−1nGaAs系であれは
I nGaAsPの光吸収層3及びInPの増倍層4に
格子整合し且つそのエネルギ・ハンド・ギャップが光吸
収層3より大きい組成のInGaAsPを使用している
The difference between this conventional example and the conventional example explained with reference to FIG. 1 is that the energy band gap Eg between the light absorption layer 3 and the multiplication layer 4 is This is because a thin intermediate layer 8 which is located in the middle and has sufficient lattice matching with the light absorption layer 3 and the multiplication layer 4 is interposed. The material for the intermediate layer 8 is InP-1nGaAs, which is InGaAsP having a composition that is lattice matched to the InGaAsP light absorption layer 3 and the InP multiplication layer 4 and whose energy hand gap is larger than that of the InP light absorption layer 3. are using.

このような中間層8を設けると、半導体受光装置の周波
数特性か著しく改善される旨報告されている。その理由
としては、中間層8を介在させることに依り、第1図に
見られる従来例に於けるヘテロ障壁(エネルギ障壁)の
大きさが2分割されて、結果的に少数キャリヤ、ここで
はホールが障壁を越え易くなる為と考えられる。
It has been reported that the provision of such an intermediate layer 8 significantly improves the frequency characteristics of a semiconductor light receiving device. The reason for this is that by interposing the intermediate layer 8, the size of the hetero barrier (energy barrier) in the conventional example shown in FIG. 1 is divided into two, resulting in minority carriers, in this case holes. This is thought to be because it becomes easier for people to cross the barrier.

ところで、前記二つの従来例では勿論、他の従来技術で
も、バッファ層2と光吸収層3とで構成されるヘテロ界
面に於ける問題に関しては全く考慮がなされていない。
By the way, in the above-mentioned two conventional examples as well as in other conventional techniques, no consideration is given at all to the problem at the hetero interface constituted by the buffer layer 2 and the light absorption layer 3.

本発明者の知見に依れば、電極6及び7間に印加される
逆バイアス電圧が充分に大きくなって、空乏層がバッフ
ァ層2と光吸収層3とで構成されるヘテロ界面に到達す
ると、そのヘテロ界面に沿った広い領域に亙り光感度を
有するようになり、受光特性は著しく阻害されることが
判っている。
According to the findings of the present inventor, when the reverse bias voltage applied between the electrodes 6 and 7 becomes sufficiently large and the depletion layer reaches the hetero interface composed of the buffer layer 2 and the light absorption layer 3, , it has been found that the light-receiving characteristics are significantly inhibited because the light-sensitivity occurs over a wide region along the hetero-interface.

この理由は、種□々の実験の結果、バッファ層2と光吸
収層3のへテロ界面に於ける組成の急激な変化、即ち、
不連続性が災しているものと判断されている。
The reason for this is that, as a result of various experiments, there is a sudden change in the composition at the hetero interface between the buffer layer 2 and the light absorption layer 3, that is,
It has been determined that discontinuity is the problem.

発明の目的 本発明は、ヘテロ接合構造を有し、且つ、なたれ増倍を
利用する半導体受光装置に於いて、バッファ層と光吸収
層とで構成されるヘテロ界面に於ける組成の急激な変化
を解消し、受光特性の劣化を防止しようとするものであ
る。
Purpose of the Invention The present invention provides a semiconductor light receiving device that has a heterojunction structure and utilizes sag multiplication, in which a sudden change in composition at a heterointerface consisting of a buffer layer and a light absorption layer is achieved. This is intended to eliminate the change and prevent deterioration of the light receiving characteristics.

発明の構成 本発明では、第2図に関して説明した従来例に見られる
中間層8と同様な中間層をバッファ層と光吸収層との間
にも形成している。
Structure of the Invention In the present invention, an intermediate layer similar to the intermediate layer 8 seen in the conventional example explained with reference to FIG. 2 is also formed between the buffer layer and the light absorption layer.

第3図は本発明に依る半導体受光装置の構造を表わす要
部切断側面図であり、第2図に関して説明した部分と同
部分は同記号で指示しである。
FIG. 3 is a cross-sectional side view of essential parts showing the structure of the semiconductor light receiving device according to the present invention, and the same parts as those explained in connection with FIG. 2 are indicated by the same symbols.

この半導体受光装置が第2図に見られる従来例と相違す
る点は、バッファ層2と光吸収層3との間に中間層9が
介在していることである。
This semiconductor light receiving device differs from the conventional example shown in FIG. 2 in that an intermediate layer 9 is interposed between the buffer layer 2 and the light absorption layer 3.

この中間層9はへソファ層2と光吸収層3との中間の組
成を有していることは云うまでもない。
It goes without saying that this intermediate layer 9 has a composition intermediate between that of the hesophagus layer 2 and the light absorption layer 3.

そして、この中間層9の存在で、バッファ層2と光吸収
層3とに依るヘテロ界面に於ける急激な変化は緩和され
、従って、空乏層が該へテロ界面に到達するようなこと
かあっても、そのヘテロ界面が光感度を有するようにな
る現象は発生ずることがない。
The presence of this intermediate layer 9 alleviates the sudden change at the hetero interface between the buffer layer 2 and the light absorption layer 3, and therefore prevents the depletion layer from reaching the hetero interface. However, the phenomenon that the hetero-interface becomes photosensitive never occurs.

発明の実施例 第3図に見られる構成を採って、InP−IndaAs
系のSAM−APDを作製したところ、波長1.6〔μ
m〕の光に対し、増倍数M−30(0,9V、B 、 
VB =60 ’(V) ) 、周波数応答1、6 (
GHz)  (−3(dB) )である高性能な半導体
受光装置を得ることができた。
Embodiment of the Invention Adopting the configuration shown in FIG. 3, InP-IndaAs
When we fabricated a SAM-APD system, we found that the wavelength was 1.6 [μ
m], the multiplication number M-30 (0.9V, B,
VB = 60' (V)), frequency response 1, 6 (
GHz) (-3(dB)).

その仕様は次の通りである。尚、記号は図示の記号と同
一である。
Its specifications are as follows. Note that the symbols are the same as those shown in the drawings.

記号 1 半導体:n+型1nP 結晶軸:  <111>A 厚さ:100(μm〕 キャリヤ濃度:’ n = I X 1016(cm−
3)2 半導体Zn型1nP 厚さ:a、O〔μm〕 キャリヤ濃度: n= I X 10” (cm−3)
3 半導体:n型1 n G a A’ sエネルギ・
バンド・ギャップ(波長換算):/1g=1.6  C
μ埠〕 厚さ:2.0Cμm〕 キャリヤ濃度: n=5・X 10”  [cm−3)
4 半導体:n型1nP 厚さ:2.0(μm〕 キャリヤ濃度: n−I X 10 ” (cm−”)
5 半導体;p+型1nP 不純物:Cd 深さ:1 〔μm〕 6 材料:Au−Zn 厚さ:2000  (人〕 7 材料:Au−Ge−Ni 厚さ[000(人〕 8 半導体Zn型1 nGaAs p エネルギ・バンド・ギャップ(波長換算):λg=1.
3cμm〕 厚さ:0.3Cμm〕 キャリヤ濃度: n = 5 X 101S(cm=)
9 半導体:n型1nGaAsP エネルギ・バンド・ギャップ(波長換算):λg=1,
3(μm〕 厚゛さ :、0.3Cμm〕 キャリヤ濃度: n = I X 1 ’OI6(am
−3)発明の効果 本発明の半導体受光装置では、光吸収層と増倍層との間
に該光吸収層と該増倍層との中間の組成を持つ中間層を
介在させ、また、前記光吸収層とその光吸収層に於ける
前記増倍層が接している側と反対側に接している半導体
層或いは半導体基板との間に該光吸収層と該半導体層或
いは半導体基板との中間の組成を有する中間層を介在さ
せであるので、ヘテロ接合界面に於ける急激な変化はな
くなり、特に、従来、前記光吸収層と前記半導体層或い
は半導体基板とで形成されるヘテロ接合界面に空乏層が
到達した際、光感度を持つ面か発生していた現象は皆無
とすることが出来るので受光特性の劣化を防止すること
ができる。
Symbol 1 Semiconductor: n+ type 1nP Crystal axis: <111>A Thickness: 100 (μm) Carrier concentration: ' n = I x 1016 (cm-
3) 2 Semiconductor Zn type 1nP Thickness: a, O [μm] Carrier concentration: n = I x 10” (cm-3)
3 Semiconductor: n-type 1 n Ga A's energy
Band gap (wavelength conversion): /1g=1.6C
μ-bu〕 Thickness: 2.0Cμm〕 Carrier concentration: n=5・X 10” [cm-3)
4 Semiconductor: n-type 1nP Thickness: 2.0 (μm) Carrier concentration: n-I x 10''(cm-'')
5 Semiconductor; p+ type 1nP Impurity: Cd Depth: 1 [μm] 6 Material: Au-Zn Thickness: 2000 (people) 7 Material: Au-Ge-Ni Thickness [000 (people)] 8 Semiconductor Zn type 1 nGaAs p Energy band gap (wavelength conversion): λg=1.
3cμm] Thickness: 0.3Cμm] Carrier concentration: n = 5 x 101S (cm =)
9 Semiconductor: n-type 1nGaAsP Energy band gap (wavelength conversion): λg=1,
3 (μm) Thickness:, 0.3Cμm] Carrier concentration: n = I
-3) Effects of the invention In the semiconductor light receiving device of the present invention, an intermediate layer having a composition intermediate between the light absorption layer and the multiplication layer is interposed between the light absorption layer and the multiplication layer, and Between the light absorption layer and the semiconductor layer or semiconductor substrate that is in contact with the side of the light absorption layer that is in contact with the multiplication layer and the opposite side; Since there is an intermediate layer having a composition of When the layer reaches the layer, the phenomenon that occurs on the surface with photosensitivity can be completely eliminated, so deterioration of the light-receiving characteristics can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来例を説明する為の半導体受光装
置の要部切断側面図、第3図は本発明を説明する為の半
導体受光装置の要部切断側面図である。 図に於いて、1はn+型基板、2はn型ハソファ層、3
はn型光吸収層、4はn型増倍層(ウィンドウ層)、5
はpギ酸いはp+型不純物導入領域、6はp側電極、7
はn側電極、8及び9は中間層である。
1 and 2 are cross-sectional side views of essential parts of a semiconductor light-receiving device for explaining a conventional example, and FIG. 3 is a cross-sectional side view of main parts of a semiconductor light-receiving device for explaining the present invention. In the figure, 1 is an n+ type substrate, 2 is an n-type haphazard layer, and 3
is an n-type light absorption layer, 4 is an n-type multiplication layer (window layer), and 5 is an n-type light absorption layer.
is a p-formic acid or p+ type impurity-introduced region, 6 is a p-side electrode, 7
is an n-side electrode, and 8 and 9 are intermediate layers.

Claims (1)

【特許請求の範囲】[Claims] 光を吸収してキャリヤを発生する光吸収層とその光励起
されたキャリヤを増倍する増倍層とが分離されている半
導体へテロ接合構造を有するなだれ増倍型半導体受光装
置に於いて、前記光吸収層と前記増倍層との間に形成さ
れ該光吸収層と該増倍層との中間の組成を持つ中間層、
該光吸収層に於ける前記増倍層が接している側と反対側
に接している半導体層(或いは半導体基板)との間に形
成され該光吸収層と該反対側に接している半導体層(或
いは半導体基板)との中間の組成を持つ中間層を備えて
なることを特徴とする半導体受光装置。
In the avalanche multiplication type semiconductor light receiving device having a semiconductor heterojunction structure in which a light absorption layer that absorbs light and generates carriers and a multiplication layer that multiplies the light-excited carriers are separated, an intermediate layer formed between the light absorption layer and the multiplication layer and having a composition intermediate between that of the light absorption layer and the multiplication layer;
A semiconductor layer formed between the side of the light absorption layer that is in contact with the multiplication layer and a semiconductor layer (or semiconductor substrate) that is in contact with the opposite side, and that is in contact with the light absorption layer and the opposite side. (or a semiconductor substrate).
JP58035159A 1983-03-03 1983-03-03 Semiconductor light-receptor Pending JPS59161082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58035159A JPS59161082A (en) 1983-03-03 1983-03-03 Semiconductor light-receptor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58035159A JPS59161082A (en) 1983-03-03 1983-03-03 Semiconductor light-receptor

Publications (1)

Publication Number Publication Date
JPS59161082A true JPS59161082A (en) 1984-09-11

Family

ID=12434095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58035159A Pending JPS59161082A (en) 1983-03-03 1983-03-03 Semiconductor light-receptor

Country Status (1)

Country Link
JP (1) JPS59161082A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61265876A (en) * 1985-05-20 1986-11-25 Nec Corp Planar type hetero junction semiconductor photodetector
JPS61267375A (en) * 1985-05-21 1986-11-26 Nec Corp Planar type hetero junction semiconductor photodetector
JPH02228080A (en) * 1989-02-28 1990-09-11 Furukawa Electric Co Ltd:The Semiconductor photodetector
JPH036871A (en) * 1989-06-02 1991-01-14 Mitsubishi Electric Corp Photodetecting element
US7368750B2 (en) * 2002-09-20 2008-05-06 Fujitsu Quantum Devices Limited Semiconductor light-receiving device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61265876A (en) * 1985-05-20 1986-11-25 Nec Corp Planar type hetero junction semiconductor photodetector
JPS61267375A (en) * 1985-05-21 1986-11-26 Nec Corp Planar type hetero junction semiconductor photodetector
JPH02228080A (en) * 1989-02-28 1990-09-11 Furukawa Electric Co Ltd:The Semiconductor photodetector
JPH036871A (en) * 1989-06-02 1991-01-14 Mitsubishi Electric Corp Photodetecting element
US7368750B2 (en) * 2002-09-20 2008-05-06 Fujitsu Quantum Devices Limited Semiconductor light-receiving device

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