JPH036871A - Photodetecting element - Google Patents

Abstract

PURPOSE:To obtain a photodetecting element which can realize a high speed operation and has a voltage for avalanche multiplying operation sufficiently low by a method wherein the thickness and carrier concentration of a P<->-type AlInAs multiplying layer are specified and a carrier accelerating layer having a composition middle of a light absorbing layer and a P<->-type AlInAs layer is formed between those two layers. CONSTITUTION:The thickness and carrier concentration of a P<->-type AlInAs multiplying layer 6 are 0.17-0.25mum and not layer than 2X10<15>cm<-3> respectively. An incident light is absorbed by a light absorbing layer 2 and produced electron-hole pairs. Electrons are accelerated toward an n<+>-type AlInAs layer 7 by the electric field of the depletion layer of an n-p junction extending from the P<->-type AlInAs multiplying layer 6 to the light absorbing layer 2 through a P<+>-type AlInAs layer 5, a P<->-type AlInAs layer 4 and a carrier acceleration layer 3 and detected as a current produced by light absorption. If electric field at respective junctions are small enough not to increase tunnel current and, at the same time, large enough not to create accumulation of electrons in the respective junctions and, further, the electric field in the n-p junction is large enough to create avalanche breakdown, new electron-hole pairs are produced by teh avalanche breakdown and the photocurrent is multiplied.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a photodetection element, and particularly to high-speed operation and reduction in operating voltage of an avalanche multiplication photodiode.

[Conventional technology]

FIG. 3 shows, for example, Appl Phys Lett Vo
1, 45.1984 p968-970, in which 1 is a p''-InP substrate and 2 is a p-1nGaAs substrate.
Light absorption layer, 4 is p--All InAs layer, 5 is p''
-AILInAs layer, 7 is n''-A, j2InAs layer, 8 is p-side electrode, 9 is n-side electrode, 10 is p--An I
The nAs multiplication layer has a layer thickness of 1 μm.

Next, the operation will be explained.

Light incident from the upper side of the figure is absorbed by the light absorption layer 2 and generates electron-hole pairs, but the p--AJZInAs multiplication layer 1
0 to p''-All I nAs layer °5 and p--
Due to the electric field in the depletion region of the n-p junction extending through the All I nAs layer 4 to the light absorption layer 2, electrons are
-AJ2 In is accelerated toward the nAs layer 7 and can be detected as a current due to light absorption. Here, n-
The p-junction is reverse-biased, and the electric field at each junction is small enough that tunnel current does not become dominant and large enough that electrons do not accumulate at each junction, so that the electric field at the n-p junction is If it is made large enough to cause avalanche destruction, the electrons accelerated in the depletion region will generate new electron-hole pairs due to the avalanche destruction, so the photogenerated current will be multiplied and the sensitivity can be increased. In this structure, p--A,
Since the layer thickness of the QI nAs multiplication layer 10 is as large as 1 μm, the rise time of avalanche multiplication is long, and the Al2I
nAs layer group, p--AuInAs layer 4. p”-AftI
nAs layer5. n9Aj2 I nAs layer7. P--Al
Accumulation of photogenerated carriers occurs at the hetero interface between the 2 InAs multiplication layer 10 and the p-1nGaAs light absorption layer 2, making high-speed operation difficult.

(Problems to be Solved by the Invention) Conventional photodetecting elements as described above have a problem in high-speed operation because photogenerated carriers accumulate at the hetero interface. Furthermore, since the layer thickness of the p--All I nAs multiplication layer 10 was large, the operating voltage was also large.

The present invention has been made to solve the above-mentioned problems, and aims to provide a photodetecting element that can operate at high speed and at a sufficiently low voltage for avalanche multiplication.

[Means for Solving the Problems] A photodetecting element according to the present invention includes p--Al2I nA
The layer thickness of the s multiplication layer is set to 0.17 to 0.25 μm, and the carrier concentration is set to 2×lO”cm−3 or less,
A carrier acceleration layer having a composition intermediate between these layers is formed between the light absorption layer and the p--Aft InAs layer.

(Function) In this invention, the voltage at which avalanche multiplication occurs due to the difference in carrier concentration is lower than that in the case of a multiplication layer with a single carrier concentration. Time decreases. Further, by introducing a carrier acceleration layer having an intermediate composition, accumulation of carriers at the hetero interface is prevented.

[Example] FIG. 1 is a sectional view showing an example of the photodetecting element of the present invention. In this figure, 1 is a p + InP substrate, 2 is a p
-InGaAs light absorption layer, 3 is p-Al1InGa
As carrier acceleration layer, 4 p--All I nAs layer, 5 p"-All I nAs layer, 6 p--Af
t I nAs multiplication layer, 7 is an n+A1InAs layer, 8 is a p-side electrode, and 9 is an n-side electrode. Here, p--Aff
The iInAs multiplication layer 6 has a layer thickness of 0.17 to 0.25 μm.
7 carrier density is set to 2×10 15 cm −3 or less.

Note that the layer thickness and carrier concentration of the p--Aft InAs multiplication layer 6 are designed as follows.

In the avalanche multiplication photodiode, in the electron injection type as in the present invention, the multiplication factor M is expressed by the following formula (Imai et al., Chemical Semiconductor Device (II) Industrial Research Group (1985)
)reference).

The invention has a structure in which the two layers are combined into a multilayer structure, and the layer adjacent to the 03 layer has a low carrier concentration, and the high electric field part of the p-n junction is made of this low carrier concentration layer (P--Au I
(corresponding to the nAs multiplication layer 6). Further, the electric field value in this high electric field portion can be kept constant, and Equation (1) becomes as follows (α and β are constant regardless of X).

Here, WM is the width of the high electric field part (the layer with low carrier concentration adjacent to the n+ layer, the p--All I nAs multiplication layer 6
width).

Avalanche multiplication occurs when the denominator is -0 in equation (2), so... (1) Here, α(X) is the ionization coefficient of electrons, and β(y) is the ionization coefficient of holes. The depletion layer is integrated assuming that it extends from x=0 to X=W. This is the avalanche multiplication condition. The values reported as α and β in equation (3) (Watanabe et al., 36th Spring Science Preliminary Fa4a-ZB-7, p
947 (1989)).

a= 8.6・10' exp (-3,5・1
06/E) [cm-']-(4a)β= 2.3
・10' exp (-4,5・106/E)
[cm-']-(4b) However, FIG. 2 shows the results of determining the relationship between Wo and E using E:v/cm. Here, in order to prevent the tunnel current from becoming large in the high electric field part of the p-n junction as the electric field value, E≦7.2X
Limited to 10'v/Cm. Therefore, WM is −
It is limited to 0.17 μm or more.

Since a smaller WM is advantageous for faster response and lower operating voltage, effective WM (P--All I nAs
The layer thickness of the multiplication layer 6 is set to 0.17 to 0.25 μm. Further, the carrier concentration is lowered to 2.10'' or less in order to keep the electric field value constant over the width WM.

Next, the operation will be explained.

The light incident from the upper side of the figure is absorbed by the light absorption layer 2 to generate electron-hole pairs, and the p--Afl I nAs multiplication layer 6
p'' Al2I nAs layer 5.p--AuInA
s layer 4. Due to the electric field in the depletion region of the n-p junction that extends through the carrier acceleration layer 3 to the light absorption layer 2, electrons are
-AJlI is accelerated toward the nAs layer 7 and can be detected as a current due to light absorption. Here, the electric field at each junction is made small enough so that the tunnel current does not increase and large enough so that electrons do not accumulate at each junction, and the electric field at the n-p junction is made large enough to cause avalanche breakdown. For example, new electron-hole pairs are generated by avalanche destruction, thereby multiplying the photocurrent.

That is, in this structure, n” −A11. I nA
p-Al1 I n between the s layer 7 and the carrier acceleration layer 3
The As layer has a multilayer structure with a carrier concentration distribution, and p-
In addition to reducing the voltage applied to the entire AflInAs layer, avalanche multiplication operation is made possible by optimally designing the layer thickness of the p--AβInAs multiplication layer 6. As a result, operation at about 50 V is possible, and since the avalanche multiplication region becomes small, the rise time of avalanche multiplication becomes short and high-speed operation is possible. Also, Al2I nA
s layer group (p-A11I nAs layer 4.p''-AnI n
As layer 5, p--AnInAs multiplication layer 5. n”-AI
The carrier acceleration layer 3 into which the lI nAs layer 7) and the p-InGaAsnGaAs light absorption layer are introduced prevents the accumulation of photogenerated carriers at the hetero interface, and enables high-speed operation of the - layer.

In the above embodiments, the pn junction has a mesa structure, but the same applies to a planar structure.

Further, in the above embodiment, a structure having a carrier acceleration layer 3 made of AllInGaAs between the light absorption layer 2 and the Al2InAs layer group was shown, but a structure using an InGaAsP layer may also be used.

[Effect of the invention] As explained above, this invention
The layer thickness of the multiplication layer is 0.17 to 0.25 μm, the carrier concentration is 2xlO"cm-3 or less, and a carrier acceleration layer with a composition intermediate between these layers is provided between the light absorption layer and the p--Al2I nAs layer. As a result, the voltage at which avalanche multiplication occurs is lower than in the case of a multiplication layer with a single carrier concentration, which reduces the avalanche multiplication rise time, and prevents carrier accumulation at the heterointerface, resulting in high-speed In addition to enabling operation, it also has the effect of enabling operation at low voltage.

[Brief explanation of the drawing]

Figure 'i41 is a cross-sectional view showing one embodiment of the photodetector element of the present invention, and Figure 2 is the width WM of the high electric field part that realizes avalanche multiplication.
FIG. 3 is a cross-sectional view showing a conventional photodetecting element. In the figure, 1 is a p''-InP substrate, 2 is a p-InP substrate, and 2 is a p-InP substrate.
GaAs light absorption layer, 3 is p-Al1. InGaAs
Carrier acceleration layer, 4 p--Al2InAs layer, 5
is p''-AIlI nAs layer, 6 is I)--AJZIn
As multiplication layer, 7 is n”-An I nAs layer, 8 is p
The side electrode 9 is an n-side electrode. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] p^+-A light absorption layer that absorbs light on the InP substrate, p^-
-AlInAs layer, p^+ -AlInAs layer, p^--
In the photodiode having an AlInAs multiplication layer and an n^+-AlInAs layer, the p^--AlInAs
The layer thickness of the multiplication layer is 0.17 to 0.25 μm, the carrier concentration is 2×10^1^5 cm^-^3 or less, and these layers are provided between the light absorption layer and the p^--AlInAs layer. A photodetecting element characterized by forming a carrier acceleration layer having a composition between .