JPS59158624A - Analog multiplexer - Google Patents

Abstract

PURPOSE:To obtain an analog multiplexer with high reliability constituting the circuit that the range of an input signal level is selected freely from the power supply voltage to GND and preventing the bipolar transistor (TR) effect inducing the thyristor effect. CONSTITUTION:A Pch MOSFETM11 and an Nch MOSFETM12 constitute respectively a multiplexer. A P well region of the TRM12 is connected to an input IN or an output OUT by a switch circuit comprising M13-M16. On the other hand, an input of an operational amplifier OP is connected to an input terminal and an output terminal of the multiplers respectively to feed a signal to the switch circuit comprising the M13-M16. This signal is compared with the level of the input terminal and the output terminal to select the level being lower relatively, causing the P well region of the M12 to be connected. A signal given to the TRs constituting the multiplexer is a control signal deciding ON/OFF.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a complementary field effect transistor (hereinafter referred to as C-MO8
It relates to circuits using the abbreviation , and particularly to analog multiplexers.

Conventionally, when configuring an analog multiplexer in a C-MO8 circuit, as shown in Figure 1, the sources and drains of Pch transistor Ml and Nch transistor M2 are connected in parallel, and a P well is formed on an N-type substrate. In the case of a P-well type C-MOS in which a region is formed, the P-well region in which the Nch) transistor is formed is connected to one of the source or drain region. Unlike digital signals, analog signals have all voltage levels between the power supply and ground (GND), and must be transmitted. In the circuit shown in Figure 1, the P-well region where the Nch transistor is located is connected to the input or output end, so the substrate potential of the Nch transistor is always the same as the source potential, which means that the back gate is not added as shown in Figure 2. This structure prevents the conduction resistance between the gym car outputs from fluctuating greatly.

However, when this analog multiplexer becomes conductive as shown in Figure 3, there is no problem if the input terminal IN is at a more negative potential than the output terminal OUT, but conversely, the output terminal OUT is at a more negative potential than the input terminal IN. The potential roughly connects the P well 31 and the output N.
When the potential difference exceeds the forward rising voltage of the type diffusion layer 32, a current flows between the P well 31 and the N type diffusion layer 32.

Does this mean that the output N-type diffusion layer 32 is eminome or P well? +
-4. &board' (r collector toss NPN) run risk Q
It means to flow a pace current of s. When this pace current begins to flow, a current multiplied by the current amplification factor β of the NPN transistor Qs flows between the collector and the emitter.

Therefore, if the input signal source is a charge stored in a capacitor, the charge will be discharged and the true voltage will not be transmitted. Furthermore, when such a bipolar transistor effect occurs within an IC chip, it also becomes a factor that causes a thyristor effect (latch amplifier) in C-MOS. Therefore, in reality, the signal applied to the input terminal is limited so that it is used within a range that prevents the pace current from flowing out.

The present invention has been made in view of the above points, and allows the input signal level range to be freely selected from the power supply voltage used in the IC to GND, and prevents the bipolar transistor effect that induces the cyrisk effect. This provides an analog multiplexer with higher reliability.

FIG. 4 shows an embodiment of the present invention. Mll and M12 are transistors that constitute a multiplexer, respectively, and NC11
The P-well region of transistor M12 is M13. M14 and M15. ' It is connected to input IN or output OUT by a switch circuit constituted by M16. On the other hand, the inputs of the operational amplifier OPI are connected to the input and output ends of the multiplexer, respectively, and send signals to the switch circuit made up of M13 to M16. The signal input to the gate of the transistor constituting the multiplexer connected to the P-well region of selector M12 is a control signal that determines whether to turn it on or off.

Further, FIG. 5 shows an example of another embodiment of the present invention.

This has the advantage that when the control signal is at a low level, that is, when the multiplexer is in the off state, the P well potential of M22 is set to 1GND, so that the multiplexer can maintain the off state even when the operational amplifier OP2 is turned off and powered down. M21゜M22 are the transistors that make up the entire multiplexer, and are NCh transistors zM22
The P-well region of M23. A switch circuit consisting of M24 and M2s, M26 and Mg2 selects one of the input terminal, output terminal, and GND potential.The potential difference between the input terminal and the output terminal is changed by OF2 into a signal indicating the polarity, and this and a control signal. The signal processed by the N0ft gate is M2
S, M26, a signal fcMz3. M2
4, an inverted signal of the control signal is input to Mg2, and as M21 and M22 are turned on and off by the control signal, necessary signals are sent to M23 to M27.

The above explanation is for a C-type that creates a P-well region on an N-type substrate.
Although it was a MOS, it is clear that a C-MOS of the type in which an N-well region is formed on a two-layer substrate can also be completely equivalent, with the only difference being the polarity and conductivity type from those described above.

As explained in detail above, according to the present invention, it is possible to transmit a signal from the power supply voltage level to the GND level without worrying about the potential difference between the input terminal and the output terminal and its polarity.
In addition, since no current flows between the substrate and the output terminal (between the collector and emitter) due to the bipolar transistor effect, it is possible to prevent the silage effect (rattup) and logic malfunctions caused by the flow of current to the substrate. Furthermore, it can also have the feature of using a capacitor that stores charge at the input terminal.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a conventional example, FIG. 2 is a diagram showing the conventional example in an operating state, and FIG. 3 is a diagram showing the cross-sectional structure of the conventional example.
FIG. 4 is a diagram showing an example of an embodiment of the invention, and FIG. 5 is a diagram showing an example of another embodiment of the invention. Ml, M3. Ml 1. Ml 3. Ml 5
．． M21°M23. M25-PchMO8FET,
M2. M4, M5. Ml2. Ml 4. Ml6. M22
．． M24, M26. M27...NchMO8F
ET, 11, Ill, 112. I21. I22. I23
・・・・・・Invar J, OPI, OF2・・・・・・
Operational amplifier, G1...NO gate, G2...
-...NAND gate. Kushi 1 Tahan 21Z v, -3 Kanhan 4-Old

Claims (1)

[Claims] In a circuit using complementary field effect transistors, a source and a drain of a first transistor formed in a first region on a semiconductor substrate and a second transistor formed in a second region of a conductivity type opposite to that of the substrate. are connected in parallel to form a switch circuit in which one is an input terminal and the other is an output terminal, and a second region where the second transistor is formed is connected to the potential between the input and output using a comparator. An analog multiplexer characterized in that it has a means for selecting a terminal having a negative potential by comparing the two terminals and connecting it to the terminal.