JPS59152751U - Thick film hybrid integrated circuit - Google Patents
Thick film hybrid integrated circuitInfo
- Publication number
- JPS59152751U JPS59152751U JP4814083U JP4814083U JPS59152751U JP S59152751 U JPS59152751 U JP S59152751U JP 4814083 U JP4814083 U JP 4814083U JP 4814083 U JP4814083 U JP 4814083U JP S59152751 U JPS59152751 U JP S59152751U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- thick film
- film hybrid
- conductor film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図及び第２図は、従来よりの厚膜混成集積回路の平
面図、第３図は第２図におけるＡ−Ａ線で切断した縦断
面図、第４図及び第５図は、この考案の第１実施例を示
す厚膜混成集積回路の平面図及びＩ−Ｉ線にて切断した
縦断面図、第６図及び第７図は、第２実施例を示す厚膜
混成集積回路の平面図及び■−■線にて切断した縦断面
図である。
１・・・・・・絶縁基板、５． ７ａ、 ７ｂ・・・・
・・第１の導体膜、６．８・・・・・・第２の導体膜。1 and 2 are plan views of a conventional thick film hybrid integrated circuit, FIG. 3 is a vertical cross-sectional view taken along line A-A in FIG. 2, and FIGS. A plan view and a longitudinal sectional view taken along the line I-I of a thick film hybrid integrated circuit showing a first embodiment of the invention, and FIGS. 6 and 7 show a diagram of a thick film hybrid integrated circuit showing a second embodiment of the invention. FIG. 2 is a plan view and a vertical cross-sectional view taken along the line ■-■. 1...Insulating substrate, 5. 7a, 7b...
...First conductor film, 6.8...Second conductor film.
Claims (1)
体膜と、第１の導体膜と導体幅がほぼ等しくかつ比抵抗
が同等以下の第２の導体膜を積層して印刷形成させたこ
とを特徴とする厚膜混成集積回路。On an insulating substrate, a first conductor film formed by printing metal oxide powder and a second conductor film having a conductor width approximately equal to that of the first conductor film and a specific resistance equal to or less than the first conductor film are laminated and printed. A thick film hybrid integrated circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4814083U JPS59152751U (en) | 1983-03-31 | 1983-03-31 | Thick film hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4814083U JPS59152751U (en) | 1983-03-31 | 1983-03-31 | Thick film hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59152751U true JPS59152751U (en) | 1984-10-13 |
Family
ID=30178679
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4814083U Pending JPS59152751U (en) | 1983-03-31 | 1983-03-31 | Thick film hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59152751U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5731874B2 (en) * | 1976-05-03 | 1982-07-07 |
-
1983
- 1983-03-31 JP JP4814083U patent/JPS59152751U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5731874B2 (en) * | 1976-05-03 | 1982-07-07 |
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