JPS59152727A - Signal switching circuit - Google Patents

Signal switching circuit

Info

Publication number
JPS59152727A
JPS59152727A JP2616583A JP2616583A JPS59152727A JP S59152727 A JPS59152727 A JP S59152727A JP 2616583 A JP2616583 A JP 2616583A JP 2616583 A JP2616583 A JP 2616583A JP S59152727 A JPS59152727 A JP S59152727A
Authority
JP
Japan
Prior art keywords
circuit
signal
transistors
transistor
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2616583A
Other languages
Japanese (ja)
Inventor
Akihiro Yamamoto
山本 晶弘
Himio Nakagawa
一三夫 中川
Mitsuru Kudo
満 工藤
Yoshinori Okada
義憲 岡田
Koichi Hirose
広瀬 幸一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2616583A priority Critical patent/JPS59152727A/en
Publication of JPS59152727A publication Critical patent/JPS59152727A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/603Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors with coupled emitters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/615Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors in a Darlington configuration

Abstract

PURPOSE:To obtain a dynamic range sufficient to drive by a low voltage by providing respectively a signal transmission circuit using an inverted Darlington connection between the 1st and 2nd input circuits and two constant current sources. CONSTITUTION:A signal inputted from input terminals 6 and 20 is fed to cross coupling type differential switching circuits 11, 12, 13, 14 by signal transmission circuits 33, 35, 36, 37; 34, 39, 40, 41, 42 of the 1st and 2nd inverted Darlington connection, and when a high and a low level voltage are applied respectively to terminals 24, 25 of transistors (TRs) 26, 27, TRs 11, 14 are activated and TRs 12, 13 are cut off, and when the signal inputted from the input terminal 20 results in applying a low and a high level voltage to the terminals 24, 25, the signal inputted from the input terminal 6 is outputted to an output terminal 22.

Description

【発明の詳細な説明】 61ヶ、) 本発明は、特に低電圧で駆動する集積回路に用いて好適
な信号切替回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal switching circuit particularly suitable for use in integrated circuits driven at low voltage.

(従来技術) 従来の信号切替回路としては、たとえば第1図に示すよ
うな回路がある。
(Prior Art) As a conventional signal switching circuit, there is a circuit as shown in FIG. 1, for example.

図において、トランジスタ11,12,13.14は交
さ結合型の差動切替回路を構成し、抵抗1,2,4゜5
とトランジスタ6はトランジスタ11〜140ベースV
C−バイアス電圧を供給するバイアス回路を構成してい
枕。抵抗8,9 、 )ランジスタフ、10足電流源2
9および入力端子6とで第1の差側増幅器か、また、抵
抗17.18 、 )ランジスタ16゜19、定電流源
60.入力端子2oとで第2の差動増幅器が構成されて
いる。
In the figure, transistors 11, 12, 13, and 14 constitute a cross-coupled differential switching circuit, and resistors 1, 2, and 4°5
and transistor 6 is transistor 11-140 base V
C - A pillow that constitutes a bias circuit that supplies a bias voltage. Resistor 8, 9,) Ranjistaf, 10 foot current source 2
9 and the input terminal 6 are connected to the first differential amplifier, resistor 17.18, ) transistor 16.19, constant current source 60. A second differential amplifier is configured with the input terminal 2o.

抵抗15は第1及び第2の差動増幅器に対し、共通の負
荷であり、信号はトランジスタ21.抵抗23よりなる
エミッタフォロアを介して、出方端子22に出力される
。トランジスタ26.27及び抵抗28は出力端子22
に出力される信号を切替えるための回路である。
The resistor 15 is a common load for the first and second differential amplifiers, and the signal is passed through the transistors 21. The signal is outputted to the output terminal 22 via an emitter follower made up of a resistor 23. Transistors 26, 27 and resistor 28 are connected to output terminal 22
This is a circuit for switching the signal output to the

次に上記した従来回路の動作を説明する。端子24にハ
イレベル、端子25にローレベルのII圧が印加鍔れ、
トランジスタ26が活性状態、トランジスタ27がカッ
トオフ状態のときには、トランジスタ11.14は活性
状態、トランジスタ12゜16はカットオフ状態となる
。そして、端子2oより入力された信号が、出力端子2
2に出方される。
Next, the operation of the above-mentioned conventional circuit will be explained. High level II pressure is applied to terminal 24 and low level II pressure is applied to terminal 25.
When transistor 26 is active and transistor 27 is cut off, transistors 11 and 14 are active and transistors 12 and 16 are cut off. Then, the signal input from terminal 2o is transmitted to output terminal 2o.
2 will appear.

逆洗、端子24にローレベル、端子25にハ゛イレペ鹸 ルの、電圧が印加され、トランジスタ26がカットオフ
状態、トランジスタ27が活性状態のときには、トラン
ジスタ11.14はカットオフ状態、トランジスタ12
.13は活性状態となる。そして、端子6より入力され
た信号が出力端子22に出力される。また、定電流源2
9.30を流れる電流が、等しければ、出力端子22の
直流電圧は信号切替え時において変化することなく、信
号を切替えることができる。
During backwashing, when a low level voltage is applied to the terminal 24 and a high level voltage is applied to the terminal 25, when the transistor 26 is in the cutoff state and the transistor 27 is in the active state, the transistors 11 and 14 are in the cutoff state and the transistor 12 is in the cutoff state.
.. 13 becomes active. Then, the signal inputted from the terminal 6 is outputted to the output terminal 22. Also, constant current source 2
If the currents flowing through 9.30 are equal, the DC voltage at the output terminal 22 does not change during signal switching, and the signal can be switched.

しかしながら、このような従来回路では、定電流源29
又は30を含めてトランジスタを6段積み重ねる必要が
ある。したがって、各々゛のトランジスタのベース・コ
レクタ間が逆バイアスされている状態を保とうとすれば
、出力端22におけるダイナミックレンジは、5V程度
の低電圧動作時においては、極めてとりにくくなるとい
本発明の目的は、5V程度の低電圧で駆動しても十分な
ダイナミックレンジが得られるような信号切替回路を提
供することにある。
However, in such a conventional circuit, the constant current source 29
Alternatively, it is necessary to stack six transistors including 30 transistors. Therefore, if it is attempted to maintain a reverse biased state between the base and collector of each transistor, the dynamic range at the output terminal 22 will be extremely difficult to maintain when operating at a low voltage of about 5V. The purpose is to provide a signal switching circuit that can obtain a sufficient dynamic range even when driven at a low voltage of about 5V.

絡朗の )t) 本発明の特徴は、第1の入力回路、第2の入力回路、お
よび2つの定電流源で駆動し、交さ結合された差動切替
回路を有する信号切替回路において、該第1及び第2の
入力回路と前記2つの定電流源との間のそれぞれに、イ
ンバーテツドダーリントン接続を用いた信号伝達回路を
設けろことによって、トランジスタを2段に減らし、よ
って出力端におけるダイナミックレンジを広げ、5V程
度の低電圧で駆動しても十分な性能が得られる□ように
した点にある。
t) A feature of the present invention is that in a signal switching circuit having a first input circuit, a second input circuit, and a cross-coupled differential switching circuit driven by two constant current sources, By providing a signal transmission circuit using an inverted Darlington connection between the first and second input circuits and the two constant current sources, the number of transistors is reduced to two stages, thereby reducing the number of transistors at the output end. The key point is that the dynamic range has been expanded so that sufficient performance can be obtained even when driven at a low voltage of about 5V.

ヒ芙屈例) 以下に、本発明を実施例により説明する。第2図は本発
明の一実施例の回路図を示す。
EXAMPLES Below, the present invention will be explained with reference to Examples. FIG. 2 shows a circuit diagram of an embodiment of the present invention.

図において、ろ1,32はトランジスタ11〜14から
なる交さ結合型差動切替回路に接続された定電流源であ
る。また、抵抗33.トランジスタ35、s6.抵抗3
7および定電圧源、38は、抵抗8I9、トランジスタ
7’、10.定電流源29お□よび入力端子6からなる
第1の差動増幅器と、トランジスタ11〜14からなす
る交さ結合型差動切替回路とを接続する第1の信号伝達
回路である。抵抗34.トランジスタ39,40 、抵
抗41および定電圧源42は、抵抗17.1B 、 )
ランジスタ16.19 。
In the figure, filters 1 and 32 are constant current sources connected to a cross-coupled differential switching circuit composed of transistors 11 to 14. Also, resistance 33. Transistor 35, s6. resistance 3
7 and a constant voltage source, 38, a resistor 8I9, a transistor 7', 10. This is a first signal transmission circuit that connects a first differential amplifier made up of a constant current source 29 and an input terminal 6, and a cross-coupled differential switching circuit made up of transistors 11 to 14. Resistance 34. The transistors 39 and 40, the resistor 41, and the constant voltage source 42 have a resistor of 17.1B, )
Ransistor 16.19.

定電流源30および入力端子20からなる第2の差動増
幅器と前記交さ結合型差動切替回路とを接続する第2の
信号伝達回路である。なお、第2図における第1図と同
一符号は、第1図のものと同じものを示す。
This is a second signal transmission circuit that connects a second differential amplifier consisting of a constant current source 30 and an input terminal 20 to the cross-coupled differential switching circuit. Note that the same reference numerals in FIG. 2 as in FIG. 1 indicate the same components as in FIG. 1.

このような構成の本実施例によると、抵抗33及び34
には入力信号に応じた電流が流れるため入力端子6及び
入力端子20より入力された信号は、前記した第1及び
第2のインバーテツドダーリントン接続の信号伝達回路
により交さ結合型差動切替回路にその信号電流が伝達さ
れる。
According to this embodiment having such a configuration, the resistors 33 and 34
Since a current according to the input signal flows through the input terminals 6 and 20, the signals inputted from the input terminals 6 and 20 are transferred to the cross-coupled differential switching circuit by the above-mentioned first and second inverted Darlington connection signal transmission circuits. The signal current is transmitted to the circuit.

そこで、第1図の従来回路の例と同じく、トランジスタ
26.27のベースに接続された端子24゜25にそれ
ぞれハイレベル、ローレベルの!圧ヲ印加すると′、ト
ランジスタ11.14が活性状態、トランジスタ12,
13かカットオフ状態どなり、入力端子20から入力さ
れた信号が、出力端子22に出力される。また1、これ
とは逆に、端子24にローレベルの電圧端子25にハイ
レベルの電圧が印加されたと−きは1、トランジスタi
1,14がカットオフ状態、トランジスタ12.13が
活性状態となり、入力端子6より入力された信号が、出
力端子22に出力される。
Therefore, as in the example of the conventional circuit shown in FIG. 1, high level and low level ! When pressure is applied, transistors 11 and 14 are activated and transistors 12 and 14 are activated.
13 is in the cutoff state, and the signal input from the input terminal 20 is output to the output terminal 22. 1.Conversely, when a low level voltage is applied to the terminal 24 and a high level voltage is applied to the terminal 25, the transistor i is 1.
1 and 14 are in a cut-off state, transistors 12 and 13 are in an active state, and the signal input from the input terminal 6 is output to the output terminal 22.

本実施例の回路では、第1図の従来回路がトランジスタ
を6段積み上げる必要があったのに対して、2段の積み
上げですむ。このため、5V程度の低電圧動作時におい
ても、ダイナミックレンジを十分に確保できるという利
点がある。
In the circuit of this embodiment, whereas the conventional circuit shown in FIG. 1 requires stacking transistors in six stages, only two stages are necessary. Therefore, there is an advantage that a sufficient dynamic range can be ensured even during operation at a low voltage of about 5V.

第3図は第2図の回路図をさらに具体的に表わし1こ回
路図を示す。
FIG. 3 more specifically represents the circuit diagram of FIG. 2, and shows one circuit diagram.

図において、抵抗43,46 、 )ランジスタ44゜
45力・らなる点線で囲まれた回路は、第2図における
回路の定電圧源38.42を示す。なお、この回路では
、該点線で囲まれた定電圧源は前記第1および第2の信
号伝達回路の共通の電源になっている。トランジスタ5
3と抵抗49は定電流源29を、トランジスタ54と抵
抗50は定電流源30を構成している。また、トランジ
スタ51と抵抗47&ま定電流源31を、トランジスタ
52と抵抗48は定電流源62を構成している。なお、
上記以外の符号は、第2図と同じ物を示す。
In the figure, a circuit surrounded by a dotted line consisting of resistors 43, 46, transistors 44 and 45 indicates the constant voltage source 38 and 42 of the circuit in FIG. In this circuit, the constant voltage source surrounded by the dotted line serves as a common power source for the first and second signal transmission circuits. transistor 5
3 and the resistor 49 constitute a constant current source 29, and the transistor 54 and the resistor 50 constitute a constant current source 30. Further, the transistor 51 and the resistor 47 constitute a constant current source 31, and the transistor 52 and the resistor 48 constitute a constant current source 62. In addition,
Reference numerals other than those mentioned above indicate the same items as in FIG. 2.

さて、第3図の回路において、トランジスタ51.52
のベア性、トランジスタ53..54のペア性トランジ
スタ35,39のペア性およびトランジスタ36.40
のペア性を十分にとり、さらに、抵抗47.48の抵抗
比、抵抗49.50の抵抗比、抵抗4ろ。
Now, in the circuit of Fig. 3, transistors 51 and 52
bareness of transistor 53. .. 54 paired transistors 35, 39 paired transistors and transistors 36.40
In addition, the resistance ratio is 47.48, the resistance ratio is 49.50, and the resistance is 4.

33.3’4の抵抗比および抵抗37.41の抵抗比か
ほぼ1になるようにすると、5V程度の低電圧動作時に
おいてもダイナミックレンジを十分にとれるという効果
に加えて、信号切替時における出力端子22のDCオフ
セットを、第1図の従来例とはg同等にまで、小さくす
ることができる。
By setting the resistance ratio of 33.3'4 and the resistance ratio of resistor 37.41 to approximately 1, in addition to the effect that a sufficient dynamic range can be obtained even during low voltage operation of about 5V, it is possible to obtain a sufficient dynamic range when switching signals. The DC offset of the output terminal 22 can be made as small as g compared to the conventional example shown in FIG.

すなわち、定電流源31.32を流れる電流をそれぞれ
’l + ’2、第1の信号伝達回路から定電流源61
に流れ込む電流を’Sr第2の信号伝達回路から定゛r
〔1面1源32に流れ込む電流を乙、とすると、トラン
ジスタ260ベースに接続され1こ端子24にハイ、ト
ランジスタ250ベースに接続された端子25にロウの
電圧が印加され、トランジスタ11゜14が活性状態、
トランジスタ12,13がカットオン状態になった時に
は、抵抗15には12−i4の電流が流れる。一方、ト
ランジスタ26のべ−スに接続された端子24にロウ、
トランジスタ250ベースに接続された端子25にハイ
の電圧が印加され、トランジスタ12.13が活性状態
、トランジスタ11.14がカットオフ状態になった時
には、抵抗15にはi、 −i、の電流が流れる。
That is, the currents flowing through the constant current sources 31 and 32 are 'l + '2, respectively, and the currents flowing through the constant current sources 61 and 61 from the first signal transmission circuit are
The current flowing into 'Sr from the second signal transmission circuit to the constant
[If the current flowing into one side and one source 32 is B, a high voltage is applied to the terminal 24 connected to the base of the transistor 260, and a low voltage is applied to the terminal 25 connected to the base of the transistor 250, and the transistors 11 and 14 active state,
When the transistors 12 and 13 are in the cut-on state, a current of 12-i4 flows through the resistor 15. On the other hand, a low signal is connected to the terminal 24 connected to the base of the transistor 26.
When a high voltage is applied to the terminal 25 connected to the base of the transistor 250, and the transistor 12.13 is activated and the transistor 11.14 is cut off, a current of i, -i flows through the resistor 15. flows.

ところで、前記のようにトランジスタに対してはペア性
が十分に取られ、抵抗に対しては各抵抗比がはglにな
るように回路が作られていると、前記電流t1とt2は
はy等しくなり、また入力端子6,2Dへの信号が無信
号の時の前記電流z3とt4ははg等しくなる。
By the way, as mentioned above, if the circuit is made so that the transistors are sufficiently paired and the resistance ratio of the resistors is gl, then the currents t1 and t2 are y When there is no signal to the input terminals 6 and 2D, the currents z3 and t4 become equal to g.

したがって、トランジスタ11.14がオンの時でかつ
無信号時に抵抗15を流れる電流12  L4と、トラ
ンジスタ12.13かオンの時でかつ無信号時に抵抗1
5を流れる電流i、 −i、とは、はg等しくなり、前
記のように、信号切替時における出力端子22のl)C
オフセットは小さくなる。
Therefore, the current 12L4 flowing through the resistor 15 when the transistor 11.14 is on and there is no signal, and the current 12L4 flowing through the resistor 15 when the transistor 12.13 is on and there is no signal.
The current i, −i, flowing through the output terminal 5 is equal to g, and as mentioned above, the current i, −i, flowing through the output terminal 22 at the time of signal switching is
The offset will be smaller.

4!。4! .

本発明の信号切替回路によれば、5V程度の低電圧で駆
動する場合においても十分なダイナミックレンジを得る
ことができる。
According to the signal switching circuit of the present invention, a sufficient dynamic range can be obtained even when driven at a low voltage of about 5V.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来の信号切替回路の回路図、第2図は、本
発明の一実施例の回路図、第3図は第2図をさらに具体
的に表わした回路図である。 6.20・・・・・・・・・・・・・・−・入力端子2
2・・・・・・・・・・・・・・・・・・・・・・出力
端子38.42・・・・・・・・・・・・・・・・・・
定電圧源29.30,31.32・・・定電流源代理人
弁理士 高橋 明 夫 扇  1 l 童 3 図
FIG. 1 is a circuit diagram of a conventional signal switching circuit, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a circuit diagram showing FIG. 2 in more detail. 6.20・・・・・・・・・・・・・・・−・Input terminal 2
2・・・・・・・・・・・・・・・・・・・・・Output terminal 38.42・・・・・・・・・・・・・・・・・・
Constant voltage source 29.30, 31.32...Constant current source Patent attorney Akio Takahashi Ogi 1 l Do 3 Figure

Claims (1)

【特許請求の範囲】[Claims] (1)第1の入力回路、第2の入力回路、および2つの
定電流源で駆動し、交さ結合された差動切替回路を有す
る信号切替回路において、前記第1及び第2の入力回路
と前記2つの定電流源との間のそれぞれにインバーテツ
ドダーリントン接続され7.: npn 、pnp )
ランジスタを含む信号伝達回路を設け1こことを特徴と
する信号切替回路。
(1) In a signal switching circuit having a first input circuit, a second input circuit, and a cross-coupled differential switching circuit driven by two constant current sources, the first and second input circuits 7. An inverted Darlington connection is made between each of the two constant current sources and the two constant current sources. : npn, pnp)
A signal switching circuit comprising: a signal transmission circuit including a transistor;
JP2616583A 1983-02-21 1983-02-21 Signal switching circuit Pending JPS59152727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2616583A JPS59152727A (en) 1983-02-21 1983-02-21 Signal switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2616583A JPS59152727A (en) 1983-02-21 1983-02-21 Signal switching circuit

Publications (1)

Publication Number Publication Date
JPS59152727A true JPS59152727A (en) 1984-08-31

Family

ID=12185934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2616583A Pending JPS59152727A (en) 1983-02-21 1983-02-21 Signal switching circuit

Country Status (1)

Country Link
JP (1) JPS59152727A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01122205A (en) * 1987-10-19 1989-05-15 Internatl Business Mach Corp <Ibm> Signal selecting circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01122205A (en) * 1987-10-19 1989-05-15 Internatl Business Mach Corp <Ibm> Signal selecting circuit
JPH0561806B2 (en) * 1987-10-19 1993-09-07 Ibm

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