JPS5914918B2 - Manufacturing method of printed wiring board - Google Patents

Manufacturing method of printed wiring board

Info

Publication number
JPS5914918B2
JPS5914918B2 JP6424479A JP6424479A JPS5914918B2 JP S5914918 B2 JPS5914918 B2 JP S5914918B2 JP 6424479 A JP6424479 A JP 6424479A JP 6424479 A JP6424479 A JP 6424479A JP S5914918 B2 JPS5914918 B2 JP S5914918B2
Authority
JP
Japan
Prior art keywords
manufacturing
blade
wiring board
printed wiring
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6424479A
Other languages
Japanese (ja)
Other versions
JPS55156387A (en
Inventor
正人 神代
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
Original Assignee
Fujikura Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujikura Ltd filed Critical Fujikura Ltd
Priority to JP6424479A priority Critical patent/JPS5914918B2/en
Publication of JPS55156387A publication Critical patent/JPS55156387A/en
Publication of JPS5914918B2 publication Critical patent/JPS5914918B2/en
Expired legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 この発明は、ダイスタンピング法によリプリント配線板
の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a reprinted wiring board using a die stamping method.

ダイスタンピング法は、刃部を用いてプリント配線板を
製造する方法であるが、従来の方法は一工程スタンピン
グ法と二工程スタンピング法とに 一大別される。
The die stamping method is a method for manufacturing printed wiring boards using a blade, and conventional methods are broadly divided into one-step stamping methods and two-step stamping methods.

一工程スタンピング法は第1図に示すように、内堀部1
1と外堀部12とに段差のある刃部1を使用し、基板2
上に接着剤層4を介在させながら配置された導体箔3を
スタンピングするものである。この場合刃型1は接着剤
層4がフローする(いつたん軟化する)温度よりやや高
めに加熱する。二工程スタンピング法は、第2図aに示
すように、まず基板2上に接着剤層4を介して配置され
た導体箔3の、後に導体パターンとして残しておく部分
を、平型5で押圧して接着剤層4を部分的にフローさせ
てこの部分の導体箔3を固定し、次に第2図bに示すよ
うに、低温の刃部1(この場合には内堀部および外堀部
に段差があつてもなくても良い)によりスタンピングす
るものである。上記の2つの方法とも、接着剤層をあら
かじめ導体箔3側に形成する場合と、基板2側に形成す
る場合との2方式が適用できる。
In the one-step stamping method, as shown in Figure 1, the inner moat 1
1 and the outer moat part 12 are used, and the board 2 is
A conductor foil 3 is stamped with an adhesive layer 4 interposed thereon. In this case, the blade mold 1 is heated to a temperature slightly higher than the temperature at which the adhesive layer 4 flows (suddenly softens). In the two-step stamping method, as shown in FIG. The adhesive layer 4 is partially flowed to fix the conductor foil 3 in this area, and then, as shown in FIG. Stamping is performed with or without steps). In both of the above two methods, two methods can be applied: one in which the adhesive layer is formed in advance on the conductor foil 3 side, and one in which it is formed in advance on the substrate 2 side.

通常は作業能率の点から、接着剤層4を導体箔3側にあ
らかじめ形成しておき、上記の一工程スタンピング法に
よリプリント配線板を製造することが多い。フ ところ
が上述の一工程スタンピング法では刃部に段差が必要な
ため、刃部に要するコストが高くなり、さらに精細パタ
ーンの製造がかなり難しいという欠点がある。
Usually, from the viewpoint of work efficiency, the adhesive layer 4 is formed in advance on the conductor foil 3 side, and the reprinted wiring board is often manufactured by the one-step stamping method described above. However, the one-step stamping method described above requires a step on the blade, which increases the cost required for the blade and has the disadvantage that it is quite difficult to manufacture fine patterns.

また二工程スタンピング法では、段差のない刃部を使用
することによりかなり5 の精細パターンを製造できる
が、二工程であるためランニングコストが高<、しかも
2つの工程間での送り精度が問題となる。本発明は、上
述の問題を解決し、刃部コストおよびランニングコスト
を低下させると共に、精細0 パターンをも製造出来る
ように改善した、ダイスタンピング法によるプリント配
線板の製造方法を提供することを目的とする。
In addition, with the two-step stamping method, it is possible to produce fairly fine patterns of 5 degrees by using a blade with no steps, but since it is a two-step process, running costs are high, and feeding accuracy between the two steps is a problem. Become. It is an object of the present invention to provide a method for manufacturing printed wiring boards using a die stamping method, which solves the above-mentioned problems, lowers the cost of the blade and the running cost, and is improved so as to be able to manufacture even fine patterns. shall be.

以下本発明の一実施例について、図面を参照しながら説
明する。
An embodiment of the present invention will be described below with reference to the drawings.

第3図に示すようにポリ塩化ビノ5 ニル、ポリエステ
ル、ポリイミド等の熱伝導度の良好なフレキシブルフィ
ルム6を基板としてこの表面側に、前記フィルム6の材
質に対応した材質の熱可塑性の樹脂からなる接着材層8
を形成し、この接着材層8の上に鋼などの導体箔Tを積
層す30る。そしてこのフィルム6の表面側(導体箔7
が配置されている側)より、刃部9でスタンピングを行
うのであるが、この時同時にフィルム6の裏面側には平
型20を押しあてるようにする。即ち、フィルム6を、
平型20と刃部9とではさむよう35にしてスタンピン
グを行うのである。そして刃部9は常温とし、平型20
はヒータ21により、熱可塑性樹脂の接着剤層8がフロ
ーする程度の温度に加熱する。するとフイルム6は熱伝
導度が良好であるため、接着剤層8は、平型20が押し
あてられた部分のみ熱せられてフローし、導体箔7が部
分的に接着される。
As shown in FIG. 3, a flexible film 6 having good thermal conductivity such as polyvinyl chloride, polyester, polyimide, etc. is used as a substrate, and a thermoplastic resin of a material corresponding to the material of the film 6 is coated on the surface side of the flexible film 6. Adhesive layer 8
A conductive foil T made of steel or the like is laminated 30 on this adhesive layer 8. Then, the surface side of this film 6 (conductor foil 7
Stamping is performed with the blade portion 9 from the side where the film 6 is placed, and at the same time, a flat mold 20 is pressed against the back side of the film 6. That is, the film 6 is
Stamping is performed by sandwiching the stamp 35 between the flat die 20 and the blade 9. Then, the blade part 9 is kept at room temperature, and the flat type 20
is heated by the heater 21 to a temperature at which the thermoplastic resin adhesive layer 8 flows. Then, since the film 6 has good thermal conductivity, the adhesive layer 8 is heated and flows only in the portion where the flat mold 20 is pressed, and the conductor foil 7 is partially adhered.

勿論平型20の形状は、形成すべき導体パターンに対応
したものとなつているため、前記のスタンピングの終了
後ストリツピング(剥離)を行えば、第4図に示すよう
な接着剤層81,82により、フイルム6土に接着保持
されている導体パターン71,72を形成することが出
来る。以上実施例について説明したように、本発明によ
れば、用いる刃型は段差のないものでよいので、刃型の
コストは安いものとなる。またスタンピングは一工程で
行つているため、ランニングコストは安く、送り精度等
も問題とならない。そして刃型は段差のないものでよい
ため、精細パターンの製造も可能である。
Of course, the shape of the flat mold 20 corresponds to the conductor pattern to be formed, so if stripping (peeling) is performed after the stamping is completed, adhesive layers 81 and 82 as shown in FIG. 4 are formed. As a result, conductive patterns 71 and 72 that are adhesively held on the film 6 can be formed. As described above with respect to the embodiments, according to the present invention, the blade mold used may be one without a step, so the cost of the blade mold is low. Furthermore, since stamping is performed in one process, running costs are low and there are no problems with feeding accuracy. Furthermore, since the blade shape does not need to have any steps, it is also possible to manufacture fine patterns.

【図面の簡単な説明】[Brief explanation of drawings]

第1図}よび第2図A,bは、それぞれ従来の製造方法
を説明するための断面図、第3図および第4図は、本発
明の一実施例にかかる製造方法を説明するための各工程
をそれぞれ示す断面図である。 1,9・・・・・・刃型、2・・・・・・基板、3,7
・・・・・・導体箔、8・・・・・・接着剤層、5,2
0・・・・・・平型、21・・・・・・ヒータ。
1} and FIGS. 2A and 2B are sectional views for explaining a conventional manufacturing method, respectively, and FIGS. 3 and 4 are sectional views for explaining a manufacturing method according to an embodiment of the present invention. FIG. 3 is a cross-sectional view showing each step. 1, 9... Blade type, 2... Substrate, 3, 7
... Conductor foil, 8 ... Adhesive layer, 5, 2
0... Flat type, 21... Heater.

Claims (1)

【特許請求の範囲】[Claims] 1 熱伝導度の良好な基板の表面上に接着剤層を介して
導体箔を積層し、前記基板の裏面側より加熱された平型
を押しあてながら、前記基板の表面側より刃部でスタン
ピングを行うことを特徴とする、プリント配線板の製造
方法。
1 Laminate conductive foil on the surface of a substrate with good thermal conductivity via an adhesive layer, and stamp with a blade from the front side of the substrate while pressing a heated flat mold from the back side of the substrate. A method for manufacturing a printed wiring board, the method comprising:
JP6424479A 1979-05-24 1979-05-24 Manufacturing method of printed wiring board Expired JPS5914918B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6424479A JPS5914918B2 (en) 1979-05-24 1979-05-24 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6424479A JPS5914918B2 (en) 1979-05-24 1979-05-24 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPS55156387A JPS55156387A (en) 1980-12-05
JPS5914918B2 true JPS5914918B2 (en) 1984-04-06

Family

ID=13252533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6424479A Expired JPS5914918B2 (en) 1979-05-24 1979-05-24 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JPS5914918B2 (en)

Also Published As

Publication number Publication date
JPS55156387A (en) 1980-12-05

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