JPS59147559A - Signal transmitter - Google Patents

Signal transmitter

Info

Publication number
JPS59147559A
JPS59147559A JP58021795A JP2179583A JPS59147559A JP S59147559 A JPS59147559 A JP S59147559A JP 58021795 A JP58021795 A JP 58021795A JP 2179583 A JP2179583 A JP 2179583A JP S59147559 A JPS59147559 A JP S59147559A
Authority
JP
Japan
Prior art keywords
parallel
serial
register
data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58021795A
Other languages
Japanese (ja)
Inventor
Akiro Otsubo
大坪 彬郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58021795A priority Critical patent/JPS59147559A/en
Publication of JPS59147559A publication Critical patent/JPS59147559A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/026Arrangements for coupling transmitters, receivers or transceivers to transmission lines; Line drivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To decrease the time receiving a data and to attain transfer even if a transmission line is not quickened by providing a register between a receiving end and a serial/parallel converter to make the receiving end request transmission. CONSTITUTION:When the receiving end 2 transmits a transmission request 4 to a register 8 for transfer request of data, the register 8 transmits the data to the receiving end 2. Since the register 8 becomes idle, the register 8 outputs a transmission request signal 9 to a transmission end 1. The transmission end 1 transmits a parallel data to a parallel/serial converter 5, the data processed for serial processing enters the serial/parallel converter 6, where the data is processed for parallel processing and stored in the register 8. Thus, while the receiving end 2 processes the data from the register 8, the register 8 receives the next data.

Description

【発明の詳細な説明】 この発明は、従来並列伝送していた線路を直列伝送に置
き換える場合の信号伝送装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal transmission device for replacing conventional parallel transmission lines with serial transmission.

並列伝送の信号伝送装置を第1図に示す。図において、
(1)は並列信号を出力する送信端、(2)は並列信号
を受信する受信端、(3)は並列の伝送線路、(4)は
送付要求である。
Figure 1 shows a signal transmission device for parallel transmission. In the figure,
(1) is a transmitting end that outputs parallel signals, (2) is a receiving end that receives parallel signals, (3) is a parallel transmission line, and (4) is a sending request.

これを直列伝送1こ変換する際(こ、従来は第2図の装
置で行なっていた。第2図1こおいて、(1)は並列信
号を出力する送信端、(5)は並列信号を直列信号へ変
換する並列−直列変換器、(6)は直列信号を並列信号
に変換する直列−並列変換器、(2)は並列信号を受信
する受信端、(7)は直列の伝送線路、(4)は送付要
求である。
When converting this to serial transmission (this was conventionally done with the device shown in Figure 2), in Figure 2, (1) is the transmitting end that outputs the parallel signal, (5) is the parallel signal (6) is a serial-to-parallel converter that converts a serial signal into a parallel signal, (2) is a receiving end that receives parallel signals, and (7) is a serial transmission line. , (4) is a sending request.

1次に動作について説明する。The first operation will be explained.

第1図においで、受信端(2)からの送付要求(4)が
送信端+1)に入力されると、送信端(1)は並列のデ
ータを並列の伝送線w!r131を経由して受信端(2
)lご送付する。
In FIG. 1, when a sending request (4) from the receiving end (2) is input to the sending end +1), the sending end (1) sends parallel data to the parallel transmission line w! The receiving end (2
) l will be sent to you.

この伝送を直列で行なうのが第2図である。まず受信端
(2)から送信端(1)に送付要求(4)を送る。送信
端+1)はこの送付要求(4)が入力されると並列のデ
ータを並列−直列変換器(5)1こ送る。この変換器(
5)は並列データを直列データに変換し、これを直列の
伝送線路(7)を通じて直列−並列変換器(6)に送る
FIG. 2 shows how this transmission is performed in series. First, a sending request (4) is sent from the receiving end (2) to the sending end (1). When the sending request (4) is input, the sending end (+1) sends parallel data to one parallel-to-serial converter (5). This converter (
5) converts the parallel data into serial data and sends it to the serial-parallel converter (6) through the serial transmission line (7).

そしてこの変換器+61は直列データを並列データに変
換し、受信端(2)は該並列データを受は収り、処理を
行なう。
This converter +61 converts serial data into parallel data, and the receiving end (2) receives and processes the parallel data.

従来の装+tVi、受信端(2)が送付要求(4)を出
してはじめで送信41 tllがデータを出力するよう
1こなつでいるため、伝送線路長が長くなると伝送線路
長の2倍でデータの転送が遅くなり、受信端(2)が送
付要求(4)を出してデータを受は収るまでの時間が艮
くなると同時(こ、直列の伝送線路(7)の伝送速度も
並列の転送速度のビット数倍の速度で1ビツトを転送し
なければならず、そのため伝送線路を高速化しなければ
ならないという欠点があった。
In the conventional system + tVi, since the receiving end (2) issues a sending request (4), the transmitting end (41) is configured so that the tll outputs data, so if the transmission line length becomes long, the data will be sent twice as long as the transmission line length. At the same time, the transmission speed of the serial transmission line (7) also increases as the transmission speed of the serial transmission line (7) slows down and the time it takes for the receiving end (2) to issue a sending request (4) and receive the data becomes longer. One bit has to be transferred at a speed that is twice the transfer speed as the number of bits, and therefore the transmission line has to be made faster.

この発明は、上記のような従来のものの欠点を1余去す
るためになされたもので、受信端と直列−並列変換器と
の間1こレジスタを設け、受信端はこのレジスタ1ご送
付要求を出してテ゛−夕を受、け、また該レジスタは、
これが空であるという情報を送付要求信号として送信端
1ご送付要求を行なうよう1こすることにより、受信端
が送付要求を出してからデータを受けとる時間を短かく
でき、さら1こ伝送線路を高速化しなくてもすむ信号伝
送装置aを提供することを目的としでいる。
This invention was made in order to eliminate all the drawbacks of the conventional ones as described above.One register is provided between the receiving end and the serial-to-parallel converter, and the receiving end requests transmission of this register. and receive the register, and the register is
By using the information that this is empty as a transmission request signal so that the transmitting end makes a transmission request, the time it takes for the receiving end to receive data after issuing a transmission request can be shortened, and the transmission line can be further shortened. It is an object of the present invention to provide a signal transmission device a that does not require high speed.

以下この発明の一実施例を図1ごついて説明する。An embodiment of the present invention will be described below with reference to FIG.

第3図1こおいて、第2図と同一符号は同一のものを示
す。(8)は直列−並列変換器(6)と受信端(2)と
の間1こ設けられたレジスタ、+91 l″iiレジス
タ)が空である時、該レジスタ(8)から送信端(1)
へ出力される送付要求信号である。上記レジスタ+81
 l′i変換器(6)の出力のデータをいったんだくわ
えておき、受信端(2)からの送付要求(4)1こより
データを送る機能をもつでSす、また該レジスタ(8)
から出力される送付要求値8(9)はレジスタ(8)が
空1こなりたとき1こ送信端(11ヘデータの送付を要
求する信号である。
In FIG. 3, the same reference numerals as in FIG. 2 indicate the same parts. (8) is a register provided between the serial-to-parallel converter (6) and the receiving end (2), when the register (+91 l''ii register) is empty, from the register (8) to the transmitting end (1 )
This is a sending request signal output to. Above register +81
It has the function of temporarily storing the data output from the l'i converter (6) and transmitting the data from the sending request (4) from the receiving end (2), and the register (8)
The sending request value 8 (9) output from the register (8) is a signal requesting sending of data to the sending end (11) when the register (8) becomes empty.

次に動作について説明する。Next, the operation will be explained.

受信端(2)が送付要求(4)をレジスタ(8)に送り
、データの伝送要求を行なうと、レジスタ(8)はたく
ゎえているデータを受信端(2)に送る。すると、レジ
スタ(8)は空になるため該レジスタ(8)は送付要求
信号(9)を送信4 tll lこ出力する。この送付
要求信号(9)が送信端(1)Iこ入力されると、該送
信端は)は並列テ゛−タを並列−直列変換器t511こ
送る。ここで直列化されたデータは、直列の伝送線路(
7)経由で直列−並列変換器(6)に入り、該変換器(
6)で並列化されてレジスタ(8)にだくわえられる。
When the receiving end (2) sends a sending request (4) to the register (8) to request data transmission, the register (8) sends the stored data to the receiving end (2). Then, since the register (8) becomes empty, the register (8) outputs the transmission request signal (9). When this transmission request signal (9) is input to the transmitting end (1), the transmitting end sends the parallel data to the parallel-to-serial converter t511. The serialized data here is transmitted through a series transmission line (
7) and enters the series-to-parallel converter (6) via the converter (
The data are parallelized in step 6) and stored in register (8).

このようにして受イ目端(2)がレジスタ(8)からの
データを処理している間1こ、該レジスタ(8)1こよ
り次のデータが受は収れるよう(こなる。
In this way, while the receiving end (2) is processing the data from the register (8), the next data is received from the register (8).

以上のように、この発明によれば、並列伝送していた線
路を直列伝送jこ置き換える場合、レジスタを受信端と
直列−並列変換器との間に設け、受信端はこれとインタ
ーフェースし、送信端への送付要求はレジスタか空とな
った時の信号を用いる(求1こ構成したので、受信端か
らのデータ送付要求1こすぐ応答して線路長の影響をな
くし、さらlこ受信端でのデータ処理中に次のデータを
受は収れるようにすることができ、ピット数倍のビット
転送速度というスピードよりもゆるやかな速度で直列転
送or能であるという効果がある。
As described above, according to the present invention, when a parallel transmission line is replaced with a serial transmission line, a register is provided between the receiving end and the serial-parallel converter, the receiving end interfaces with this, and the transmitting The transmission request to the end uses the signal when the register becomes empty (Since the configuration has been configured, the data transmission request from the receiving end is responded to once, eliminating the influence of the line length, and the signal is sent to the receiving end. It is possible to receive the next data while processing data, and there is an effect that serial transfer is possible at a slower speed than the bit transfer speed which is twice the number of pits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は並列信号伝送装置の概略グロック図、′第2図
は従来の並列信号伝送装置を直列信号伝送装置に9えた
場合の概略グaツク図、第3図はこの発明の一実施例1
こよる信号伝送装置の概略グロ器、(6)・・・直列−
並列変換器、(7)・・・直列の伝送線路、(8)・・
・レジスタ、(9)・・・送付要求値8゜なお図中同一
符号は同一、又は相当部分を示す。
Fig. 1 is a schematic block diagram of a parallel signal transmission device, Fig. 2 is a schematic block diagram of a conventional parallel signal transmission device replaced with a serial signal transmission device, and Fig. 3 is an embodiment of the present invention. 1
Schematic diagram of the signal transmission device, (6)...Series-
Parallel converter, (7)...Series transmission line, (8)...
・Register, (9)...Sending request value 8° Note that the same reference numerals in the figure indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] (1)並列信号を出力する送信端と、該送信端からの並
列信号を直列信号に変換する並列−直列変換器と、該変
換器からの直列信号を伝送する直列伝送線路と、該伝送
されてきた直列信号を並列信号に変換する直列−並列変
換器と、該変換器からの並列信号を受けて信号処理を行
なう受信端と、上記直列−並列変換器と受信端との間に
設けられ上記直列−並列変換器からの並列データをいっ
たんだくわえ上記受信端からの送付要求により該並列デ
ータを上記受信端に出力した後上記送信端に送付要求信
号を出力するレジスタとを備えたことを特徴とする信号
伝送装置。
(1) A transmitting end that outputs a parallel signal, a parallel-serial converter that converts the parallel signal from the transmitting end into a serial signal, a serial transmission line that transmits the serial signal from the converter, and a serial transmission line that transmits the serial signal from the converter. a serial-to-parallel converter that converts the received serial signal into a parallel signal; a receiving end that receives the parallel signal from the converter and performs signal processing; and a receiver provided between the serial-parallel converter and the receiving end. and a register that once stores parallel data from the serial-parallel converter, outputs the parallel data to the receiving end in response to a sending request from the receiving end, and then outputs a sending request signal to the sending end. Characteristic signal transmission device.
JP58021795A 1983-02-10 1983-02-10 Signal transmitter Pending JPS59147559A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58021795A JPS59147559A (en) 1983-02-10 1983-02-10 Signal transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58021795A JPS59147559A (en) 1983-02-10 1983-02-10 Signal transmitter

Publications (1)

Publication Number Publication Date
JPS59147559A true JPS59147559A (en) 1984-08-23

Family

ID=12064984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58021795A Pending JPS59147559A (en) 1983-02-10 1983-02-10 Signal transmitter

Country Status (1)

Country Link
JP (1) JPS59147559A (en)

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